1 /*
   2  * Copyright (c) 2013, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  */
  23 package org.graalvm.compiler.hotspot.aarch64;
  24 
  25 import static jdk.vm.ci.aarch64.AArch64.zr;
  26 import static jdk.vm.ci.code.ValueUtil.asRegister;
  27 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.HINT;
  28 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
  29 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
  30 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK;
  31 
  32 import org.graalvm.compiler.asm.Label;
  33 import org.graalvm.compiler.asm.aarch64.AArch64Assembler;
  34 import org.graalvm.compiler.asm.aarch64.AArch64MacroAssembler;
  35 import org.graalvm.compiler.core.common.CompressEncoding;
  36 import org.graalvm.compiler.lir.LIRInstructionClass;
  37 import org.graalvm.compiler.lir.StandardOp.LoadConstantOp;
  38 import org.graalvm.compiler.lir.aarch64.AArch64LIRInstruction;
  39 import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
  40 
  41 import jdk.vm.ci.code.Register;
  42 import jdk.vm.ci.hotspot.HotSpotConstant;
  43 import jdk.vm.ci.meta.AllocatableValue;
  44 import jdk.vm.ci.meta.Constant;
  45 
  46 public class AArch64HotSpotMove {
  47 
  48     public static class LoadHotSpotObjectConstantInline extends AArch64LIRInstruction implements LoadConstantOp {
  49         public static final LIRInstructionClass<LoadHotSpotObjectConstantInline> TYPE = LIRInstructionClass.create(LoadHotSpotObjectConstantInline.class);
  50 
  51         private HotSpotConstant constant;
  52         @Def({REG, STACK}) AllocatableValue result;
  53 
  54         public LoadHotSpotObjectConstantInline(HotSpotConstant constant, AllocatableValue result) {
  55             super(TYPE);
  56             this.constant = constant;
  57             this.result = result;
  58         }
  59 
  60         @Override
  61         protected void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
  62             crb.recordInlineDataInCode(constant);
  63             if (constant.isCompressed()) {
  64                 // masm.forceMov(asRegister(result), 0);
  65                 masm.movNarrowAddress(asRegister(result), 0);
  66             } else {
  67                 masm.movNativeAddress(asRegister(result), 0);
  68             }
  69         }
  70 
  71         @Override
  72         public AllocatableValue getResult() {
  73             return result;
  74         }
  75 
  76         @Override
  77         public Constant getConstant() {
  78             return constant;
  79         }
  80     }
  81 
  82     /**
  83      * Compresses a 8-byte pointer as a 4-byte int.
  84      */
  85     public static class CompressPointer extends AArch64LIRInstruction {
  86         public static final LIRInstructionClass<CompressPointer> TYPE = LIRInstructionClass.create(CompressPointer.class);
  87 
  88         private final CompressEncoding encoding;
  89         private final boolean nonNull;
  90 
  91         @Def({REG, HINT}) protected AllocatableValue result;
  92         @Use({REG}) protected AllocatableValue input;
  93         @Alive({REG, ILLEGAL}) protected AllocatableValue baseRegister;
  94 
  95         public CompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull) {
  96             super(TYPE);
  97             this.result = result;
  98             this.input = input;
  99             this.baseRegister = baseRegister;
 100             this.encoding = encoding;
 101             this.nonNull = nonNull;
 102         }
 103 
 104         @Override
 105         public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
 106             Register resultRegister = asRegister(result);
 107             Register ptr = asRegister(input);
 108             Register base = asRegister(baseRegister);
 109             // result = (ptr - base) >> shift
 110             if (!encoding.hasBase()) {
 111                 if (encoding.hasShift()) {
 112                     masm.lshr(64, resultRegister, ptr, encoding.getShift());
 113                 } else {
 114                     masm.movx(resultRegister, ptr);
 115                 }
 116             } else if (nonNull) {
 117                 masm.sub(64, resultRegister, ptr, base);
 118                 if (encoding.hasShift()) {
 119                     masm.shl(64, resultRegister, resultRegister, encoding.getShift());
 120                 }
 121             } else {
 122                 // if ptr is null it still has to be null after compression
 123                 masm.cmp(64, ptr, 0);
 124                 masm.cmov(64, resultRegister, ptr, base, AArch64Assembler.ConditionFlag.NE);
 125                 masm.sub(64, resultRegister, resultRegister, base);
 126                 if (encoding.hasShift()) {
 127                     masm.lshr(64, resultRegister, resultRegister, encoding.getShift());
 128                 }
 129             }
 130         }
 131     }
 132 
 133     /**
 134      * Decompresses a 4-byte offset into an actual pointer.
 135      */
 136     public static class UncompressPointer extends AArch64LIRInstruction {
 137         public static final LIRInstructionClass<UncompressPointer> TYPE = LIRInstructionClass.create(UncompressPointer.class);
 138 
 139         private final CompressEncoding encoding;
 140         private final boolean nonNull;
 141 
 142         @Def({REG}) protected AllocatableValue result;
 143         @Use({REG}) protected AllocatableValue input;
 144         @Alive({REG, ILLEGAL}) protected AllocatableValue baseRegister;
 145 
 146         public UncompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull) {
 147             super(TYPE);
 148             this.result = result;
 149             this.input = input;
 150             this.baseRegister = baseRegister;
 151             this.encoding = encoding;
 152             this.nonNull = nonNull;
 153         }
 154 
 155         @Override
 156         public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
 157             Register ptr = asRegister(input);
 158             Register resultRegister = asRegister(result);
 159             Register base = asRegister(baseRegister);
 160             // result = base + (ptr << shift)
 161             if (nonNull) {
 162                 masm.add(64, resultRegister, base, ptr, AArch64Assembler.ShiftType.LSL, encoding.getShift());
 163             } else if (!encoding.hasBase()) {
 164                 masm.add(64, resultRegister, zr, ptr, AArch64Assembler.ShiftType.LSL, encoding.getShift());
 165             } else {
 166                 // if ptr is null it has to be null after decompression
 167                 Label done = new Label();
 168                 if (!resultRegister.equals(ptr)) {
 169                     masm.mov(32, resultRegister, ptr);
 170                 }
 171                 masm.cbz(32, resultRegister, done);
 172                 masm.add(64, resultRegister, base, resultRegister, AArch64Assembler.ShiftType.LSL, encoding.getShift());
 173                 masm.bind(done);
 174             }
 175         }
 176     }
 177 
 178     //
 179     // private static void decompressPointer(CompilationResultBuilder crb, ARMv8MacroAssembler masm,
 180     // Register result,
 181     // Register ptr, long base, int shift, int alignment) {
 182     // assert base != 0 || shift == 0 || alignment == shift;
 183     // // result = heapBase + ptr << alignment
 184     // Register heapBase = ARMv8.heapBaseRegister;
 185     // // if result == 0, we make sure that it will still be 0 at the end, so that it traps when
 186     // // loading storing a value.
 187     // masm.cmp(32, ptr, 0);
 188     // masm.add(64, result, heapBase, ptr, ARMv8Assembler.ExtendType.UXTX, alignment);
 189     // masm.cmov(64, result, result, ARMv8.zr, ARMv8Assembler.ConditionFlag.NE);
 190     // }
 191 
 192     public static void decodeKlassPointer(AArch64MacroAssembler masm, Register result, Register ptr, Register klassBase, CompressEncoding encoding) {
 193         // result = klassBase + ptr << shift
 194         if (encoding.hasShift() || encoding.hasBase()) {
 195             masm.add(64, result, klassBase, ptr, AArch64Assembler.ExtendType.UXTX, encoding.getShift());
 196         }
 197     }
 198 
 199 }