1 /* 2 * Copyright (c) 2013, 2016, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 */ 23 package org.graalvm.compiler.lir.aarch64; 24 25 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG; 26 import static jdk.vm.ci.code.ValueUtil.asRegister; 27 28 import org.graalvm.compiler.asm.aarch64.AArch64MacroAssembler; 29 import org.graalvm.compiler.debug.GraalError; 30 import org.graalvm.compiler.lir.LIRInstructionClass; 31 import org.graalvm.compiler.lir.Opcode; 32 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; 33 34 import jdk.vm.ci.code.Register; 35 import jdk.vm.ci.meta.AllocatableValue; 36 37 /** 38 * Bit manipulation ops for ARMv8 ISA. 39 */ 40 public class AArch64BitManipulationOp extends AArch64LIRInstruction { 41 public enum BitManipulationOpCode { 42 CTZ, 43 BSR, 44 BSWP, 45 CLZ, 46 } 47 48 private static final LIRInstructionClass<AArch64BitManipulationOp> TYPE = LIRInstructionClass.create(AArch64BitManipulationOp.class); 49 50 @Opcode private final BitManipulationOpCode opcode; 51 @Def protected AllocatableValue result; 52 @Use({REG}) protected AllocatableValue input; 53 54 public AArch64BitManipulationOp(BitManipulationOpCode opcode, AllocatableValue result, AllocatableValue input) { 55 super(TYPE); 56 this.opcode = opcode; 57 this.result = result; 58 this.input = input; 59 } 60 61 @Override 62 public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) { 63 Register dst = asRegister(result); 64 Register src = asRegister(input); 65 final int size = input.getPlatformKind().getSizeInBytes() * Byte.SIZE; 66 switch (opcode) { 67 case CLZ: 68 masm.clz(size, dst, src); 69 break; 70 case BSR: 71 // BSR == <type width> - 1 - CLZ(input) 72 masm.clz(size, dst, src); 73 masm.neg(size, dst, dst); 74 masm.add(size, dst, dst, size - 1); 75 break; 76 case CTZ: 77 // CTZ == CLZ(rbit(input)) 78 masm.rbit(size, dst, src); 79 masm.clz(size, dst, dst); 80 break; 81 case BSWP: 82 masm.rev(size, dst, src); 83 break; 84 default: 85 throw GraalError.shouldNotReachHere(); 86 } 87 } 88 89 }