--- old/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir.aarch64/src/org/graalvm/compiler/lir/aarch64/AArch64BitManipulationOp.java	2017-03-20 17:39:29.000000000 -0700
+++ new/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir.aarch64/src/org/graalvm/compiler/lir/aarch64/AArch64BitManipulationOp.java	2017-03-20 17:39:29.000000000 -0700
@@ -39,7 +39,7 @@
  */
 public class AArch64BitManipulationOp extends AArch64LIRInstruction {
     public enum BitManipulationOpCode {
-        BSF,
+        CTZ,
         BSR,
         BSWP,
         CLZ,
@@ -62,7 +62,7 @@
     public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
         Register dst = asRegister(result);
         Register src = asRegister(input);
-        final int size = result.getPlatformKind().getSizeInBytes() * Byte.SIZE;
+        final int size = input.getPlatformKind().getSizeInBytes() * Byte.SIZE;
         switch (opcode) {
             case CLZ:
                 masm.clz(size, dst, src);
@@ -73,9 +73,9 @@
                 masm.neg(size, dst, dst);
                 masm.add(size, dst, dst, size - 1);
                 break;
-            case BSF:
-                // BSF == CLZ(rev(input))
-                masm.rev(size, dst, src);
+            case CTZ:
+                // CTZ == CLZ(rbit(input))
+                masm.rbit(size, dst, src);
                 masm.clz(size, dst, dst);
                 break;
             case BSWP: