src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/alloc/trace/lsra/RegisterVerifier.java
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src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/alloc/trace/lsra/RegisterVerifier.java

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*** 30,41 **** import java.util.ArrayList; import java.util.EnumSet; import org.graalvm.compiler.core.common.cfg.AbstractBlockBase; import org.graalvm.compiler.core.common.cfg.BlockMap; ! import org.graalvm.compiler.debug.Debug; ! import org.graalvm.compiler.debug.Debug.Scope; import org.graalvm.compiler.debug.GraalError; import org.graalvm.compiler.debug.Indent; import org.graalvm.compiler.lir.InstructionValueConsumer; import org.graalvm.compiler.lir.LIRInstruction; import org.graalvm.compiler.lir.LIRInstruction.OperandFlag; --- 30,40 ---- import java.util.ArrayList; import java.util.EnumSet; import org.graalvm.compiler.core.common.cfg.AbstractBlockBase; import org.graalvm.compiler.core.common.cfg.BlockMap; ! import org.graalvm.compiler.debug.DebugContext; import org.graalvm.compiler.debug.GraalError; import org.graalvm.compiler.debug.Indent; import org.graalvm.compiler.lir.InstructionValueConsumer; import org.graalvm.compiler.lir.LIRInstruction; import org.graalvm.compiler.lir.LIRInstruction.OperandFlag;
*** 44,55 **** import org.graalvm.compiler.lir.alloc.trace.lsra.TraceLinearScanPhase.TraceLinearScan; import jdk.vm.ci.code.Register; import jdk.vm.ci.meta.Value; - /** - */ final class RegisterVerifier { TraceLinearScan allocator; ArrayList<AbstractBlockBase<?>> workList; // all blocks that must be processed BlockMap<TraceInterval[]> savedStates; // saved information of previous check --- 43,52 ----
*** 86,96 **** } @SuppressWarnings("try") void verify(AbstractBlockBase<?> start) { ! try (Scope s = Debug.scope("RegisterVerifier")) { // setup input registers (method arguments) for first block TraceInterval[] inputState = new TraceInterval[stateSize()]; setStateForBlock(start, inputState); addToWorkList(start); --- 83,94 ---- } @SuppressWarnings("try") void verify(AbstractBlockBase<?> start) { ! DebugContext debug = allocator.getDebug(); ! try (DebugContext.Scope s = debug.scope("RegisterVerifier")) { // setup input registers (method arguments) for first block TraceInterval[] inputState = new TraceInterval[stateSize()]; setStateForBlock(start, inputState); addToWorkList(start);
*** 104,125 **** } } @SuppressWarnings("try") private void processBlock(AbstractBlockBase<?> block) { ! try (Indent indent = Debug.logAndIndent("processBlock B%d", block.getId())) { // must copy state because it is modified TraceInterval[] inputState = copy(stateForBlock(block)); ! try (Indent indent2 = Debug.logAndIndent("Input-State of intervals:")) { printState(inputState); } // process all operations of the block processOperations(block, inputState); ! try (Indent indent2 = Debug.logAndIndent("Output-State of intervals:")) { printState(inputState); } // iterate all successors for (AbstractBlockBase<?> succ : block.getSuccessors()) { --- 102,124 ---- } } @SuppressWarnings("try") private void processBlock(AbstractBlockBase<?> block) { ! DebugContext debug = allocator.getDebug(); ! try (Indent indent = debug.logAndIndent("processBlock B%d", block.getId())) { // must copy state because it is modified TraceInterval[] inputState = copy(stateForBlock(block)); ! try (Indent indent2 = debug.logAndIndent("Input-State of intervals:")) { printState(inputState); } // process all operations of the block processOperations(block, inputState); ! try (Indent indent2 = debug.logAndIndent("Output-State of intervals:")) { printState(inputState); } // iterate all successors for (AbstractBlockBase<?> succ : block.getSuccessors()) {
*** 127,150 **** } } } protected void printState(TraceInterval[] inputState) { for (int i = 0; i < stateSize(); i++) { Register reg = allocator.getRegisters().get(i); assert reg.number == i; if (inputState[i] != null) { ! Debug.log(" %6s %4d -- %s", reg, inputState[i].operandNumber, inputState[i]); } else { ! Debug.log(" %6s __", reg); } } } private void processSuccessor(AbstractBlockBase<?> block, TraceInterval[] inputState) { TraceInterval[] savedState = stateForBlock(block); if (savedState != null) { // this block was already processed before. // check if new inputState is consistent with savedState boolean savedStateCorrect = true; --- 126,151 ---- } } } protected void printState(TraceInterval[] inputState) { + DebugContext debug = allocator.getDebug(); for (int i = 0; i < stateSize(); i++) { Register reg = allocator.getRegisters().get(i); assert reg.number == i; if (inputState[i] != null) { ! debug.log(" %6s %4d -- %s", reg, inputState[i].operandNumber, inputState[i]); } else { ! debug.log(" %6s __", reg); } } } private void processSuccessor(AbstractBlockBase<?> block, TraceInterval[] inputState) { TraceInterval[] savedState = stateForBlock(block); + DebugContext debug = allocator.getDebug(); if (savedState != null) { // this block was already processed before. // check if new inputState is consistent with savedState boolean savedStateCorrect = true;
*** 157,201 **** // register was valid. when the register was already invalid, // then the old calculation was correct. savedStateCorrect = false; savedState[i] = null; ! Debug.log("processSuccessor B%d: invalidating slot %d", block.getId(), i); } } } if (savedStateCorrect) { // already processed block with correct inputState ! Debug.log("processSuccessor B%d: previous visit already correct", block.getId()); } else { // must re-visit this block ! Debug.log("processSuccessor B%d: must re-visit because input state changed", block.getId()); addToWorkList(block); } } else { // block was not processed before, so set initial inputState ! Debug.log("processSuccessor B%d: initial visit", block.getId()); setStateForBlock(block, copy(inputState)); addToWorkList(block); } } static TraceInterval[] copy(TraceInterval[] inputState) { return inputState.clone(); } ! static void statePut(TraceInterval[] inputState, Value location, TraceInterval interval) { if (location != null && isRegister(location)) { Register reg = asRegister(location); int regNum = reg.number; if (interval != null) { ! Debug.log("%s = v%d", reg, interval.operandNumber); } else if (inputState[regNum] != null) { ! Debug.log("%s = null", reg); } inputState[regNum] = interval; } } --- 158,202 ---- // register was valid. when the register was already invalid, // then the old calculation was correct. savedStateCorrect = false; savedState[i] = null; ! debug.log("processSuccessor B%d: invalidating slot %d", block.getId(), i); } } } if (savedStateCorrect) { // already processed block with correct inputState ! debug.log("processSuccessor B%d: previous visit already correct", block.getId()); } else { // must re-visit this block ! debug.log("processSuccessor B%d: must re-visit because input state changed", block.getId()); addToWorkList(block); } } else { // block was not processed before, so set initial inputState ! debug.log("processSuccessor B%d: initial visit", block.getId()); setStateForBlock(block, copy(inputState)); addToWorkList(block); } } static TraceInterval[] copy(TraceInterval[] inputState) { return inputState.clone(); } ! static void statePut(DebugContext debug, TraceInterval[] inputState, Value location, TraceInterval interval) { if (location != null && isRegister(location)) { Register reg = asRegister(location); int regNum = reg.number; if (interval != null) { ! debug.log("%s = v%d", reg, interval.operandNumber); } else if (inputState[regNum] != null) { ! debug.log("%s = null", reg); } inputState[regNum] = interval; } }
*** 211,220 **** --- 212,222 ---- return true; } void processOperations(AbstractBlockBase<?> block, final TraceInterval[] inputState) { ArrayList<LIRInstruction> ops = allocator.getLIR().getLIRforBlock(block); + DebugContext debug = allocator.getDebug(); InstructionValueConsumer useConsumer = new InstructionValueConsumer() { @Override public void visitValue(LIRInstruction op, Value operand, OperandMode mode, EnumSet<OperandFlag> flags) { // we skip spill moves inserted by the spill position optimization
*** 234,261 **** TraceInterval interval = intervalAt(asVariable(operand)); if (op.id() != -1) { interval = interval.getSplitChildAtOpId(op.id(), mode); } ! statePut(inputState, interval.location(), interval.splitParent()); } }; // visit all instructions of the block for (int i = 0; i < ops.size(); i++) { final LIRInstruction op = ops.get(i); ! if (Debug.isLogEnabled()) { ! Debug.log("%s", op.toStringWithIdPrefix()); } // check if input operands are correct op.visitEachInput(useConsumer); // invalidate all caller save registers at calls if (op.destroysCallerSavedRegisters()) { for (Register r : allocator.getRegisterAllocationConfig().getRegisterConfig().getCallerSaveRegisters()) { ! statePut(inputState, r.asValue(), null); } } op.visitEachAlive(useConsumer); // set temp operands (some operations use temp operands also as output operands, so // can't set them null) --- 236,263 ---- TraceInterval interval = intervalAt(asVariable(operand)); if (op.id() != -1) { interval = interval.getSplitChildAtOpId(op.id(), mode); } ! statePut(debug, inputState, interval.location(), interval.splitParent()); } }; // visit all instructions of the block for (int i = 0; i < ops.size(); i++) { final LIRInstruction op = ops.get(i); ! if (debug.isLogEnabled()) { ! debug.log("%s", op.toStringWithIdPrefix()); } // check if input operands are correct op.visitEachInput(useConsumer); // invalidate all caller save registers at calls if (op.destroysCallerSavedRegisters()) { for (Register r : allocator.getRegisterAllocationConfig().getRegisterConfig().getCallerSaveRegisters()) { ! statePut(debug, inputState, r.asValue(), null); } } op.visitEachAlive(useConsumer); // set temp operands (some operations use temp operands also as output operands, so // can't set them null)
src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/alloc/trace/lsra/RegisterVerifier.java
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