src/cpu/x86/vm/x86.ad

rev 8545 : SIMD: RFR(S): 8085932: Ideal Graph builds OK and the code is generated. .ad file is not correct yet.
rev 8711 : SIMD: CMoveVD - produces some code, but actually garbage in .ad file.
No reshaping in Matcher.
rev 8712 : SIMD: CMoveVD - .ad catches up CC code! The generating code still incorrect.
rev 8713 : SIMD: CMoveVD - .ad is "almost" good. need to make CC in codegen taken rightly from IdealGraph.
Also added (Windows only) an option to stop in debugger after compiled file has been printed.
See compile.cpp: WINDOWS_ONLY(if(method()->has_option("BreakAfterCompilation")) DebugBreak();)
rev 8714 : SIMD: CMoveVD - .ad is good (need to be tested).
SuperWord creates CMoveVDNode(cc, src1, src2, vt) and cc is a clone of the original Bool in CmpD.
rev 8734 : SIMD: OK for ">=", does NOT work for ">" (Computational ERROR: val(253369.89505687315) and val_gold(4573627.789285206) not equal.)
callValue = (callValue >= 0.0) ? callValue : 0;

val      = forCallValue(Sval, Xval, MuByT, VBySqrtT);
val_gold = forCallValue_gold(Sval, Xval, MuByT, VBySqrtT);
if (val != val_gold) {
rev 8877 : tests from repo commit
rev 8878 : SIMD: Added operand cmpOp_vcmppd. Tested on
callValue = (callValue > 0.0) ? callValue : 0;
and
callValue = (callValue >= 0.0) ? callValue : 0;
rev 8879 : SIMD: cleanup. Nearly good to push to Oracle.
rev 8884 : SIMD: cleanup, EOL fixing.
rev 9039 : Merge
rev 9041 : SIMD: removed cr flag from instruct vcmov4D_reg(vecY dst, vecY src1, vecY src2, immI8 cop, cmpOp_vcmppd copnd) %{
rev 9047 : SIMD: mberg review fixes
rev 9101 : Merge
rev 9104 : SIMD: moving operand cmpOp_vcmppd() from x86_64.ad to x86.ad
rev 9148 : SIMD: fixing NOT_PRODUCT printout and formatting "if-return"
rev 9150 : SIMD: fixing trace/debug printiout

@@ -1705,10 +1705,14 @@
     case Op_CompareAndSwapP:
 #endif
       if (!VM_Version::supports_cx8())
         ret_value = false;
       break;
+    case Op_CMoveVD:
+      if (UseAVX > 2)
+        ret_value = false;
+      break;
   }
 
   return ret_value;  // Per default match rules are supported.
 }
 

@@ -2087,10 +2091,33 @@
 
   format %{ %}
   interface(REG_INTER);
 %}
 
+// Comparison Code for FP conditional move
+operand cmpOp_vcmppd() %{
+  match(Bool);
+
+  predicate(n->as_Bool()->_test._test != BoolTest::overflow &&
+            n->as_Bool()->_test._test != BoolTest::no_overflow);
+  format %{ "" %}
+  interface(COND_INTER) %{
+    equal        (0x0, "eq");
+    less         (0x1, "lt");
+    less_equal   (0x2, "le");
+    not_equal    (0xC, "ne");
+    greater_equal(0xD, "ge");
+    greater      (0xE, "gt");
+    //TODO cannot compile (adlc breaks) without two next lines with error:
+    // x86_64.ad(13987) Syntax Error: :In operand cmpOp_vcmppd: Do not support this encode constant: ' %{
+    // equal' for overflow.
+    overflow     (0x20, "o");  // not really supported by the instruction
+    no_overflow  (0x21, "no"); // not really supported by the instruction
+  %}
+%}
+
+
 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
 
 // ============================================================================
 
 instruct ShouldNotReachHere() %{

@@ -7391,10 +7418,26 @@
     __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector_len);
   %}
   ins_pipe( pipe_slow );
 %}
 
+instruct vcmov4D_reg(vecY dst, vecY src1, vecY src2, immI8 cop, cmpOp_vcmppd copnd) %{
+  predicate(UseAVX > 0 && UseAVX < 3 && n->as_Vector()->length() == 4);
+  match(Set dst (CMoveVD (Binary copnd cop) (Binary src1 src2)));
+  effect(TEMP dst, USE src1, USE src2);
+  format %{ "cmppd.$copnd  $dst, $src1, $src2  ! vcmovevd, cond=$cop\n\t"
+            "vpblendd $dst,$src1,$src2,$dst ! vcmovevd\n\t"
+         %}
+  ins_encode %{
+    int vector_len = 1;
+    int cond = (Assembler::Condition)($copnd$$cmpcode);
+    __ cmppd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, cond, vector_len);
+    __ vpblendd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, $dst$$XMMRegister, vector_len);
+  %}
+  ins_pipe( pipe_slow );
+%}
+
 // --------------------------------- DIV --------------------------------------
 
 // Floats vector div
 instruct vdiv2F(vecD dst, vecD src) %{
   predicate(n->as_Vector()->length() == 2);