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src/cpu/x86/vm/templateTable_x86.cpp

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2546   transition(state, state);
2547 
2548   assert(_desc->calls_vm(),
2549          "inconsistent calls_vm information"); // call in remove_activation
2550 
2551   if (_desc->bytecode() == Bytecodes::_return_register_finalizer) {
2552     assert(state == vtos, "only valid state");
2553     Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax);
2554     __ movptr(robj, aaddress(0));
2555     __ load_klass(rdi, robj);
2556     __ movl(rdi, Address(rdi, Klass::access_flags_offset()));
2557     __ testl(rdi, JVM_ACC_HAS_FINALIZER);
2558     Label skip_register_finalizer;
2559     __ jcc(Assembler::zero, skip_register_finalizer);
2560 
2561     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj);
2562 
2563     __ bind(skip_register_finalizer);
2564   }
2565 





2566   // Narrow result if state is itos but result type is smaller.
2567   // Need to narrow in the return bytecode rather than in generate_return_entry
2568   // since compiled code callers expect the result to already be narrowed.
2569   if (state == itos) {
2570     __ narrow(rax);
2571   }
2572   __ remove_activation(state, rbcp);
2573 
2574   __ jmp(rbcp);
2575 }
2576 
2577 // ----------------------------------------------------------------------------
2578 // Volatile variables demand their effects be made known to all CPU's
2579 // in order.  Store buffers on most chips allow reads & writes to
2580 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode
2581 // without some kind of memory barrier (i.e., it's not sufficient that
2582 // the interpreter does not reorder volatile references, the hardware
2583 // also must not reorder them).
2584 //
2585 // According to the new Java Memory Model (JMM):




2546   transition(state, state);
2547 
2548   assert(_desc->calls_vm(),
2549          "inconsistent calls_vm information"); // call in remove_activation
2550 
2551   if (_desc->bytecode() == Bytecodes::_return_register_finalizer) {
2552     assert(state == vtos, "only valid state");
2553     Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax);
2554     __ movptr(robj, aaddress(0));
2555     __ load_klass(rdi, robj);
2556     __ movl(rdi, Address(rdi, Klass::access_flags_offset()));
2557     __ testl(rdi, JVM_ACC_HAS_FINALIZER);
2558     Label skip_register_finalizer;
2559     __ jcc(Assembler::zero, skip_register_finalizer);
2560 
2561     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj);
2562 
2563     __ bind(skip_register_finalizer);
2564   }
2565 
2566   // Explicitly reset last_sp, for handling special case in TemplateInterpreter::deopt_reexecute_entry
2567   if (state == vtos) {
2568     __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);
2569   }
2570 
2571   // Narrow result if state is itos but result type is smaller.
2572   // Need to narrow in the return bytecode rather than in generate_return_entry
2573   // since compiled code callers expect the result to already be narrowed.
2574   if (state == itos) {
2575     __ narrow(rax);
2576   }
2577   __ remove_activation(state, rbcp);
2578 
2579   __ jmp(rbcp);
2580 }
2581 
2582 // ----------------------------------------------------------------------------
2583 // Volatile variables demand their effects be made known to all CPU's
2584 // in order.  Store buffers on most chips allow reads & writes to
2585 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode
2586 // without some kind of memory barrier (i.e., it's not sufficient that
2587 // the interpreter does not reorder volatile references, the hardware
2588 // also must not reorder them).
2589 //
2590 // According to the new Java Memory Model (JMM):


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