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rev 2161 : [mq]: initial-intrinsification-changes
rev 2162 : [mq]: code-review-comments-vladimir
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--- old/src/cpu/x86/vm/c1_CodeStubs_x86.cpp
+++ new/src/cpu/x86/vm/c1_CodeStubs_x86.cpp
1 1 /*
2 2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 #include "precompiled.hpp"
26 26 #include "c1/c1_CodeStubs.hpp"
27 27 #include "c1/c1_FrameMap.hpp"
28 28 #include "c1/c1_LIRAssembler.hpp"
29 29 #include "c1/c1_MacroAssembler.hpp"
30 30 #include "c1/c1_Runtime1.hpp"
31 31 #include "nativeInst_x86.hpp"
32 32 #include "runtime/sharedRuntime.hpp"
33 33 #include "vmreg_x86.inline.hpp"
34 34 #ifndef SERIALGC
35 35 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
36 36 #endif
37 37
38 38
39 39 #define __ ce->masm()->
40 40
41 41 float ConversionStub::float_zero = 0.0;
42 42 double ConversionStub::double_zero = 0.0;
43 43
44 44 void ConversionStub::emit_code(LIR_Assembler* ce) {
45 45 __ bind(_entry);
46 46 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
47 47
48 48
49 49 if (input()->is_single_xmm()) {
50 50 __ comiss(input()->as_xmm_float_reg(),
51 51 ExternalAddress((address)&float_zero));
52 52 } else if (input()->is_double_xmm()) {
53 53 __ comisd(input()->as_xmm_double_reg(),
54 54 ExternalAddress((address)&double_zero));
55 55 } else {
56 56 LP64_ONLY(ShouldNotReachHere());
57 57 __ push(rax);
58 58 __ ftst();
59 59 __ fnstsw_ax();
60 60 __ sahf();
61 61 __ pop(rax);
62 62 }
63 63
64 64 Label NaN, do_return;
65 65 __ jccb(Assembler::parity, NaN);
66 66 __ jccb(Assembler::below, do_return);
67 67
68 68 // input is > 0 -> return maxInt
69 69 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
70 70 __ decrement(result()->as_register());
71 71 __ jmpb(do_return);
72 72
73 73 // input is NaN -> return 0
74 74 __ bind(NaN);
75 75 __ xorptr(result()->as_register(), result()->as_register());
76 76
77 77 __ bind(do_return);
78 78 __ jmp(_continuation);
79 79 }
80 80
81 81 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
82 82 __ bind(_entry);
83 83 ce->store_parameter(_method->as_register(), 1);
84 84 ce->store_parameter(_bci, 0);
85 85 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
86 86 ce->add_call_info_here(_info);
87 87 ce->verify_oop_map(_info);
88 88 __ jmp(_continuation);
89 89 }
90 90
91 91 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
92 92 bool throw_index_out_of_bounds_exception)
93 93 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
94 94 , _index(index)
95 95 {
96 96 assert(info != NULL, "must have info");
97 97 _info = new CodeEmitInfo(info);
98 98 }
99 99
100 100
101 101 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
102 102 __ bind(_entry);
103 103 // pass the array index on stack because all registers must be preserved
104 104 if (_index->is_cpu_register()) {
105 105 ce->store_parameter(_index->as_register(), 0);
106 106 } else {
107 107 ce->store_parameter(_index->as_jint(), 0);
108 108 }
109 109 Runtime1::StubID stub_id;
110 110 if (_throw_index_out_of_bounds_exception) {
111 111 stub_id = Runtime1::throw_index_exception_id;
112 112 } else {
113 113 stub_id = Runtime1::throw_range_check_failed_id;
114 114 }
115 115 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
116 116 ce->add_call_info_here(_info);
117 117 debug_only(__ should_not_reach_here());
118 118 }
119 119
120 120
121 121 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
122 122 if (_offset != -1) {
123 123 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
124 124 }
125 125 __ bind(_entry);
126 126 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
127 127 ce->add_call_info_here(_info);
128 128 debug_only(__ should_not_reach_here());
129 129 }
130 130
131 131
132 132 // Implementation of NewInstanceStub
133 133
134 134 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
135 135 _result = result;
136 136 _klass = klass;
137 137 _klass_reg = klass_reg;
138 138 _info = new CodeEmitInfo(info);
139 139 assert(stub_id == Runtime1::new_instance_id ||
140 140 stub_id == Runtime1::fast_new_instance_id ||
141 141 stub_id == Runtime1::fast_new_instance_init_check_id,
142 142 "need new_instance id");
143 143 _stub_id = stub_id;
144 144 }
145 145
146 146
147 147 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
148 148 assert(__ rsp_offset() == 0, "frame size should be fixed");
149 149 __ bind(_entry);
150 150 __ movptr(rdx, _klass_reg->as_register());
151 151 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
152 152 ce->add_call_info_here(_info);
153 153 ce->verify_oop_map(_info);
154 154 assert(_result->as_register() == rax, "result must in rax,");
155 155 __ jmp(_continuation);
156 156 }
157 157
158 158
159 159 // Implementation of NewTypeArrayStub
160 160
161 161 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
162 162 _klass_reg = klass_reg;
163 163 _length = length;
164 164 _result = result;
165 165 _info = new CodeEmitInfo(info);
166 166 }
167 167
168 168
169 169 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
170 170 assert(__ rsp_offset() == 0, "frame size should be fixed");
171 171 __ bind(_entry);
172 172 assert(_length->as_register() == rbx, "length must in rbx,");
173 173 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
174 174 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
175 175 ce->add_call_info_here(_info);
176 176 ce->verify_oop_map(_info);
177 177 assert(_result->as_register() == rax, "result must in rax,");
178 178 __ jmp(_continuation);
179 179 }
180 180
181 181
182 182 // Implementation of NewObjectArrayStub
183 183
184 184 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
185 185 _klass_reg = klass_reg;
186 186 _result = result;
187 187 _length = length;
188 188 _info = new CodeEmitInfo(info);
189 189 }
190 190
191 191
192 192 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
193 193 assert(__ rsp_offset() == 0, "frame size should be fixed");
194 194 __ bind(_entry);
195 195 assert(_length->as_register() == rbx, "length must in rbx,");
196 196 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
197 197 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
198 198 ce->add_call_info_here(_info);
199 199 ce->verify_oop_map(_info);
200 200 assert(_result->as_register() == rax, "result must in rax,");
201 201 __ jmp(_continuation);
202 202 }
203 203
204 204
205 205 // Implementation of MonitorAccessStubs
206 206
207 207 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
208 208 : MonitorAccessStub(obj_reg, lock_reg)
209 209 {
210 210 _info = new CodeEmitInfo(info);
211 211 }
212 212
213 213
214 214 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
215 215 assert(__ rsp_offset() == 0, "frame size should be fixed");
216 216 __ bind(_entry);
217 217 ce->store_parameter(_obj_reg->as_register(), 1);
218 218 ce->store_parameter(_lock_reg->as_register(), 0);
219 219 Runtime1::StubID enter_id;
220 220 if (ce->compilation()->has_fpu_code()) {
221 221 enter_id = Runtime1::monitorenter_id;
222 222 } else {
223 223 enter_id = Runtime1::monitorenter_nofpu_id;
224 224 }
225 225 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
226 226 ce->add_call_info_here(_info);
227 227 ce->verify_oop_map(_info);
228 228 __ jmp(_continuation);
229 229 }
230 230
231 231
232 232 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
233 233 __ bind(_entry);
234 234 if (_compute_lock) {
235 235 // lock_reg was destroyed by fast unlocking attempt => recompute it
236 236 ce->monitor_address(_monitor_ix, _lock_reg);
237 237 }
238 238 ce->store_parameter(_lock_reg->as_register(), 0);
239 239 // note: non-blocking leaf routine => no call info needed
240 240 Runtime1::StubID exit_id;
241 241 if (ce->compilation()->has_fpu_code()) {
242 242 exit_id = Runtime1::monitorexit_id;
243 243 } else {
244 244 exit_id = Runtime1::monitorexit_nofpu_id;
245 245 }
246 246 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
247 247 __ jmp(_continuation);
248 248 }
249 249
250 250
251 251 // Implementation of patching:
252 252 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
253 253 // - Replace original code with a call to the stub
254 254 // At Runtime:
255 255 // - call to stub, jump to runtime
256 256 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
257 257 // - in runtime: after initializing class, restore original code, reexecute instruction
258 258
259 259 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
260 260
261 261 void PatchingStub::align_patch_site(MacroAssembler* masm) {
262 262 // We're patching a 5-7 byte instruction on intel and we need to
263 263 // make sure that we don't see a piece of the instruction. It
264 264 // appears mostly impossible on Intel to simply invalidate other
265 265 // processors caches and since they may do aggressive prefetch it's
266 266 // very hard to make a guess about what code might be in the icache.
267 267 // Force the instruction to be double word aligned so that it
268 268 // doesn't span a cache line.
269 269 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
270 270 }
271 271
272 272 void PatchingStub::emit_code(LIR_Assembler* ce) {
273 273 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
274 274
275 275 Label call_patch;
276 276
277 277 // static field accesses have special semantics while the class
278 278 // initializer is being run so we emit a test which can be used to
279 279 // check that this code is being executed by the initializing
280 280 // thread.
281 281 address being_initialized_entry = __ pc();
282 282 if (CommentedAssembly) {
283 283 __ block_comment(" patch template");
284 284 }
285 285 if (_id == load_klass_id) {
286 286 // produce a copy of the load klass instruction for use by the being initialized case
287 287 address start = __ pc();
288 288 jobject o = NULL;
289 289 __ movoop(_obj, o);
290 290 #ifdef ASSERT
291 291 for (int i = 0; i < _bytes_to_copy; i++) {
292 292 address ptr = (address)(_pc_start + i);
293 293 int a_byte = (*ptr) & 0xFF;
294 294 assert(a_byte == *start++, "should be the same code");
295 295 }
296 296 #endif
297 297 } else {
298 298 // make a copy the code which is going to be patched.
299 299 for ( int i = 0; i < _bytes_to_copy; i++) {
300 300 address ptr = (address)(_pc_start + i);
301 301 int a_byte = (*ptr) & 0xFF;
302 302 __ a_byte (a_byte);
303 303 *ptr = 0x90; // make the site look like a nop
304 304 }
305 305 }
306 306
307 307 address end_of_patch = __ pc();
308 308 int bytes_to_skip = 0;
309 309 if (_id == load_klass_id) {
310 310 int offset = __ offset();
311 311 if (CommentedAssembly) {
312 312 __ block_comment(" being_initialized check");
313 313 }
314 314 assert(_obj != noreg, "must be a valid register");
315 315 Register tmp = rax;
316 316 if (_obj == tmp) tmp = rbx;
317 317 __ push(tmp);
318 318 __ get_thread(tmp);
319 319 __ cmpptr(tmp, Address(_obj, instanceKlass::init_thread_offset_in_bytes() + sizeof(klassOopDesc)));
320 320 __ pop(tmp);
321 321 __ jcc(Assembler::notEqual, call_patch);
322 322
323 323 // access_field patches may execute the patched code before it's
324 324 // copied back into place so we need to jump back into the main
325 325 // code of the nmethod to continue execution.
326 326 __ jmp(_patch_site_continuation);
327 327
328 328 // make sure this extra code gets skipped
329 329 bytes_to_skip += __ offset() - offset;
330 330 }
331 331 if (CommentedAssembly) {
332 332 __ block_comment("patch data encoded as movl");
333 333 }
334 334 // Now emit the patch record telling the runtime how to find the
335 335 // pieces of the patch. We only need 3 bytes but for readability of
336 336 // the disassembly we make the data look like a movl reg, imm32,
337 337 // which requires 5 bytes
338 338 int sizeof_patch_record = 5;
339 339 bytes_to_skip += sizeof_patch_record;
340 340
341 341 // emit the offsets needed to find the code to patch
342 342 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
343 343
344 344 __ a_byte(0xB8);
345 345 __ a_byte(0);
346 346 __ a_byte(being_initialized_entry_offset);
347 347 __ a_byte(bytes_to_skip);
348 348 __ a_byte(_bytes_to_copy);
349 349 address patch_info_pc = __ pc();
350 350 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
351 351
352 352 address entry = __ pc();
353 353 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
354 354 address target = NULL;
355 355 switch (_id) {
356 356 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
357 357 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
358 358 default: ShouldNotReachHere();
359 359 }
360 360 __ bind(call_patch);
361 361
362 362 if (CommentedAssembly) {
363 363 __ block_comment("patch entry point");
364 364 }
365 365 __ call(RuntimeAddress(target));
366 366 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
367 367 ce->add_call_info_here(_info);
368 368 int jmp_off = __ offset();
369 369 __ jmp(_patch_site_entry);
370 370 // Add enough nops so deoptimization can overwrite the jmp above with a call
371 371 // and not destroy the world.
372 372 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
373 373 __ nop();
374 374 }
375 375 if (_id == load_klass_id) {
376 376 CodeSection* cs = __ code_section();
377 377 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
378 378 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, relocInfo::oop_type, relocInfo::none);
379 379 }
380 380 }
381 381
382 382
383 383 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
384 384 __ bind(_entry);
385 385 __ call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack_with_reexecution()));
386 386 ce->add_call_info_here(_info);
387 387 debug_only(__ should_not_reach_here());
388 388 }
389 389
390 390
391 391 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
392 392 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
393 393 __ bind(_entry);
394 394 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
395 395 ce->add_call_info_here(_info);
396 396 debug_only(__ should_not_reach_here());
397 397 }
398 398
399 399
400 400 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
401 401 assert(__ rsp_offset() == 0, "frame size should be fixed");
402 402
403 403 __ bind(_entry);
404 404 // pass the object on stack because all registers must be preserved
405 405 if (_obj->is_cpu_register()) {
406 406 ce->store_parameter(_obj->as_register(), 0);
407 407 }
408 408 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
409 409 ce->add_call_info_here(_info);
410 410 debug_only(__ should_not_reach_here());
411 411 }
412 412
413 413
414 414 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
415 415 //---------------slow case: call to native-----------------
416 416 __ bind(_entry);
417 417 // Figure out where the args should go
418 418 // This should really convert the IntrinsicID to the methodOop and signature
419 419 // but I don't know how to do that.
420 420 //
421 421 VMRegPair args[5];
422 422 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
423 423 SharedRuntime::java_calling_convention(signature, args, 5, true);
424 424
425 425 // push parameters
426 426 // (src, src_pos, dest, destPos, length)
427 427 Register r[5];
428 428 r[0] = src()->as_register();
429 429 r[1] = src_pos()->as_register();
430 430 r[2] = dst()->as_register();
431 431 r[3] = dst_pos()->as_register();
432 432 r[4] = length()->as_register();
433 433
434 434 // next registers will get stored on the stack
435 435 for (int i = 0; i < 5 ; i++ ) {
436 436 VMReg r_1 = args[i].first();
437 437 if (r_1->is_stack()) {
438 438 int st_off = r_1->reg2stack() * wordSize;
439 439 __ movptr (Address(rsp, st_off), r[i]);
440 440 } else {
441 441 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
442 442 }
443 443 }
444 444
445 445 ce->align_call(lir_static_call);
446 446
447 447 ce->emit_static_call_stub();
448 448 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
449 449 relocInfo::static_call_type);
450 450 __ call(resolve);
451 451 ce->add_call_info_here(info());
452 452
453 453 #ifndef PRODUCT
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454 454 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
455 455 #endif
456 456
457 457 __ jmp(_continuation);
458 458 }
459 459
460 460 /////////////////////////////////////////////////////////////////////////////
461 461 #ifndef SERIALGC
462 462
463 463 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
464 -
465 - // At this point we know that marking is in progress
464 + // At this point we know that marking is in progress.
465 + // If do_load() is true then we have to emit the
466 + // load of the previous value; otherwise it has already
467 + // been loaded into _pre_val.
466 468
467 469 __ bind(_entry);
468 470 assert(pre_val()->is_register(), "Precondition.");
469 471
470 472 Register pre_val_reg = pre_val()->as_register();
471 473
472 - ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
474 + if (do_load()) {
475 + ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
476 + }
473 477
474 478 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
475 479 __ jcc(Assembler::equal, _continuation);
476 480 ce->store_parameter(pre_val()->as_register(), 0);
477 481 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
478 482 __ jmp(_continuation);
479 483
480 484 }
481 485
482 486 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
483 487
484 488 jbyte* G1PostBarrierStub::byte_map_base_slow() {
485 489 BarrierSet* bs = Universe::heap()->barrier_set();
486 490 assert(bs->is_a(BarrierSet::G1SATBCTLogging),
487 491 "Must be if we're using this.");
488 492 return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
489 493 }
490 494
491 495 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
492 496 __ bind(_entry);
493 497 assert(addr()->is_register(), "Precondition.");
494 498 assert(new_val()->is_register(), "Precondition.");
495 499 Register new_val_reg = new_val()->as_register();
496 500 __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
497 501 __ jcc(Assembler::equal, _continuation);
498 502 ce->store_parameter(addr()->as_pointer_register(), 0);
499 503 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
500 504 __ jmp(_continuation);
501 505 }
502 506
503 507 #endif // SERIALGC
504 508 /////////////////////////////////////////////////////////////////////////////
505 509
506 510 #undef __
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