src/cpu/x86/vm/assembler_x86.hpp

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rev 2237 : [mq]: initial-intrinsification-changes
rev 2238 : [mq]: code-review-comments-vladimir

*** 1442,1451 **** --- 1442,1452 ---- // on arguments should also go in here. class MacroAssembler: public Assembler { friend class LIR_Assembler; friend class Runtime1; // as_Address() + protected: Address as_Address(AddressLiteral adr); Address as_Address(ArrayAddress adr);
*** 1663,1687 **** // Stores void store_check(Register obj); // store check for obj - register is destroyed afterwards void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed) void g1_write_barrier_pre(Register obj, ! #ifndef _LP64 Register thread, - #endif Register tmp, ! Register tmp2, ! bool tosca_live); void g1_write_barrier_post(Register store_addr, Register new_val, - #ifndef _LP64 Register thread, - #endif Register tmp, Register tmp2); // split store_check(Register obj) to enhance instruction interleaving void store_check_part_1(Register obj); void store_check_part_2(Register obj); --- 1664,1689 ---- // Stores void store_check(Register obj); // store check for obj - register is destroyed afterwards void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed) + #ifndef SERIALGC + void g1_write_barrier_pre(Register obj, ! Register pre_val, Register thread, Register tmp, ! bool tosca_live, ! bool expand_call); ! void g1_write_barrier_post(Register store_addr, Register new_val, Register thread, Register tmp, Register tmp2); + #endif // SERIALGC // split store_check(Register obj) to enhance instruction interleaving void store_check_part_1(Register obj); void store_check_part_2(Register obj);