309 __ cmp(lir_cond_belowEqual, length.result(), index.result());
310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
311 } else {
312 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
313 // range_check also does the null check
314 null_check_info = NULL;
315 }
316 }
317
318 if (GenerateArrayStoreCheck && needs_store_check) {
319 LIR_Opr tmp1 = new_register(objectType);
320 LIR_Opr tmp2 = new_register(objectType);
321 LIR_Opr tmp3 = new_register(objectType);
322
323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
325 }
326
327 if (obj_store) {
328 // Needs GC write barriers.
329 pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
330 __ move(value.result(), array_addr, null_check_info);
331 // Seems to be a precise
332 post_barrier(LIR_OprFact::address(array_addr), value.result());
333 } else {
334 __ move(value.result(), array_addr, null_check_info);
335 }
336 }
337
338
339 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
340 assert(x->is_pinned(),"");
341 LIRItem obj(x->obj(), this);
342 obj.load_item();
343
344 set_no_result(x);
345
346 // "lock" stores the address of the monitor stack slot, so this is not an oop
347 LIR_Opr lock = new_register(T_INT);
348 // Need a scratch register for biased locking on x86
349 LIR_Opr scratch = LIR_OprFact::illegalOpr;
777 ShouldNotReachHere();
778 }
779
780 LIR_Opr addr = new_pointer_register();
781 LIR_Address* a;
782 if(offset.result()->is_constant()) {
783 a = new LIR_Address(obj.result(),
784 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()),
785 as_BasicType(type));
786 } else {
787 a = new LIR_Address(obj.result(),
788 offset.result(),
789 LIR_Address::times_1,
790 0,
791 as_BasicType(type));
792 }
793 __ leal(LIR_OprFact::address(a), addr);
794
795 if (type == objectType) { // Write-barrier needed for Object fields.
796 // Do the pre-write barrier, if any.
797 pre_barrier(addr, false, NULL);
798 }
799
800 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
801 if (type == objectType)
802 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
803 else if (type == intType)
804 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
805 else if (type == longType)
806 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
807 else {
808 ShouldNotReachHere();
809 }
810
811 // generate conditional move of boolean result
812 LIR_Opr result = rlock_result(x);
813 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
814 result, as_BasicType(type));
815 if (type == objectType) { // Write-barrier needed for Object fields.
816 // Seems to be precise
817 post_barrier(addr, val.result());
1322 __ load(addr, dst);
1323 }
1324 }
1325
1326
1327 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1328 BasicType type, bool is_volatile) {
1329 if (is_volatile && type == T_LONG) {
1330 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1331 LIR_Opr tmp = new_register(T_DOUBLE);
1332 LIR_Opr spill = new_register(T_DOUBLE);
1333 set_vreg_flag(spill, must_start_in_memory);
1334 __ move(data, spill);
1335 __ move(spill, tmp);
1336 __ move(tmp, addr);
1337 } else {
1338 LIR_Address* addr = new LIR_Address(src, offset, type);
1339 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1340 if (is_obj) {
1341 // Do the pre-write barrier, if any.
1342 pre_barrier(LIR_OprFact::address(addr), false, NULL);
1343 __ move(data, addr);
1344 assert(src->is_register(), "must be register");
1345 // Seems to be a precise address
1346 post_barrier(LIR_OprFact::address(addr), data);
1347 } else {
1348 __ move(data, addr);
1349 }
1350 }
1351 }
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309 __ cmp(lir_cond_belowEqual, length.result(), index.result());
310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
311 } else {
312 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
313 // range_check also does the null check
314 null_check_info = NULL;
315 }
316 }
317
318 if (GenerateArrayStoreCheck && needs_store_check) {
319 LIR_Opr tmp1 = new_register(objectType);
320 LIR_Opr tmp2 = new_register(objectType);
321 LIR_Opr tmp3 = new_register(objectType);
322
323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
325 }
326
327 if (obj_store) {
328 // Needs GC write barriers.
329 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
330 true /* do_load */, false /* patch */, NULL);
331 __ move(value.result(), array_addr, null_check_info);
332 // Seems to be a precise
333 post_barrier(LIR_OprFact::address(array_addr), value.result());
334 } else {
335 __ move(value.result(), array_addr, null_check_info);
336 }
337 }
338
339
340 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
341 assert(x->is_pinned(),"");
342 LIRItem obj(x->obj(), this);
343 obj.load_item();
344
345 set_no_result(x);
346
347 // "lock" stores the address of the monitor stack slot, so this is not an oop
348 LIR_Opr lock = new_register(T_INT);
349 // Need a scratch register for biased locking on x86
350 LIR_Opr scratch = LIR_OprFact::illegalOpr;
778 ShouldNotReachHere();
779 }
780
781 LIR_Opr addr = new_pointer_register();
782 LIR_Address* a;
783 if(offset.result()->is_constant()) {
784 a = new LIR_Address(obj.result(),
785 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()),
786 as_BasicType(type));
787 } else {
788 a = new LIR_Address(obj.result(),
789 offset.result(),
790 LIR_Address::times_1,
791 0,
792 as_BasicType(type));
793 }
794 __ leal(LIR_OprFact::address(a), addr);
795
796 if (type == objectType) { // Write-barrier needed for Object fields.
797 // Do the pre-write barrier, if any.
798 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
799 true /* do_load */, false /* patch */, NULL);
800 }
801
802 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
803 if (type == objectType)
804 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
805 else if (type == intType)
806 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
807 else if (type == longType)
808 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
809 else {
810 ShouldNotReachHere();
811 }
812
813 // generate conditional move of boolean result
814 LIR_Opr result = rlock_result(x);
815 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
816 result, as_BasicType(type));
817 if (type == objectType) { // Write-barrier needed for Object fields.
818 // Seems to be precise
819 post_barrier(addr, val.result());
1324 __ load(addr, dst);
1325 }
1326 }
1327
1328
1329 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1330 BasicType type, bool is_volatile) {
1331 if (is_volatile && type == T_LONG) {
1332 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1333 LIR_Opr tmp = new_register(T_DOUBLE);
1334 LIR_Opr spill = new_register(T_DOUBLE);
1335 set_vreg_flag(spill, must_start_in_memory);
1336 __ move(data, spill);
1337 __ move(spill, tmp);
1338 __ move(tmp, addr);
1339 } else {
1340 LIR_Address* addr = new LIR_Address(src, offset, type);
1341 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1342 if (is_obj) {
1343 // Do the pre-write barrier, if any.
1344 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1345 true /* do_load */, false /* patch */, NULL);
1346 __ move(data, addr);
1347 assert(src->is_register(), "must be register");
1348 // Seems to be a precise address
1349 post_barrier(LIR_OprFact::address(addr), data);
1350 } else {
1351 __ move(data, addr);
1352 }
1353 }
1354 }
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