1 /*
   2  * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/vtableStubs.hpp"
  31 #include "interpreter/interpreter.hpp"
  32 #include "memory/resourceArea.hpp"
  33 #include "oops/compiledICHolder.hpp"
  34 #include "prims/jvmtiRedefineClassesTrace.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 #include "runtime/vframeArray.hpp"
  37 #include "vmreg_x86.inline.hpp"
  38 #ifdef COMPILER1
  39 #include "c1/c1_Runtime1.hpp"
  40 #endif
  41 #ifdef COMPILER2
  42 #include "opto/runtime.hpp"
  43 #endif
  44 
  45 #define __ masm->
  46 
  47 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  48 
  49 class RegisterSaver {
  50   // Capture info about frame layout
  51 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  52   enum layout {
  53                 fpu_state_off = 0,
  54                 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
  55                 st0_off, st0H_off,
  56                 st1_off, st1H_off,
  57                 st2_off, st2H_off,
  58                 st3_off, st3H_off,
  59                 st4_off, st4H_off,
  60                 st5_off, st5H_off,
  61                 st6_off, st6H_off,
  62                 st7_off, st7H_off,
  63                 xmm_off,
  64                 DEF_XMM_OFFS(0),
  65                 DEF_XMM_OFFS(1),
  66                 DEF_XMM_OFFS(2),
  67                 DEF_XMM_OFFS(3),
  68                 DEF_XMM_OFFS(4),
  69                 DEF_XMM_OFFS(5),
  70                 DEF_XMM_OFFS(6),
  71                 DEF_XMM_OFFS(7),
  72                 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
  73                 rdi_off,
  74                 rsi_off,
  75                 ignore_off,  // extra copy of rbp,
  76                 rsp_off,
  77                 rbx_off,
  78                 rdx_off,
  79                 rcx_off,
  80                 rax_off,
  81                 // The frame sender code expects that rbp will be in the "natural" place and
  82                 // will override any oopMap setting for it. We must therefore force the layout
  83                 // so that it agrees with the frame sender code.
  84                 rbp_off,
  85                 return_off,      // slot for return address
  86                 reg_save_size };
  87   enum { FPU_regs_live = flags_off - fpu_state_end };
  88 
  89   public:
  90 
  91   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
  92                                      int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
  93   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
  94 
  95   static int rax_offset() { return rax_off; }
  96   static int rbx_offset() { return rbx_off; }
  97 
  98   // Offsets into the register save area
  99   // Used by deoptimization when it is managing result register
 100   // values on its own
 101 
 102   static int raxOffset(void) { return rax_off; }
 103   static int rdxOffset(void) { return rdx_off; }
 104   static int rbxOffset(void) { return rbx_off; }
 105   static int xmm0Offset(void) { return xmm0_off; }
 106   // This really returns a slot in the fp save area, which one is not important
 107   static int fpResultOffset(void) { return st0_off; }
 108 
 109   // During deoptimization only the result register need to be restored
 110   // all the other values have already been extracted.
 111 
 112   static void restore_result_registers(MacroAssembler* masm);
 113 
 114 };
 115 
 116 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
 117                                            int* total_frame_words, bool verify_fpu, bool save_vectors) {
 118   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 119   int ymm_bytes = num_xmm_regs * 16;
 120   int zmm_bytes = num_xmm_regs * 32;
 121 #ifdef COMPILER2
 122   if (save_vectors) {
 123     assert(UseAVX > 0, "up to 512bit vectors are supported with EVEX");
 124     assert(MaxVectorSize <= 64, "up to 512bit vectors are supported now");
 125     // Save upper half of YMM registers
 126     int vect_bytes = ymm_bytes;
 127     if (UseAVX > 2) {
 128       // Save upper half of ZMM registers as well
 129       vect_bytes += zmm_bytes;
 130     }
 131     additional_frame_words += vect_bytes / wordSize;
 132   }
 133 #else
 134   assert(!save_vectors, "vectors are generated only by C2");
 135 #endif
 136   int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
 137   int frame_words = frame_size_in_bytes / wordSize;
 138   *total_frame_words = frame_words;
 139 
 140   assert(FPUStateSizeInWords == 27, "update stack layout");
 141 
 142   // save registers, fpu state, and flags
 143   // We assume caller has already has return address slot on the stack
 144   // We push epb twice in this sequence because we want the real rbp,
 145   // to be under the return like a normal enter and we want to use pusha
 146   // We push by hand instead of pusing push
 147   __ enter();
 148   __ pusha();
 149   __ pushf();
 150   __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
 151   __ push_FPU_state();          // Save FPU state & init
 152 
 153   if (verify_fpu) {
 154     // Some stubs may have non standard FPU control word settings so
 155     // only check and reset the value when it required to be the
 156     // standard value.  The safepoint blob in particular can be used
 157     // in methods which are using the 24 bit control word for
 158     // optimized float math.
 159 
 160 #ifdef ASSERT
 161     // Make sure the control word has the expected value
 162     Label ok;
 163     __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 164     __ jccb(Assembler::equal, ok);
 165     __ stop("corrupted control word detected");
 166     __ bind(ok);
 167 #endif
 168 
 169     // Reset the control word to guard against exceptions being unmasked
 170     // since fstp_d can cause FPU stack underflow exceptions.  Write it
 171     // into the on stack copy and then reload that to make sure that the
 172     // current and future values are correct.
 173     __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 174   }
 175 
 176   __ frstor(Address(rsp, 0));
 177   if (!verify_fpu) {
 178     // Set the control word so that exceptions are masked for the
 179     // following code.
 180     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
 181   }
 182 
 183   int off = st0_off;
 184   int delta = st1_off - off;
 185 
 186   // Save the FPU registers in de-opt-able form
 187   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 188     __ fstp_d(Address(rsp, off*wordSize));
 189     off += delta;
 190   }
 191 
 192   off = xmm0_off;
 193   delta = xmm1_off - off;
 194   if(UseSSE == 1) {
 195     // Save the XMM state
 196     for (int n = 0; n < num_xmm_regs; n++) {
 197       __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
 198       off += delta;
 199     }
 200   } else if(UseSSE >= 2) {
 201     // Save whole 128bit (16 bytes) XMM registers
 202     for (int n = 0; n < num_xmm_regs; n++) {
 203       __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
 204       off += delta;
 205     }
 206   }
 207 
 208   if (save_vectors) {
 209     __ subptr(rsp, ymm_bytes);
 210     // Save upper half of YMM registers
 211     for (int n = 0; n < num_xmm_regs; n++) {
 212       __ vextractf128h(Address(rsp, n*16), as_XMMRegister(n));
 213     }
 214     if (UseAVX > 2) {
 215       __ subptr(rsp, zmm_bytes);
 216       // Save upper half of ZMM registers
 217       for (int n = 0; n < num_xmm_regs; n++) {
 218         __ vextractf64x4h(Address(rsp, n*32), as_XMMRegister(n), 1);
 219       }
 220     }
 221   }
 222 
 223   // Set an oopmap for the call site.  This oopmap will map all
 224   // oop-registers and debug-info registers as callee-saved.  This
 225   // will allow deoptimization at this safepoint to find all possible
 226   // debug-info recordings, as well as let GC find all oops.
 227 
 228   OopMapSet *oop_maps = new OopMapSet();
 229   OopMap* map =  new OopMap( frame_words, 0 );
 230 
 231 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
 232 #define NEXTREG(x) (x)->as_VMReg()->next()
 233 
 234   map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
 235   map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
 236   map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
 237   map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
 238   // rbp, location is known implicitly, no oopMap
 239   map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
 240   map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
 241   // %%% This is really a waste but we'll keep things as they were for now for the upper component
 242   off = st0_off;
 243   delta = st1_off - off;
 244   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 245     FloatRegister freg_name = as_FloatRegister(n);
 246     map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
 247     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
 248     off += delta;
 249   }
 250   off = xmm0_off;
 251   delta = xmm1_off - off;
 252   for (int n = 0; n < num_xmm_regs; n++) {
 253     XMMRegister xmm_name = as_XMMRegister(n);
 254     map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
 255     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
 256     off += delta;
 257   }
 258 #undef NEXTREG
 259 #undef STACK_OFFSET
 260 
 261   return map;
 262 }
 263 
 264 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 265   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 266   int ymm_bytes = num_xmm_regs * 16;
 267   int zmm_bytes = num_xmm_regs * 32;
 268   // Recover XMM & FPU state
 269   int additional_frame_bytes = 0;
 270 #ifdef COMPILER2
 271   if (restore_vectors) {
 272     assert(UseAVX > 0, "up to 512bit vectors are supported with EVEX");
 273     assert(MaxVectorSize <= 64, "up to 512bit vectors are supported now");
 274     // Save upper half of YMM registers
 275     additional_frame_bytes = ymm_bytes;
 276     if (UseAVX > 2) {
 277       // Save upper half of ZMM registers as well
 278       additional_frame_bytes += zmm_bytes;
 279     }
 280   }
 281 #else
 282   assert(!restore_vectors, "vectors are generated only by C2");
 283 #endif
 284 
 285   int off = xmm0_off;
 286   int delta = xmm1_off - off;
 287 
 288   if (UseSSE == 1) {
 289     // Restore XMM registers
 290     assert(additional_frame_bytes == 0, "");
 291     for (int n = 0; n < num_xmm_regs; n++) {
 292       __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
 293       off += delta;
 294     }
 295   } else if (UseSSE >= 2) {
 296     // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
 297     // ZMM because the movdqu instruction zeros the upper part of the XMM register.
 298     for (int n = 0; n < num_xmm_regs; n++) {
 299       __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
 300       off += delta;
 301     }
 302   }
 303 
 304   if (restore_vectors) {
 305     if (UseAVX > 2) {
 306       // Restore upper half of ZMM registers.
 307       for (int n = 0; n < num_xmm_regs; n++) {
 308         __ vinsertf64x4h(as_XMMRegister(n), Address(rsp, n*32), 1);
 309       }
 310       __ addptr(rsp, zmm_bytes);
 311     }
 312     // Restore upper half of YMM registers.
 313     for (int n = 0; n < num_xmm_regs; n++) {
 314       __ vinsertf128h(as_XMMRegister(n), Address(rsp, n*16));
 315     }
 316     __ addptr(rsp, ymm_bytes);
 317   }
 318 
 319   __ pop_FPU_state();
 320   __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
 321 
 322   __ popf();
 323   __ popa();
 324   // Get the rbp, described implicitly by the frame sender code (no oopMap)
 325   __ pop(rbp);
 326 }
 327 
 328 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 329 
 330   // Just restore result register. Only used by deoptimization. By
 331   // now any callee save register that needs to be restore to a c2
 332   // caller of the deoptee has been extracted into the vframeArray
 333   // and will be stuffed into the c2i adapter we create for later
 334   // restoration so only result registers need to be restored here.
 335   //
 336 
 337   __ frstor(Address(rsp, 0));      // Restore fpu state
 338 
 339   // Recover XMM & FPU state
 340   if( UseSSE == 1 ) {
 341     __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
 342   } else if( UseSSE >= 2 ) {
 343     __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
 344   }
 345   __ movptr(rax, Address(rsp, rax_off*wordSize));
 346   __ movptr(rdx, Address(rsp, rdx_off*wordSize));
 347   // Pop all of the register save are off the stack except the return address
 348   __ addptr(rsp, return_off * wordSize);
 349 }
 350 
 351 // Is vector's size (in bytes) bigger than a size saved by default?
 352 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
 353 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
 354 bool SharedRuntime::is_wide_vector(int size) {
 355   return size > 16;
 356 }
 357 
 358 // The java_calling_convention describes stack locations as ideal slots on
 359 // a frame with no abi restrictions. Since we must observe abi restrictions
 360 // (like the placement of the register window) the slots must be biased by
 361 // the following value.
 362 static int reg2offset_in(VMReg r) {
 363   // Account for saved rbp, and return address
 364   // This should really be in_preserve_stack_slots
 365   return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
 366 }
 367 
 368 static int reg2offset_out(VMReg r) {
 369   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 370 }
 371 
 372 // ---------------------------------------------------------------------------
 373 // Read the array of BasicTypes from a signature, and compute where the
 374 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 375 // quantities.  Values less than SharedInfo::stack0 are registers, those above
 376 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 377 // as framesizes are fixed.
 378 // VMRegImpl::stack0 refers to the first slot 0(sp).
 379 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 380 // up to RegisterImpl::number_of_registers) are the 32-bit
 381 // integer registers.
 382 
 383 // Pass first two oop/int args in registers ECX and EDX.
 384 // Pass first two float/double args in registers XMM0 and XMM1.
 385 // Doubles have precedence, so if you pass a mix of floats and doubles
 386 // the doubles will grab the registers before the floats will.
 387 
 388 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 389 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 390 // units regardless of build. Of course for i486 there is no 64 bit build
 391 
 392 
 393 // ---------------------------------------------------------------------------
 394 // The compiled Java calling convention.
 395 // Pass first two oop/int args in registers ECX and EDX.
 396 // Pass first two float/double args in registers XMM0 and XMM1.
 397 // Doubles have precedence, so if you pass a mix of floats and doubles
 398 // the doubles will grab the registers before the floats will.
 399 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 400                                            VMRegPair *regs,
 401                                            int total_args_passed,
 402                                            int is_outgoing) {
 403   uint    stack = 0;          // Starting stack position for args on stack
 404 
 405 
 406   // Pass first two oop/int args in registers ECX and EDX.
 407   uint reg_arg0 = 9999;
 408   uint reg_arg1 = 9999;
 409 
 410   // Pass first two float/double args in registers XMM0 and XMM1.
 411   // Doubles have precedence, so if you pass a mix of floats and doubles
 412   // the doubles will grab the registers before the floats will.
 413   // CNC - TURNED OFF FOR non-SSE.
 414   //       On Intel we have to round all doubles (and most floats) at
 415   //       call sites by storing to the stack in any case.
 416   // UseSSE=0 ==> Don't Use ==> 9999+0
 417   // UseSSE=1 ==> Floats only ==> 9999+1
 418   // UseSSE>=2 ==> Floats or doubles ==> 9999+2
 419   enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
 420   uint fargs = (UseSSE>=2) ? 2 : UseSSE;
 421   uint freg_arg0 = 9999+fargs;
 422   uint freg_arg1 = 9999+fargs;
 423 
 424   // Pass doubles & longs aligned on the stack.  First count stack slots for doubles
 425   int i;
 426   for( i = 0; i < total_args_passed; i++) {
 427     if( sig_bt[i] == T_DOUBLE ) {
 428       // first 2 doubles go in registers
 429       if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
 430       else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
 431       else // Else double is passed low on the stack to be aligned.
 432         stack += 2;
 433     } else if( sig_bt[i] == T_LONG ) {
 434       stack += 2;
 435     }
 436   }
 437   int dstack = 0;             // Separate counter for placing doubles
 438 
 439   // Now pick where all else goes.
 440   for( i = 0; i < total_args_passed; i++) {
 441     // From the type and the argument number (count) compute the location
 442     switch( sig_bt[i] ) {
 443     case T_SHORT:
 444     case T_CHAR:
 445     case T_BYTE:
 446     case T_BOOLEAN:
 447     case T_INT:
 448     case T_ARRAY:
 449     case T_OBJECT:
 450     case T_ADDRESS:
 451       if( reg_arg0 == 9999 )  {
 452         reg_arg0 = i;
 453         regs[i].set1(rcx->as_VMReg());
 454       } else if( reg_arg1 == 9999 )  {
 455         reg_arg1 = i;
 456         regs[i].set1(rdx->as_VMReg());
 457       } else {
 458         regs[i].set1(VMRegImpl::stack2reg(stack++));
 459       }
 460       break;
 461     case T_FLOAT:
 462       if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
 463         freg_arg0 = i;
 464         regs[i].set1(xmm0->as_VMReg());
 465       } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
 466         freg_arg1 = i;
 467         regs[i].set1(xmm1->as_VMReg());
 468       } else {
 469         regs[i].set1(VMRegImpl::stack2reg(stack++));
 470       }
 471       break;
 472     case T_LONG:
 473       assert(sig_bt[i+1] == T_VOID, "missing Half" );
 474       regs[i].set2(VMRegImpl::stack2reg(dstack));
 475       dstack += 2;
 476       break;
 477     case T_DOUBLE:
 478       assert(sig_bt[i+1] == T_VOID, "missing Half" );
 479       if( freg_arg0 == (uint)i ) {
 480         regs[i].set2(xmm0->as_VMReg());
 481       } else if( freg_arg1 == (uint)i ) {
 482         regs[i].set2(xmm1->as_VMReg());
 483       } else {
 484         regs[i].set2(VMRegImpl::stack2reg(dstack));
 485         dstack += 2;
 486       }
 487       break;
 488     case T_VOID: regs[i].set_bad(); break;
 489       break;
 490     default:
 491       ShouldNotReachHere();
 492       break;
 493     }
 494   }
 495 
 496   // return value can be odd number of VMRegImpl stack slots make multiple of 2
 497   return round_to(stack, 2);
 498 }
 499 
 500 // Patch the callers callsite with entry to compiled code if it exists.
 501 static void patch_callers_callsite(MacroAssembler *masm) {
 502   Label L;
 503   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 504   __ jcc(Assembler::equal, L);
 505   // Schedule the branch target address early.
 506   // Call into the VM to patch the caller, then jump to compiled callee
 507   // rax, isn't live so capture return address while we easily can
 508   __ movptr(rax, Address(rsp, 0));
 509   __ pusha();
 510   __ pushf();
 511 
 512   if (UseSSE == 1) {
 513     __ subptr(rsp, 2*wordSize);
 514     __ movflt(Address(rsp, 0), xmm0);
 515     __ movflt(Address(rsp, wordSize), xmm1);
 516   }
 517   if (UseSSE >= 2) {
 518     __ subptr(rsp, 4*wordSize);
 519     __ movdbl(Address(rsp, 0), xmm0);
 520     __ movdbl(Address(rsp, 2*wordSize), xmm1);
 521   }
 522 #ifdef COMPILER2
 523   // C2 may leave the stack dirty if not in SSE2+ mode
 524   if (UseSSE >= 2) {
 525     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 526   } else {
 527     __ empty_FPU_stack();
 528   }
 529 #endif /* COMPILER2 */
 530 
 531   // VM needs caller's callsite
 532   __ push(rax);
 533   // VM needs target method
 534   __ push(rbx);
 535   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 536   __ addptr(rsp, 2*wordSize);
 537 
 538   if (UseSSE == 1) {
 539     __ movflt(xmm0, Address(rsp, 0));
 540     __ movflt(xmm1, Address(rsp, wordSize));
 541     __ addptr(rsp, 2*wordSize);
 542   }
 543   if (UseSSE >= 2) {
 544     __ movdbl(xmm0, Address(rsp, 0));
 545     __ movdbl(xmm1, Address(rsp, 2*wordSize));
 546     __ addptr(rsp, 4*wordSize);
 547   }
 548 
 549   __ popf();
 550   __ popa();
 551   __ bind(L);
 552 }
 553 
 554 
 555 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
 556   int next_off = st_off - Interpreter::stackElementSize;
 557   __ movdbl(Address(rsp, next_off), r);
 558 }
 559 
 560 static void gen_c2i_adapter(MacroAssembler *masm,
 561                             int total_args_passed,
 562                             int comp_args_on_stack,
 563                             const BasicType *sig_bt,
 564                             const VMRegPair *regs,
 565                             Label& skip_fixup) {
 566   // Before we get into the guts of the C2I adapter, see if we should be here
 567   // at all.  We've come from compiled code and are attempting to jump to the
 568   // interpreter, which means the caller made a static call to get here
 569   // (vcalls always get a compiled target if there is one).  Check for a
 570   // compiled target.  If there is one, we need to patch the caller's call.
 571   patch_callers_callsite(masm);
 572 
 573   __ bind(skip_fixup);
 574 
 575 #ifdef COMPILER2
 576   // C2 may leave the stack dirty if not in SSE2+ mode
 577   if (UseSSE >= 2) {
 578     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 579   } else {
 580     __ empty_FPU_stack();
 581   }
 582 #endif /* COMPILER2 */
 583 
 584   // Since all args are passed on the stack, total_args_passed * interpreter_
 585   // stack_element_size  is the
 586   // space we need.
 587   int extraspace = total_args_passed * Interpreter::stackElementSize;
 588 
 589   // Get return address
 590   __ pop(rax);
 591 
 592   // set senderSP value
 593   __ movptr(rsi, rsp);
 594 
 595   __ subptr(rsp, extraspace);
 596 
 597   // Now write the args into the outgoing interpreter space
 598   for (int i = 0; i < total_args_passed; i++) {
 599     if (sig_bt[i] == T_VOID) {
 600       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 601       continue;
 602     }
 603 
 604     // st_off points to lowest address on stack.
 605     int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
 606     int next_off = st_off - Interpreter::stackElementSize;
 607 
 608     // Say 4 args:
 609     // i   st_off
 610     // 0   12 T_LONG
 611     // 1    8 T_VOID
 612     // 2    4 T_OBJECT
 613     // 3    0 T_BOOL
 614     VMReg r_1 = regs[i].first();
 615     VMReg r_2 = regs[i].second();
 616     if (!r_1->is_valid()) {
 617       assert(!r_2->is_valid(), "");
 618       continue;
 619     }
 620 
 621     if (r_1->is_stack()) {
 622       // memory to memory use fpu stack top
 623       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 624 
 625       if (!r_2->is_valid()) {
 626         __ movl(rdi, Address(rsp, ld_off));
 627         __ movptr(Address(rsp, st_off), rdi);
 628       } else {
 629 
 630         // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
 631         // st_off == MSW, st_off-wordSize == LSW
 632 
 633         __ movptr(rdi, Address(rsp, ld_off));
 634         __ movptr(Address(rsp, next_off), rdi);
 635 #ifndef _LP64
 636         __ movptr(rdi, Address(rsp, ld_off + wordSize));
 637         __ movptr(Address(rsp, st_off), rdi);
 638 #else
 639 #ifdef ASSERT
 640         // Overwrite the unused slot with known junk
 641         __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 642         __ movptr(Address(rsp, st_off), rax);
 643 #endif /* ASSERT */
 644 #endif // _LP64
 645       }
 646     } else if (r_1->is_Register()) {
 647       Register r = r_1->as_Register();
 648       if (!r_2->is_valid()) {
 649         __ movl(Address(rsp, st_off), r);
 650       } else {
 651         // long/double in gpr
 652         NOT_LP64(ShouldNotReachHere());
 653         // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 654         // T_DOUBLE and T_LONG use two slots in the interpreter
 655         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 656           // long/double in gpr
 657 #ifdef ASSERT
 658           // Overwrite the unused slot with known junk
 659           LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
 660           __ movptr(Address(rsp, st_off), rax);
 661 #endif /* ASSERT */
 662           __ movptr(Address(rsp, next_off), r);
 663         } else {
 664           __ movptr(Address(rsp, st_off), r);
 665         }
 666       }
 667     } else {
 668       assert(r_1->is_XMMRegister(), "");
 669       if (!r_2->is_valid()) {
 670         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 671       } else {
 672         assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
 673         move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
 674       }
 675     }
 676   }
 677 
 678   // Schedule the branch target address early.
 679   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 680   // And repush original return address
 681   __ push(rax);
 682   __ jmp(rcx);
 683 }
 684 
 685 
 686 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
 687   int next_val_off = ld_off - Interpreter::stackElementSize;
 688   __ movdbl(r, Address(saved_sp, next_val_off));
 689 }
 690 
 691 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 692                         address code_start, address code_end,
 693                         Label& L_ok) {
 694   Label L_fail;
 695   __ lea(temp_reg, ExternalAddress(code_start));
 696   __ cmpptr(pc_reg, temp_reg);
 697   __ jcc(Assembler::belowEqual, L_fail);
 698   __ lea(temp_reg, ExternalAddress(code_end));
 699   __ cmpptr(pc_reg, temp_reg);
 700   __ jcc(Assembler::below, L_ok);
 701   __ bind(L_fail);
 702 }
 703 
 704 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 705                                     int total_args_passed,
 706                                     int comp_args_on_stack,
 707                                     const BasicType *sig_bt,
 708                                     const VMRegPair *regs) {
 709   // Note: rsi contains the senderSP on entry. We must preserve it since
 710   // we may do a i2c -> c2i transition if we lose a race where compiled
 711   // code goes non-entrant while we get args ready.
 712 
 713   // Adapters can be frameless because they do not require the caller
 714   // to perform additional cleanup work, such as correcting the stack pointer.
 715   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 716   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 717   // even if a callee has modified the stack pointer.
 718   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 719   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 720   // up via the senderSP register).
 721   // In other words, if *either* the caller or callee is interpreted, we can
 722   // get the stack pointer repaired after a call.
 723   // This is why c2i and i2c adapters cannot be indefinitely composed.
 724   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 725   // both caller and callee would be compiled methods, and neither would
 726   // clean up the stack pointer changes performed by the two adapters.
 727   // If this happens, control eventually transfers back to the compiled
 728   // caller, but with an uncorrected stack, causing delayed havoc.
 729 
 730   // Pick up the return address
 731   __ movptr(rax, Address(rsp, 0));
 732 
 733   if (VerifyAdapterCalls &&
 734       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 735     // So, let's test for cascading c2i/i2c adapters right now.
 736     //  assert(Interpreter::contains($return_addr) ||
 737     //         StubRoutines::contains($return_addr),
 738     //         "i2c adapter must return to an interpreter frame");
 739     __ block_comment("verify_i2c { ");
 740     Label L_ok;
 741     if (Interpreter::code() != NULL)
 742       range_check(masm, rax, rdi,
 743                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 744                   L_ok);
 745     if (StubRoutines::code1() != NULL)
 746       range_check(masm, rax, rdi,
 747                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 748                   L_ok);
 749     if (StubRoutines::code2() != NULL)
 750       range_check(masm, rax, rdi,
 751                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 752                   L_ok);
 753     const char* msg = "i2c adapter must return to an interpreter frame";
 754     __ block_comment(msg);
 755     __ stop(msg);
 756     __ bind(L_ok);
 757     __ block_comment("} verify_i2ce ");
 758   }
 759 
 760   // Must preserve original SP for loading incoming arguments because
 761   // we need to align the outgoing SP for compiled code.
 762   __ movptr(rdi, rsp);
 763 
 764   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 765   // in registers, we will occasionally have no stack args.
 766   int comp_words_on_stack = 0;
 767   if (comp_args_on_stack) {
 768     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 769     // registers are below.  By subtracting stack0, we either get a negative
 770     // number (all values in registers) or the maximum stack slot accessed.
 771     // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
 772     // Convert 4-byte stack slots to words.
 773     comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
 774     // Round up to miminum stack alignment, in wordSize
 775     comp_words_on_stack = round_to(comp_words_on_stack, 2);
 776     __ subptr(rsp, comp_words_on_stack * wordSize);
 777   }
 778 
 779   // Align the outgoing SP
 780   __ andptr(rsp, -(StackAlignmentInBytes));
 781 
 782   // push the return address on the stack (note that pushing, rather
 783   // than storing it, yields the correct frame alignment for the callee)
 784   __ push(rax);
 785 
 786   // Put saved SP in another register
 787   const Register saved_sp = rax;
 788   __ movptr(saved_sp, rdi);
 789 
 790 
 791   // Will jump to the compiled code just as if compiled code was doing it.
 792   // Pre-load the register-jump target early, to schedule it better.
 793   __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
 794 
 795   // Now generate the shuffle code.  Pick up all register args and move the
 796   // rest through the floating point stack top.
 797   for (int i = 0; i < total_args_passed; i++) {
 798     if (sig_bt[i] == T_VOID) {
 799       // Longs and doubles are passed in native word order, but misaligned
 800       // in the 32-bit build.
 801       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 802       continue;
 803     }
 804 
 805     // Pick up 0, 1 or 2 words from SP+offset.
 806 
 807     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 808             "scrambled load targets?");
 809     // Load in argument order going down.
 810     int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
 811     // Point to interpreter value (vs. tag)
 812     int next_off = ld_off - Interpreter::stackElementSize;
 813     //
 814     //
 815     //
 816     VMReg r_1 = regs[i].first();
 817     VMReg r_2 = regs[i].second();
 818     if (!r_1->is_valid()) {
 819       assert(!r_2->is_valid(), "");
 820       continue;
 821     }
 822     if (r_1->is_stack()) {
 823       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 824       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 825 
 826       // We can use rsi as a temp here because compiled code doesn't need rsi as an input
 827       // and if we end up going thru a c2i because of a miss a reasonable value of rsi
 828       // we be generated.
 829       if (!r_2->is_valid()) {
 830         // __ fld_s(Address(saved_sp, ld_off));
 831         // __ fstp_s(Address(rsp, st_off));
 832         __ movl(rsi, Address(saved_sp, ld_off));
 833         __ movptr(Address(rsp, st_off), rsi);
 834       } else {
 835         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 836         // are accessed as negative so LSW is at LOW address
 837 
 838         // ld_off is MSW so get LSW
 839         // st_off is LSW (i.e. reg.first())
 840         // __ fld_d(Address(saved_sp, next_off));
 841         // __ fstp_d(Address(rsp, st_off));
 842         //
 843         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 844         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 845         // So we must adjust where to pick up the data to match the interpreter.
 846         //
 847         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 848         // are accessed as negative so LSW is at LOW address
 849 
 850         // ld_off is MSW so get LSW
 851         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 852                            next_off : ld_off;
 853         __ movptr(rsi, Address(saved_sp, offset));
 854         __ movptr(Address(rsp, st_off), rsi);
 855 #ifndef _LP64
 856         __ movptr(rsi, Address(saved_sp, ld_off));
 857         __ movptr(Address(rsp, st_off + wordSize), rsi);
 858 #endif // _LP64
 859       }
 860     } else if (r_1->is_Register()) {  // Register argument
 861       Register r = r_1->as_Register();
 862       assert(r != rax, "must be different");
 863       if (r_2->is_valid()) {
 864         //
 865         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 866         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 867         // So we must adjust where to pick up the data to match the interpreter.
 868 
 869         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 870                            next_off : ld_off;
 871 
 872         // this can be a misaligned move
 873         __ movptr(r, Address(saved_sp, offset));
 874 #ifndef _LP64
 875         assert(r_2->as_Register() != rax, "need another temporary register");
 876         // Remember r_1 is low address (and LSB on x86)
 877         // So r_2 gets loaded from high address regardless of the platform
 878         __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
 879 #endif // _LP64
 880       } else {
 881         __ movl(r, Address(saved_sp, ld_off));
 882       }
 883     } else {
 884       assert(r_1->is_XMMRegister(), "");
 885       if (!r_2->is_valid()) {
 886         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 887       } else {
 888         move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
 889       }
 890     }
 891   }
 892 
 893   // 6243940 We might end up in handle_wrong_method if
 894   // the callee is deoptimized as we race thru here. If that
 895   // happens we don't want to take a safepoint because the
 896   // caller frame will look interpreted and arguments are now
 897   // "compiled" so it is much better to make this transition
 898   // invisible to the stack walking code. Unfortunately if
 899   // we try and find the callee by normal means a safepoint
 900   // is possible. So we stash the desired callee in the thread
 901   // and the vm will find there should this case occur.
 902 
 903   __ get_thread(rax);
 904   __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
 905 
 906   // move Method* to rax, in case we end up in an c2i adapter.
 907   // the c2i adapters expect Method* in rax, (c2) because c2's
 908   // resolve stubs return the result (the method) in rax,.
 909   // I'd love to fix this.
 910   __ mov(rax, rbx);
 911 
 912   __ jmp(rdi);
 913 }
 914 
 915 // ---------------------------------------------------------------
 916 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 917                                                             int total_args_passed,
 918                                                             int comp_args_on_stack,
 919                                                             const BasicType *sig_bt,
 920                                                             const VMRegPair *regs,
 921                                                             AdapterFingerPrint* fingerprint) {
 922   address i2c_entry = __ pc();
 923 
 924   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 925 
 926   // -------------------------------------------------------------------------
 927   // Generate a C2I adapter.  On entry we know rbx, holds the Method* during calls
 928   // to the interpreter.  The args start out packed in the compiled layout.  They
 929   // need to be unpacked into the interpreter layout.  This will almost always
 930   // require some stack space.  We grow the current (compiled) stack, then repack
 931   // the args.  We  finally end in a jump to the generic interpreter entry point.
 932   // On exit from the interpreter, the interpreter will restore our SP (lest the
 933   // compiled code, which relys solely on SP and not EBP, get sick).
 934 
 935   address c2i_unverified_entry = __ pc();
 936   Label skip_fixup;
 937 
 938   Register holder = rax;
 939   Register receiver = rcx;
 940   Register temp = rbx;
 941 
 942   {
 943 
 944     Label missed;
 945     __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
 946     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 947     __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
 948     __ jcc(Assembler::notEqual, missed);
 949     // Method might have been compiled since the call site was patched to
 950     // interpreted if that is the case treat it as a miss so we can get
 951     // the call site corrected.
 952     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 953     __ jcc(Assembler::equal, skip_fixup);
 954 
 955     __ bind(missed);
 956     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 957   }
 958 
 959   address c2i_entry = __ pc();
 960 
 961   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 962 
 963   __ flush();
 964   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
 965 }
 966 
 967 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 968                                          VMRegPair *regs,
 969                                          VMRegPair *regs2,
 970                                          int total_args_passed) {
 971   assert(regs2 == NULL, "not needed on x86");
 972 // We return the amount of VMRegImpl stack slots we need to reserve for all
 973 // the arguments NOT counting out_preserve_stack_slots.
 974 
 975   uint    stack = 0;        // All arguments on stack
 976 
 977   for( int i = 0; i < total_args_passed; i++) {
 978     // From the type and the argument number (count) compute the location
 979     switch( sig_bt[i] ) {
 980     case T_BOOLEAN:
 981     case T_CHAR:
 982     case T_FLOAT:
 983     case T_BYTE:
 984     case T_SHORT:
 985     case T_INT:
 986     case T_OBJECT:
 987     case T_ARRAY:
 988     case T_ADDRESS:
 989     case T_METADATA:
 990       regs[i].set1(VMRegImpl::stack2reg(stack++));
 991       break;
 992     case T_LONG:
 993     case T_DOUBLE: // The stack numbering is reversed from Java
 994       // Since C arguments do not get reversed, the ordering for
 995       // doubles on the stack must be opposite the Java convention
 996       assert(sig_bt[i+1] == T_VOID, "missing Half" );
 997       regs[i].set2(VMRegImpl::stack2reg(stack));
 998       stack += 2;
 999       break;
1000     case T_VOID: regs[i].set_bad(); break;
1001     default:
1002       ShouldNotReachHere();
1003       break;
1004     }
1005   }
1006   return stack;
1007 }
1008 
1009 // A simple move of integer like type
1010 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1011   if (src.first()->is_stack()) {
1012     if (dst.first()->is_stack()) {
1013       // stack to stack
1014       // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1015       // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1016       __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1017       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1018     } else {
1019       // stack to reg
1020       __ movl2ptr(dst.first()->as_Register(),  Address(rbp, reg2offset_in(src.first())));
1021     }
1022   } else if (dst.first()->is_stack()) {
1023     // reg to stack
1024     // no need to sign extend on 64bit
1025     __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1026   } else {
1027     if (dst.first() != src.first()) {
1028       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1029     }
1030   }
1031 }
1032 
1033 // An oop arg. Must pass a handle not the oop itself
1034 static void object_move(MacroAssembler* masm,
1035                         OopMap* map,
1036                         int oop_handle_offset,
1037                         int framesize_in_slots,
1038                         VMRegPair src,
1039                         VMRegPair dst,
1040                         bool is_receiver,
1041                         int* receiver_offset) {
1042 
1043   // Because of the calling conventions we know that src can be a
1044   // register or a stack location. dst can only be a stack location.
1045 
1046   assert(dst.first()->is_stack(), "must be stack");
1047   // must pass a handle. First figure out the location we use as a handle
1048 
1049   if (src.first()->is_stack()) {
1050     // Oop is already on the stack as an argument
1051     Register rHandle = rax;
1052     Label nil;
1053     __ xorptr(rHandle, rHandle);
1054     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1055     __ jcc(Assembler::equal, nil);
1056     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1057     __ bind(nil);
1058     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1059 
1060     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1061     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1062     if (is_receiver) {
1063       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1064     }
1065   } else {
1066     // Oop is in an a register we must store it to the space we reserve
1067     // on the stack for oop_handles
1068     const Register rOop = src.first()->as_Register();
1069     const Register rHandle = rax;
1070     int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1071     int offset = oop_slot*VMRegImpl::stack_slot_size;
1072     Label skip;
1073     __ movptr(Address(rsp, offset), rOop);
1074     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1075     __ xorptr(rHandle, rHandle);
1076     __ cmpptr(rOop, (int32_t)NULL_WORD);
1077     __ jcc(Assembler::equal, skip);
1078     __ lea(rHandle, Address(rsp, offset));
1079     __ bind(skip);
1080     // Store the handle parameter
1081     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1082     if (is_receiver) {
1083       *receiver_offset = offset;
1084     }
1085   }
1086 }
1087 
1088 // A float arg may have to do float reg int reg conversion
1089 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1090   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1091 
1092   // Because of the calling convention we know that src is either a stack location
1093   // or an xmm register. dst can only be a stack location.
1094 
1095   assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1096 
1097   if (src.first()->is_stack()) {
1098     __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1099     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1100   } else {
1101     // reg to stack
1102     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1103   }
1104 }
1105 
1106 // A long move
1107 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1108 
1109   // The only legal possibility for a long_move VMRegPair is:
1110   // 1: two stack slots (possibly unaligned)
1111   // as neither the java  or C calling convention will use registers
1112   // for longs.
1113 
1114   if (src.first()->is_stack() && dst.first()->is_stack()) {
1115     assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1116     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1117     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1118     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1119     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1120   } else {
1121     ShouldNotReachHere();
1122   }
1123 }
1124 
1125 // A double move
1126 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1127 
1128   // The only legal possibilities for a double_move VMRegPair are:
1129   // The painful thing here is that like long_move a VMRegPair might be
1130 
1131   // Because of the calling convention we know that src is either
1132   //   1: a single physical register (xmm registers only)
1133   //   2: two stack slots (possibly unaligned)
1134   // dst can only be a pair of stack slots.
1135 
1136   assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1137 
1138   if (src.first()->is_stack()) {
1139     // source is all stack
1140     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1141     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1142     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1143     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1144   } else {
1145     // reg to stack
1146     // No worries about stack alignment
1147     __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1148   }
1149 }
1150 
1151 
1152 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1153   // We always ignore the frame_slots arg and just use the space just below frame pointer
1154   // which by this time is free to use
1155   switch (ret_type) {
1156   case T_FLOAT:
1157     __ fstp_s(Address(rbp, -wordSize));
1158     break;
1159   case T_DOUBLE:
1160     __ fstp_d(Address(rbp, -2*wordSize));
1161     break;
1162   case T_VOID:  break;
1163   case T_LONG:
1164     __ movptr(Address(rbp, -wordSize), rax);
1165     NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1166     break;
1167   default: {
1168     __ movptr(Address(rbp, -wordSize), rax);
1169     }
1170   }
1171 }
1172 
1173 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1174   // We always ignore the frame_slots arg and just use the space just below frame pointer
1175   // which by this time is free to use
1176   switch (ret_type) {
1177   case T_FLOAT:
1178     __ fld_s(Address(rbp, -wordSize));
1179     break;
1180   case T_DOUBLE:
1181     __ fld_d(Address(rbp, -2*wordSize));
1182     break;
1183   case T_LONG:
1184     __ movptr(rax, Address(rbp, -wordSize));
1185     NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1186     break;
1187   case T_VOID:  break;
1188   default: {
1189     __ movptr(rax, Address(rbp, -wordSize));
1190     }
1191   }
1192 }
1193 
1194 
1195 static void save_or_restore_arguments(MacroAssembler* masm,
1196                                       const int stack_slots,
1197                                       const int total_in_args,
1198                                       const int arg_save_area,
1199                                       OopMap* map,
1200                                       VMRegPair* in_regs,
1201                                       BasicType* in_sig_bt) {
1202   // if map is non-NULL then the code should store the values,
1203   // otherwise it should load them.
1204   int handle_index = 0;
1205   // Save down double word first
1206   for ( int i = 0; i < total_in_args; i++) {
1207     if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1208       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1209       int offset = slot * VMRegImpl::stack_slot_size;
1210       handle_index += 2;
1211       assert(handle_index <= stack_slots, "overflow");
1212       if (map != NULL) {
1213         __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1214       } else {
1215         __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1216       }
1217     }
1218     if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1219       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1220       int offset = slot * VMRegImpl::stack_slot_size;
1221       handle_index += 2;
1222       assert(handle_index <= stack_slots, "overflow");
1223       if (map != NULL) {
1224         __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1225         if (in_regs[i].second()->is_Register()) {
1226           __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1227         }
1228       } else {
1229         __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1230         if (in_regs[i].second()->is_Register()) {
1231           __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1232         }
1233       }
1234     }
1235   }
1236   // Save or restore single word registers
1237   for ( int i = 0; i < total_in_args; i++) {
1238     if (in_regs[i].first()->is_Register()) {
1239       int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1240       int offset = slot * VMRegImpl::stack_slot_size;
1241       assert(handle_index <= stack_slots, "overflow");
1242       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1243         map->set_oop(VMRegImpl::stack2reg(slot));;
1244       }
1245 
1246       // Value is in an input register pass we must flush it to the stack
1247       const Register reg = in_regs[i].first()->as_Register();
1248       switch (in_sig_bt[i]) {
1249         case T_ARRAY:
1250           if (map != NULL) {
1251             __ movptr(Address(rsp, offset), reg);
1252           } else {
1253             __ movptr(reg, Address(rsp, offset));
1254           }
1255           break;
1256         case T_BOOLEAN:
1257         case T_CHAR:
1258         case T_BYTE:
1259         case T_SHORT:
1260         case T_INT:
1261           if (map != NULL) {
1262             __ movl(Address(rsp, offset), reg);
1263           } else {
1264             __ movl(reg, Address(rsp, offset));
1265           }
1266           break;
1267         case T_OBJECT:
1268         default: ShouldNotReachHere();
1269       }
1270     } else if (in_regs[i].first()->is_XMMRegister()) {
1271       if (in_sig_bt[i] == T_FLOAT) {
1272         int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1273         int offset = slot * VMRegImpl::stack_slot_size;
1274         assert(handle_index <= stack_slots, "overflow");
1275         if (map != NULL) {
1276           __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1277         } else {
1278           __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1279         }
1280       }
1281     } else if (in_regs[i].first()->is_stack()) {
1282       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1283         int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1284         map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1285       }
1286     }
1287   }
1288 }
1289 
1290 // Check GCLocker::needs_gc and enter the runtime if it's true.  This
1291 // keeps a new JNI critical region from starting until a GC has been
1292 // forced.  Save down any oops in registers and describe them in an
1293 // OopMap.
1294 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1295                                                Register thread,
1296                                                int stack_slots,
1297                                                int total_c_args,
1298                                                int total_in_args,
1299                                                int arg_save_area,
1300                                                OopMapSet* oop_maps,
1301                                                VMRegPair* in_regs,
1302                                                BasicType* in_sig_bt) {
1303   __ block_comment("check GCLocker::needs_gc");
1304   Label cont;
1305   __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1306   __ jcc(Assembler::equal, cont);
1307 
1308   // Save down any incoming oops and call into the runtime to halt for a GC
1309 
1310   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1311 
1312   save_or_restore_arguments(masm, stack_slots, total_in_args,
1313                             arg_save_area, map, in_regs, in_sig_bt);
1314 
1315   address the_pc = __ pc();
1316   oop_maps->add_gc_map( __ offset(), map);
1317   __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1318 
1319   __ block_comment("block_for_jni_critical");
1320   __ push(thread);
1321   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1322   __ increment(rsp, wordSize);
1323 
1324   __ get_thread(thread);
1325   __ reset_last_Java_frame(thread, false, true);
1326 
1327   save_or_restore_arguments(masm, stack_slots, total_in_args,
1328                             arg_save_area, NULL, in_regs, in_sig_bt);
1329 
1330   __ bind(cont);
1331 #ifdef ASSERT
1332   if (StressCriticalJNINatives) {
1333     // Stress register saving
1334     OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1335     save_or_restore_arguments(masm, stack_slots, total_in_args,
1336                               arg_save_area, map, in_regs, in_sig_bt);
1337     // Destroy argument registers
1338     for (int i = 0; i < total_in_args - 1; i++) {
1339       if (in_regs[i].first()->is_Register()) {
1340         const Register reg = in_regs[i].first()->as_Register();
1341         __ xorptr(reg, reg);
1342       } else if (in_regs[i].first()->is_XMMRegister()) {
1343         __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1344       } else if (in_regs[i].first()->is_FloatRegister()) {
1345         ShouldNotReachHere();
1346       } else if (in_regs[i].first()->is_stack()) {
1347         // Nothing to do
1348       } else {
1349         ShouldNotReachHere();
1350       }
1351       if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1352         i++;
1353       }
1354     }
1355 
1356     save_or_restore_arguments(masm, stack_slots, total_in_args,
1357                               arg_save_area, NULL, in_regs, in_sig_bt);
1358   }
1359 #endif
1360 }
1361 
1362 // Unpack an array argument into a pointer to the body and the length
1363 // if the array is non-null, otherwise pass 0 for both.
1364 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1365   Register tmp_reg = rax;
1366   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1367          "possible collision");
1368   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1369          "possible collision");
1370 
1371   // Pass the length, ptr pair
1372   Label is_null, done;
1373   VMRegPair tmp(tmp_reg->as_VMReg());
1374   if (reg.first()->is_stack()) {
1375     // Load the arg up from the stack
1376     simple_move32(masm, reg, tmp);
1377     reg = tmp;
1378   }
1379   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1380   __ jccb(Assembler::equal, is_null);
1381   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1382   simple_move32(masm, tmp, body_arg);
1383   // load the length relative to the body.
1384   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1385                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1386   simple_move32(masm, tmp, length_arg);
1387   __ jmpb(done);
1388   __ bind(is_null);
1389   // Pass zeros
1390   __ xorptr(tmp_reg, tmp_reg);
1391   simple_move32(masm, tmp, body_arg);
1392   simple_move32(masm, tmp, length_arg);
1393   __ bind(done);
1394 }
1395 
1396 static void verify_oop_args(MacroAssembler* masm,
1397                             methodHandle method,
1398                             const BasicType* sig_bt,
1399                             const VMRegPair* regs) {
1400   Register temp_reg = rbx;  // not part of any compiled calling seq
1401   if (VerifyOops) {
1402     for (int i = 0; i < method->size_of_parameters(); i++) {
1403       if (sig_bt[i] == T_OBJECT ||
1404           sig_bt[i] == T_ARRAY) {
1405         VMReg r = regs[i].first();
1406         assert(r->is_valid(), "bad oop arg");
1407         if (r->is_stack()) {
1408           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1409           __ verify_oop(temp_reg);
1410         } else {
1411           __ verify_oop(r->as_Register());
1412         }
1413       }
1414     }
1415   }
1416 }
1417 
1418 static void gen_special_dispatch(MacroAssembler* masm,
1419                                  methodHandle method,
1420                                  const BasicType* sig_bt,
1421                                  const VMRegPair* regs) {
1422   verify_oop_args(masm, method, sig_bt, regs);
1423   vmIntrinsics::ID iid = method->intrinsic_id();
1424 
1425   // Now write the args into the outgoing interpreter space
1426   bool     has_receiver   = false;
1427   Register receiver_reg   = noreg;
1428   int      member_arg_pos = -1;
1429   Register member_reg     = noreg;
1430   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1431   if (ref_kind != 0) {
1432     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1433     member_reg = rbx;  // known to be free at this point
1434     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1435   } else if (iid == vmIntrinsics::_invokeBasic) {
1436     has_receiver = true;
1437   } else {
1438     fatal("unexpected intrinsic id %d", iid);
1439   }
1440 
1441   if (member_reg != noreg) {
1442     // Load the member_arg into register, if necessary.
1443     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1444     VMReg r = regs[member_arg_pos].first();
1445     if (r->is_stack()) {
1446       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1447     } else {
1448       // no data motion is needed
1449       member_reg = r->as_Register();
1450     }
1451   }
1452 
1453   if (has_receiver) {
1454     // Make sure the receiver is loaded into a register.
1455     assert(method->size_of_parameters() > 0, "oob");
1456     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1457     VMReg r = regs[0].first();
1458     assert(r->is_valid(), "bad receiver arg");
1459     if (r->is_stack()) {
1460       // Porting note:  This assumes that compiled calling conventions always
1461       // pass the receiver oop in a register.  If this is not true on some
1462       // platform, pick a temp and load the receiver from stack.
1463       fatal("receiver always in a register");
1464       receiver_reg = rcx;  // known to be free at this point
1465       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1466     } else {
1467       // no data motion is needed
1468       receiver_reg = r->as_Register();
1469     }
1470   }
1471 
1472   // Figure out which address we are really jumping to:
1473   MethodHandles::generate_method_handle_dispatch(masm, iid,
1474                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1475 }
1476 
1477 // ---------------------------------------------------------------------------
1478 // Generate a native wrapper for a given method.  The method takes arguments
1479 // in the Java compiled code convention, marshals them to the native
1480 // convention (handlizes oops, etc), transitions to native, makes the call,
1481 // returns to java state (possibly blocking), unhandlizes any result and
1482 // returns.
1483 //
1484 // Critical native functions are a shorthand for the use of
1485 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1486 // functions.  The wrapper is expected to unpack the arguments before
1487 // passing them to the callee and perform checks before and after the
1488 // native call to ensure that they GCLocker
1489 // lock_critical/unlock_critical semantics are followed.  Some other
1490 // parts of JNI setup are skipped like the tear down of the JNI handle
1491 // block and the check for pending exceptions it's impossible for them
1492 // to be thrown.
1493 //
1494 // They are roughly structured like this:
1495 //    if (GCLocker::needs_gc())
1496 //      SharedRuntime::block_for_jni_critical();
1497 //    tranistion to thread_in_native
1498 //    unpack arrray arguments and call native entry point
1499 //    check for safepoint in progress
1500 //    check if any thread suspend flags are set
1501 //      call into JVM and possible unlock the JNI critical
1502 //      if a GC was suppressed while in the critical native.
1503 //    transition back to thread_in_Java
1504 //    return to caller
1505 //
1506 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1507                                                 const methodHandle& method,
1508                                                 int compile_id,
1509                                                 BasicType* in_sig_bt,
1510                                                 VMRegPair* in_regs,
1511                                                 BasicType ret_type) {
1512   if (method->is_method_handle_intrinsic()) {
1513     vmIntrinsics::ID iid = method->intrinsic_id();
1514     intptr_t start = (intptr_t)__ pc();
1515     int vep_offset = ((intptr_t)__ pc()) - start;
1516     gen_special_dispatch(masm,
1517                          method,
1518                          in_sig_bt,
1519                          in_regs);
1520     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1521     __ flush();
1522     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1523     return nmethod::new_native_nmethod(method,
1524                                        compile_id,
1525                                        masm->code(),
1526                                        vep_offset,
1527                                        frame_complete,
1528                                        stack_slots / VMRegImpl::slots_per_word,
1529                                        in_ByteSize(-1),
1530                                        in_ByteSize(-1),
1531                                        (OopMapSet*)NULL);
1532   }
1533   bool is_critical_native = true;
1534   address native_func = method->critical_native_function();
1535   if (native_func == NULL) {
1536     native_func = method->native_function();
1537     is_critical_native = false;
1538   }
1539   assert(native_func != NULL, "must have function");
1540 
1541   // An OopMap for lock (and class if static)
1542   OopMapSet *oop_maps = new OopMapSet();
1543 
1544   // We have received a description of where all the java arg are located
1545   // on entry to the wrapper. We need to convert these args to where
1546   // the jni function will expect them. To figure out where they go
1547   // we convert the java signature to a C signature by inserting
1548   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1549 
1550   const int total_in_args = method->size_of_parameters();
1551   int total_c_args = total_in_args;
1552   if (!is_critical_native) {
1553     total_c_args += 1;
1554     if (method->is_static()) {
1555       total_c_args++;
1556     }
1557   } else {
1558     for (int i = 0; i < total_in_args; i++) {
1559       if (in_sig_bt[i] == T_ARRAY) {
1560         total_c_args++;
1561       }
1562     }
1563   }
1564 
1565   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1566   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1567   BasicType* in_elem_bt = NULL;
1568 
1569   int argc = 0;
1570   if (!is_critical_native) {
1571     out_sig_bt[argc++] = T_ADDRESS;
1572     if (method->is_static()) {
1573       out_sig_bt[argc++] = T_OBJECT;
1574     }
1575 
1576     for (int i = 0; i < total_in_args ; i++ ) {
1577       out_sig_bt[argc++] = in_sig_bt[i];
1578     }
1579   } else {
1580     Thread* THREAD = Thread::current();
1581     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1582     SignatureStream ss(method->signature());
1583     for (int i = 0; i < total_in_args ; i++ ) {
1584       if (in_sig_bt[i] == T_ARRAY) {
1585         // Arrays are passed as int, elem* pair
1586         out_sig_bt[argc++] = T_INT;
1587         out_sig_bt[argc++] = T_ADDRESS;
1588         Symbol* atype = ss.as_symbol(CHECK_NULL);
1589         const char* at = atype->as_C_string();
1590         if (strlen(at) == 2) {
1591           assert(at[0] == '[', "must be");
1592           switch (at[1]) {
1593             case 'B': in_elem_bt[i]  = T_BYTE; break;
1594             case 'C': in_elem_bt[i]  = T_CHAR; break;
1595             case 'D': in_elem_bt[i]  = T_DOUBLE; break;
1596             case 'F': in_elem_bt[i]  = T_FLOAT; break;
1597             case 'I': in_elem_bt[i]  = T_INT; break;
1598             case 'J': in_elem_bt[i]  = T_LONG; break;
1599             case 'S': in_elem_bt[i]  = T_SHORT; break;
1600             case 'Z': in_elem_bt[i]  = T_BOOLEAN; break;
1601             default: ShouldNotReachHere();
1602           }
1603         }
1604       } else {
1605         out_sig_bt[argc++] = in_sig_bt[i];
1606         in_elem_bt[i] = T_VOID;
1607       }
1608       if (in_sig_bt[i] != T_VOID) {
1609         assert(in_sig_bt[i] == ss.type(), "must match");
1610         ss.next();
1611       }
1612     }
1613   }
1614 
1615   // Now figure out where the args must be stored and how much stack space
1616   // they require.
1617   int out_arg_slots;
1618   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1619 
1620   // Compute framesize for the wrapper.  We need to handlize all oops in
1621   // registers a max of 2 on x86.
1622 
1623   // Calculate the total number of stack slots we will need.
1624 
1625   // First count the abi requirement plus all of the outgoing args
1626   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1627 
1628   // Now the space for the inbound oop handle area
1629   int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1630   if (is_critical_native) {
1631     // Critical natives may have to call out so they need a save area
1632     // for register arguments.
1633     int double_slots = 0;
1634     int single_slots = 0;
1635     for ( int i = 0; i < total_in_args; i++) {
1636       if (in_regs[i].first()->is_Register()) {
1637         const Register reg = in_regs[i].first()->as_Register();
1638         switch (in_sig_bt[i]) {
1639           case T_ARRAY:  // critical array (uses 2 slots on LP64)
1640           case T_BOOLEAN:
1641           case T_BYTE:
1642           case T_SHORT:
1643           case T_CHAR:
1644           case T_INT:  single_slots++; break;
1645           case T_LONG: double_slots++; break;
1646           default:  ShouldNotReachHere();
1647         }
1648       } else if (in_regs[i].first()->is_XMMRegister()) {
1649         switch (in_sig_bt[i]) {
1650           case T_FLOAT:  single_slots++; break;
1651           case T_DOUBLE: double_slots++; break;
1652           default:  ShouldNotReachHere();
1653         }
1654       } else if (in_regs[i].first()->is_FloatRegister()) {
1655         ShouldNotReachHere();
1656       }
1657     }
1658     total_save_slots = double_slots * 2 + single_slots;
1659     // align the save area
1660     if (double_slots != 0) {
1661       stack_slots = round_to(stack_slots, 2);
1662     }
1663   }
1664 
1665   int oop_handle_offset = stack_slots;
1666   stack_slots += total_save_slots;
1667 
1668   // Now any space we need for handlizing a klass if static method
1669 
1670   int klass_slot_offset = 0;
1671   int klass_offset = -1;
1672   int lock_slot_offset = 0;
1673   bool is_static = false;
1674 
1675   if (method->is_static()) {
1676     klass_slot_offset = stack_slots;
1677     stack_slots += VMRegImpl::slots_per_word;
1678     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1679     is_static = true;
1680   }
1681 
1682   // Plus a lock if needed
1683 
1684   if (method->is_synchronized()) {
1685     lock_slot_offset = stack_slots;
1686     stack_slots += VMRegImpl::slots_per_word;
1687   }
1688 
1689   // Now a place (+2) to save return values or temp during shuffling
1690   // + 2 for return address (which we own) and saved rbp,
1691   stack_slots += 4;
1692 
1693   // Ok The space we have allocated will look like:
1694   //
1695   //
1696   // FP-> |                     |
1697   //      |---------------------|
1698   //      | 2 slots for moves   |
1699   //      |---------------------|
1700   //      | lock box (if sync)  |
1701   //      |---------------------| <- lock_slot_offset  (-lock_slot_rbp_offset)
1702   //      | klass (if static)   |
1703   //      |---------------------| <- klass_slot_offset
1704   //      | oopHandle area      |
1705   //      |---------------------| <- oop_handle_offset (a max of 2 registers)
1706   //      | outbound memory     |
1707   //      | based arguments     |
1708   //      |                     |
1709   //      |---------------------|
1710   //      |                     |
1711   // SP-> | out_preserved_slots |
1712   //
1713   //
1714   // ****************************************************************************
1715   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1716   // arguments off of the stack after the jni call. Before the call we can use
1717   // instructions that are SP relative. After the jni call we switch to FP
1718   // relative instructions instead of re-adjusting the stack on windows.
1719   // ****************************************************************************
1720 
1721 
1722   // Now compute actual number of stack words we need rounding to make
1723   // stack properly aligned.
1724   stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1725 
1726   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1727 
1728   intptr_t start = (intptr_t)__ pc();
1729 
1730   // First thing make an ic check to see if we should even be here
1731 
1732   // We are free to use all registers as temps without saving them and
1733   // restoring them except rbp. rbp is the only callee save register
1734   // as far as the interpreter and the compiler(s) are concerned.
1735 
1736 
1737   const Register ic_reg = rax;
1738   const Register receiver = rcx;
1739   Label hit;
1740   Label exception_pending;
1741 
1742   __ verify_oop(receiver);
1743   __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1744   __ jcc(Assembler::equal, hit);
1745 
1746   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1747 
1748   // verified entry must be aligned for code patching.
1749   // and the first 5 bytes must be in the same cache line
1750   // if we align at 8 then we will be sure 5 bytes are in the same line
1751   __ align(8);
1752 
1753   __ bind(hit);
1754 
1755   int vep_offset = ((intptr_t)__ pc()) - start;
1756 
1757 #ifdef COMPILER1
1758   // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1759   if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1760     inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1761    }
1762 #endif // COMPILER1
1763 
1764   // The instruction at the verified entry point must be 5 bytes or longer
1765   // because it can be patched on the fly by make_non_entrant. The stack bang
1766   // instruction fits that requirement.
1767 
1768   // Generate stack overflow check
1769 
1770   if (UseStackBanging) {
1771     __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1772   } else {
1773     // need a 5 byte instruction to allow MT safe patching to non-entrant
1774     __ fat_nop();
1775   }
1776 
1777   // Generate a new frame for the wrapper.
1778   __ enter();
1779   // -2 because return address is already present and so is saved rbp
1780   __ subptr(rsp, stack_size - 2*wordSize);
1781 
1782   // Frame is now completed as far as size and linkage.
1783   int frame_complete = ((intptr_t)__ pc()) - start;
1784 
1785   if (UseRTMLocking) {
1786     // Abort RTM transaction before calling JNI
1787     // because critical section will be large and will be
1788     // aborted anyway. Also nmethod could be deoptimized.
1789     __ xabort(0);
1790   }
1791 
1792   // Calculate the difference between rsp and rbp,. We need to know it
1793   // after the native call because on windows Java Natives will pop
1794   // the arguments and it is painful to do rsp relative addressing
1795   // in a platform independent way. So after the call we switch to
1796   // rbp, relative addressing.
1797 
1798   int fp_adjustment = stack_size - 2*wordSize;
1799 
1800 #ifdef COMPILER2
1801   // C2 may leave the stack dirty if not in SSE2+ mode
1802   if (UseSSE >= 2) {
1803     __ verify_FPU(0, "c2i transition should have clean FPU stack");
1804   } else {
1805     __ empty_FPU_stack();
1806   }
1807 #endif /* COMPILER2 */
1808 
1809   // Compute the rbp, offset for any slots used after the jni call
1810 
1811   int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1812 
1813   // We use rdi as a thread pointer because it is callee save and
1814   // if we load it once it is usable thru the entire wrapper
1815   const Register thread = rdi;
1816 
1817   // We use rsi as the oop handle for the receiver/klass
1818   // It is callee save so it survives the call to native
1819 
1820   const Register oop_handle_reg = rsi;
1821 
1822   __ get_thread(thread);
1823 
1824   if (is_critical_native) {
1825     check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1826                                        oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1827   }
1828 
1829   //
1830   // We immediately shuffle the arguments so that any vm call we have to
1831   // make from here on out (sync slow path, jvmti, etc.) we will have
1832   // captured the oops from our caller and have a valid oopMap for
1833   // them.
1834 
1835   // -----------------
1836   // The Grand Shuffle
1837   //
1838   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1839   // and, if static, the class mirror instead of a receiver.  This pretty much
1840   // guarantees that register layout will not match (and x86 doesn't use reg
1841   // parms though amd does).  Since the native abi doesn't use register args
1842   // and the java conventions does we don't have to worry about collisions.
1843   // All of our moved are reg->stack or stack->stack.
1844   // We ignore the extra arguments during the shuffle and handle them at the
1845   // last moment. The shuffle is described by the two calling convention
1846   // vectors we have in our possession. We simply walk the java vector to
1847   // get the source locations and the c vector to get the destinations.
1848 
1849   int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1850 
1851   // Record rsp-based slot for receiver on stack for non-static methods
1852   int receiver_offset = -1;
1853 
1854   // This is a trick. We double the stack slots so we can claim
1855   // the oops in the caller's frame. Since we are sure to have
1856   // more args than the caller doubling is enough to make
1857   // sure we can capture all the incoming oop args from the
1858   // caller.
1859   //
1860   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1861 
1862   // Mark location of rbp,
1863   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1864 
1865   // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1866   // Are free to temporaries if we have to do  stack to steck moves.
1867   // All inbound args are referenced based on rbp, and all outbound args via rsp.
1868 
1869   for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1870     switch (in_sig_bt[i]) {
1871       case T_ARRAY:
1872         if (is_critical_native) {
1873           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1874           c_arg++;
1875           break;
1876         }
1877       case T_OBJECT:
1878         assert(!is_critical_native, "no oop arguments");
1879         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1880                     ((i == 0) && (!is_static)),
1881                     &receiver_offset);
1882         break;
1883       case T_VOID:
1884         break;
1885 
1886       case T_FLOAT:
1887         float_move(masm, in_regs[i], out_regs[c_arg]);
1888           break;
1889 
1890       case T_DOUBLE:
1891         assert( i + 1 < total_in_args &&
1892                 in_sig_bt[i + 1] == T_VOID &&
1893                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1894         double_move(masm, in_regs[i], out_regs[c_arg]);
1895         break;
1896 
1897       case T_LONG :
1898         long_move(masm, in_regs[i], out_regs[c_arg]);
1899         break;
1900 
1901       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1902 
1903       default:
1904         simple_move32(masm, in_regs[i], out_regs[c_arg]);
1905     }
1906   }
1907 
1908   // Pre-load a static method's oop into rsi.  Used both by locking code and
1909   // the normal JNI call code.
1910   if (method->is_static() && !is_critical_native) {
1911 
1912     //  load opp into a register
1913     __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1914 
1915     // Now handlize the static class mirror it's known not-null.
1916     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1917     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1918 
1919     // Now get the handle
1920     __ lea(oop_handle_reg, Address(rsp, klass_offset));
1921     // store the klass handle as second argument
1922     __ movptr(Address(rsp, wordSize), oop_handle_reg);
1923   }
1924 
1925   // Change state to native (we save the return address in the thread, since it might not
1926   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1927   // points into the right code segment. It does not have to be the correct return pc.
1928   // We use the same pc/oopMap repeatedly when we call out
1929 
1930   intptr_t the_pc = (intptr_t) __ pc();
1931   oop_maps->add_gc_map(the_pc - start, map);
1932 
1933   __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1934 
1935 
1936   // We have all of the arguments setup at this point. We must not touch any register
1937   // argument registers at this point (what if we save/restore them there are no oop?
1938 
1939   {
1940     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1941     __ mov_metadata(rax, method());
1942     __ call_VM_leaf(
1943          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1944          thread, rax);
1945   }
1946 
1947   // RedefineClasses() tracing support for obsolete method entry
1948   if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1949     __ mov_metadata(rax, method());
1950     __ call_VM_leaf(
1951          CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1952          thread, rax);
1953   }
1954 
1955   // These are register definitions we need for locking/unlocking
1956   const Register swap_reg = rax;  // Must use rax, for cmpxchg instruction
1957   const Register obj_reg  = rcx;  // Will contain the oop
1958   const Register lock_reg = rdx;  // Address of compiler lock object (BasicLock)
1959 
1960   Label slow_path_lock;
1961   Label lock_done;
1962 
1963   // Lock a synchronized method
1964   if (method->is_synchronized()) {
1965     assert(!is_critical_native, "unhandled");
1966 
1967 
1968     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1969 
1970     // Get the handle (the 2nd argument)
1971     __ movptr(oop_handle_reg, Address(rsp, wordSize));
1972 
1973     // Get address of the box
1974 
1975     __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1976 
1977     // Load the oop from the handle
1978     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1979 
1980     if (UseBiasedLocking) {
1981       // Note that oop_handle_reg is trashed during this call
1982       __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1983     }
1984 
1985     // Load immediate 1 into swap_reg %rax,
1986     __ movptr(swap_reg, 1);
1987 
1988     // Load (object->mark() | 1) into swap_reg %rax,
1989     __ orptr(swap_reg, Address(obj_reg, 0));
1990 
1991     // Save (object->mark() | 1) into BasicLock's displaced header
1992     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1993 
1994     if (os::is_MP()) {
1995       __ lock();
1996     }
1997 
1998     // src -> dest iff dest == rax, else rax, <- dest
1999     // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2000     __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2001     __ jcc(Assembler::equal, lock_done);
2002 
2003     // Test if the oopMark is an obvious stack pointer, i.e.,
2004     //  1) (mark & 3) == 0, and
2005     //  2) rsp <= mark < mark + os::pagesize()
2006     // These 3 tests can be done by evaluating the following
2007     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2008     // assuming both stack pointer and pagesize have their
2009     // least significant 2 bits clear.
2010     // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2011 
2012     __ subptr(swap_reg, rsp);
2013     __ andptr(swap_reg, 3 - os::vm_page_size());
2014 
2015     // Save the test result, for recursive case, the result is zero
2016     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2017     __ jcc(Assembler::notEqual, slow_path_lock);
2018     // Slow path will re-enter here
2019     __ bind(lock_done);
2020 
2021     if (UseBiasedLocking) {
2022       // Re-fetch oop_handle_reg as we trashed it above
2023       __ movptr(oop_handle_reg, Address(rsp, wordSize));
2024     }
2025   }
2026 
2027 
2028   // Finally just about ready to make the JNI call
2029 
2030 
2031   // get JNIEnv* which is first argument to native
2032   if (!is_critical_native) {
2033     __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2034     __ movptr(Address(rsp, 0), rdx);
2035   }
2036 
2037   // Now set thread in native
2038   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2039 
2040   __ call(RuntimeAddress(native_func));
2041 
2042   // Verify or restore cpu control state after JNI call
2043   __ restore_cpu_control_state_after_jni();
2044 
2045   // WARNING - on Windows Java Natives use pascal calling convention and pop the
2046   // arguments off of the stack. We could just re-adjust the stack pointer here
2047   // and continue to do SP relative addressing but we instead switch to FP
2048   // relative addressing.
2049 
2050   // Unpack native results.
2051   switch (ret_type) {
2052   case T_BOOLEAN: __ c2bool(rax);            break;
2053   case T_CHAR   : __ andptr(rax, 0xFFFF);    break;
2054   case T_BYTE   : __ sign_extend_byte (rax); break;
2055   case T_SHORT  : __ sign_extend_short(rax); break;
2056   case T_INT    : /* nothing to do */        break;
2057   case T_DOUBLE :
2058   case T_FLOAT  :
2059     // Result is in st0 we'll save as needed
2060     break;
2061   case T_ARRAY:                 // Really a handle
2062   case T_OBJECT:                // Really a handle
2063       break; // can't de-handlize until after safepoint check
2064   case T_VOID: break;
2065   case T_LONG: break;
2066   default       : ShouldNotReachHere();
2067   }
2068 
2069   // Switch thread to "native transition" state before reading the synchronization state.
2070   // This additional state is necessary because reading and testing the synchronization
2071   // state is not atomic w.r.t. GC, as this scenario demonstrates:
2072   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2073   //     VM thread changes sync state to synchronizing and suspends threads for GC.
2074   //     Thread A is resumed to finish this native method, but doesn't block here since it
2075   //     didn't see any synchronization is progress, and escapes.
2076   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2077 
2078   if(os::is_MP()) {
2079     if (UseMembar) {
2080       // Force this write out before the read below
2081       __ membar(Assembler::Membar_mask_bits(
2082            Assembler::LoadLoad | Assembler::LoadStore |
2083            Assembler::StoreLoad | Assembler::StoreStore));
2084     } else {
2085       // Write serialization page so VM thread can do a pseudo remote membar.
2086       // We use the current thread pointer to calculate a thread specific
2087       // offset to write to within the page. This minimizes bus traffic
2088       // due to cache line collision.
2089       __ serialize_memory(thread, rcx);
2090     }
2091   }
2092 
2093   if (AlwaysRestoreFPU) {
2094     // Make sure the control word is correct.
2095     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2096   }
2097 
2098   Label after_transition;
2099 
2100   // check for safepoint operation in progress and/or pending suspend requests
2101   { Label Continue;
2102 
2103     __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2104              SafepointSynchronize::_not_synchronized);
2105 
2106     Label L;
2107     __ jcc(Assembler::notEqual, L);
2108     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2109     __ jcc(Assembler::equal, Continue);
2110     __ bind(L);
2111 
2112     // Don't use call_VM as it will see a possible pending exception and forward it
2113     // and never return here preventing us from clearing _last_native_pc down below.
2114     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2115     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2116     // by hand.
2117     //
2118     save_native_result(masm, ret_type, stack_slots);
2119     __ push(thread);
2120     if (!is_critical_native) {
2121       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2122                                               JavaThread::check_special_condition_for_native_trans)));
2123     } else {
2124       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2125                                               JavaThread::check_special_condition_for_native_trans_and_transition)));
2126     }
2127     __ increment(rsp, wordSize);
2128     // Restore any method result value
2129     restore_native_result(masm, ret_type, stack_slots);
2130 
2131     if (is_critical_native) {
2132       // The call above performed the transition to thread_in_Java so
2133       // skip the transition logic below.
2134       __ jmpb(after_transition);
2135     }
2136 
2137     __ bind(Continue);
2138   }
2139 
2140   // change thread state
2141   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2142   __ bind(after_transition);
2143 
2144   Label reguard;
2145   Label reguard_done;
2146   __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2147   __ jcc(Assembler::equal, reguard);
2148 
2149   // slow path reguard  re-enters here
2150   __ bind(reguard_done);
2151 
2152   // Handle possible exception (will unlock if necessary)
2153 
2154   // native result if any is live
2155 
2156   // Unlock
2157   Label slow_path_unlock;
2158   Label unlock_done;
2159   if (method->is_synchronized()) {
2160 
2161     Label done;
2162 
2163     // Get locked oop from the handle we passed to jni
2164     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2165 
2166     if (UseBiasedLocking) {
2167       __ biased_locking_exit(obj_reg, rbx, done);
2168     }
2169 
2170     // Simple recursive lock?
2171 
2172     __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2173     __ jcc(Assembler::equal, done);
2174 
2175     // Must save rax, if if it is live now because cmpxchg must use it
2176     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2177       save_native_result(masm, ret_type, stack_slots);
2178     }
2179 
2180     //  get old displaced header
2181     __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2182 
2183     // get address of the stack lock
2184     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2185 
2186     // Atomic swap old header if oop still contains the stack lock
2187     if (os::is_MP()) {
2188     __ lock();
2189     }
2190 
2191     // src -> dest iff dest == rax, else rax, <- dest
2192     // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2193     __ cmpxchgptr(rbx, Address(obj_reg, 0));
2194     __ jcc(Assembler::notEqual, slow_path_unlock);
2195 
2196     // slow path re-enters here
2197     __ bind(unlock_done);
2198     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2199       restore_native_result(masm, ret_type, stack_slots);
2200     }
2201 
2202     __ bind(done);
2203 
2204   }
2205 
2206   {
2207     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2208     // Tell dtrace about this method exit
2209     save_native_result(masm, ret_type, stack_slots);
2210     __ mov_metadata(rax, method());
2211     __ call_VM_leaf(
2212          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2213          thread, rax);
2214     restore_native_result(masm, ret_type, stack_slots);
2215   }
2216 
2217   // We can finally stop using that last_Java_frame we setup ages ago
2218 
2219   __ reset_last_Java_frame(thread, false, true);
2220 
2221   // Unpack oop result
2222   if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2223       Label L;
2224       __ cmpptr(rax, (int32_t)NULL_WORD);
2225       __ jcc(Assembler::equal, L);
2226       __ movptr(rax, Address(rax, 0));
2227       __ bind(L);
2228       __ verify_oop(rax);
2229   }
2230 
2231   if (!is_critical_native) {
2232     // reset handle block
2233     __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2234     __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2235 
2236     // Any exception pending?
2237     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2238     __ jcc(Assembler::notEqual, exception_pending);
2239   }
2240 
2241   // no exception, we're almost done
2242 
2243   // check that only result value is on FPU stack
2244   __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2245 
2246   // Fixup floating pointer results so that result looks like a return from a compiled method
2247   if (ret_type == T_FLOAT) {
2248     if (UseSSE >= 1) {
2249       // Pop st0 and store as float and reload into xmm register
2250       __ fstp_s(Address(rbp, -4));
2251       __ movflt(xmm0, Address(rbp, -4));
2252     }
2253   } else if (ret_type == T_DOUBLE) {
2254     if (UseSSE >= 2) {
2255       // Pop st0 and store as double and reload into xmm register
2256       __ fstp_d(Address(rbp, -8));
2257       __ movdbl(xmm0, Address(rbp, -8));
2258     }
2259   }
2260 
2261   // Return
2262 
2263   __ leave();
2264   __ ret(0);
2265 
2266   // Unexpected paths are out of line and go here
2267 
2268   // Slow path locking & unlocking
2269   if (method->is_synchronized()) {
2270 
2271     // BEGIN Slow path lock
2272 
2273     __ bind(slow_path_lock);
2274 
2275     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2276     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2277     __ push(thread);
2278     __ push(lock_reg);
2279     __ push(obj_reg);
2280     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2281     __ addptr(rsp, 3*wordSize);
2282 
2283 #ifdef ASSERT
2284     { Label L;
2285     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2286     __ jcc(Assembler::equal, L);
2287     __ stop("no pending exception allowed on exit from monitorenter");
2288     __ bind(L);
2289     }
2290 #endif
2291     __ jmp(lock_done);
2292 
2293     // END Slow path lock
2294 
2295     // BEGIN Slow path unlock
2296     __ bind(slow_path_unlock);
2297 
2298     // Slow path unlock
2299 
2300     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2301       save_native_result(masm, ret_type, stack_slots);
2302     }
2303     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2304 
2305     __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2306     __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2307 
2308 
2309     // should be a peal
2310     // +wordSize because of the push above
2311     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2312     __ push(thread);
2313     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2314     __ push(rax);
2315 
2316     __ push(obj_reg);
2317     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2318     __ addptr(rsp, 3*wordSize);
2319 #ifdef ASSERT
2320     {
2321       Label L;
2322       __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2323       __ jcc(Assembler::equal, L);
2324       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2325       __ bind(L);
2326     }
2327 #endif /* ASSERT */
2328 
2329     __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2330 
2331     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2332       restore_native_result(masm, ret_type, stack_slots);
2333     }
2334     __ jmp(unlock_done);
2335     // END Slow path unlock
2336 
2337   }
2338 
2339   // SLOW PATH Reguard the stack if needed
2340 
2341   __ bind(reguard);
2342   save_native_result(masm, ret_type, stack_slots);
2343   {
2344     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2345   }
2346   restore_native_result(masm, ret_type, stack_slots);
2347   __ jmp(reguard_done);
2348 
2349 
2350   // BEGIN EXCEPTION PROCESSING
2351 
2352   if (!is_critical_native) {
2353     // Forward  the exception
2354     __ bind(exception_pending);
2355 
2356     // remove possible return value from FPU register stack
2357     __ empty_FPU_stack();
2358 
2359     // pop our frame
2360     __ leave();
2361     // and forward the exception
2362     __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2363   }
2364 
2365   __ flush();
2366 
2367   nmethod *nm = nmethod::new_native_nmethod(method,
2368                                             compile_id,
2369                                             masm->code(),
2370                                             vep_offset,
2371                                             frame_complete,
2372                                             stack_slots / VMRegImpl::slots_per_word,
2373                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2374                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2375                                             oop_maps);
2376 
2377   if (is_critical_native) {
2378     nm->set_lazy_critical_native(true);
2379   }
2380 
2381   return nm;
2382 
2383 }
2384 
2385 // this function returns the adjust size (in number of words) to a c2i adapter
2386 // activation for use during deoptimization
2387 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2388   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2389 }
2390 
2391 
2392 uint SharedRuntime::out_preserve_stack_slots() {
2393   return 0;
2394 }
2395 
2396 //------------------------------generate_deopt_blob----------------------------
2397 void SharedRuntime::generate_deopt_blob() {
2398   // allocate space for the code
2399   ResourceMark rm;
2400   // setup code generation tools
2401   // note: the buffer code size must account for StackShadowPages=50
2402   CodeBuffer   buffer("deopt_blob", 1536, 1024);
2403   MacroAssembler* masm = new MacroAssembler(&buffer);
2404   int frame_size_in_words;
2405   OopMap* map = NULL;
2406   // Account for the extra args we place on the stack
2407   // by the time we call fetch_unroll_info
2408   const int additional_words = 2; // deopt kind, thread
2409 
2410   OopMapSet *oop_maps = new OopMapSet();
2411 
2412   // -------------
2413   // This code enters when returning to a de-optimized nmethod.  A return
2414   // address has been pushed on the the stack, and return values are in
2415   // registers.
2416   // If we are doing a normal deopt then we were called from the patched
2417   // nmethod from the point we returned to the nmethod. So the return
2418   // address on the stack is wrong by NativeCall::instruction_size
2419   // We will adjust the value to it looks like we have the original return
2420   // address on the stack (like when we eagerly deoptimized).
2421   // In the case of an exception pending with deoptimized then we enter
2422   // with a return address on the stack that points after the call we patched
2423   // into the exception handler. We have the following register state:
2424   //    rax,: exception
2425   //    rbx,: exception handler
2426   //    rdx: throwing pc
2427   // So in this case we simply jam rdx into the useless return address and
2428   // the stack looks just like we want.
2429   //
2430   // At this point we need to de-opt.  We save the argument return
2431   // registers.  We call the first C routine, fetch_unroll_info().  This
2432   // routine captures the return values and returns a structure which
2433   // describes the current frame size and the sizes of all replacement frames.
2434   // The current frame is compiled code and may contain many inlined
2435   // functions, each with their own JVM state.  We pop the current frame, then
2436   // push all the new frames.  Then we call the C routine unpack_frames() to
2437   // populate these frames.  Finally unpack_frames() returns us the new target
2438   // address.  Notice that callee-save registers are BLOWN here; they have
2439   // already been captured in the vframeArray at the time the return PC was
2440   // patched.
2441   address start = __ pc();
2442   Label cont;
2443 
2444   // Prolog for non exception case!
2445 
2446   // Save everything in sight.
2447 
2448   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2449   // Normal deoptimization
2450   __ push(Deoptimization::Unpack_deopt);
2451   __ jmp(cont);
2452 
2453   int reexecute_offset = __ pc() - start;
2454 
2455   // Reexecute case
2456   // return address is the pc describes what bci to do re-execute at
2457 
2458   // No need to update map as each call to save_live_registers will produce identical oopmap
2459   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2460 
2461   __ push(Deoptimization::Unpack_reexecute);
2462   __ jmp(cont);
2463 
2464   int exception_offset = __ pc() - start;
2465 
2466   // Prolog for exception case
2467 
2468   // all registers are dead at this entry point, except for rax, and
2469   // rdx which contain the exception oop and exception pc
2470   // respectively.  Set them in TLS and fall thru to the
2471   // unpack_with_exception_in_tls entry point.
2472 
2473   __ get_thread(rdi);
2474   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2475   __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2476 
2477   int exception_in_tls_offset = __ pc() - start;
2478 
2479   // new implementation because exception oop is now passed in JavaThread
2480 
2481   // Prolog for exception case
2482   // All registers must be preserved because they might be used by LinearScan
2483   // Exceptiop oop and throwing PC are passed in JavaThread
2484   // tos: stack at point of call to method that threw the exception (i.e. only
2485   // args are on the stack, no return address)
2486 
2487   // make room on stack for the return address
2488   // It will be patched later with the throwing pc. The correct value is not
2489   // available now because loading it from memory would destroy registers.
2490   __ push(0);
2491 
2492   // Save everything in sight.
2493 
2494   // No need to update map as each call to save_live_registers will produce identical oopmap
2495   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2496 
2497   // Now it is safe to overwrite any register
2498 
2499   // store the correct deoptimization type
2500   __ push(Deoptimization::Unpack_exception);
2501 
2502   // load throwing pc from JavaThread and patch it as the return address
2503   // of the current frame. Then clear the field in JavaThread
2504   __ get_thread(rdi);
2505   __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2506   __ movptr(Address(rbp, wordSize), rdx);
2507   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2508 
2509 #ifdef ASSERT
2510   // verify that there is really an exception oop in JavaThread
2511   __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2512   __ verify_oop(rax);
2513 
2514   // verify that there is no pending exception
2515   Label no_pending_exception;
2516   __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2517   __ testptr(rax, rax);
2518   __ jcc(Assembler::zero, no_pending_exception);
2519   __ stop("must not have pending exception here");
2520   __ bind(no_pending_exception);
2521 #endif
2522 
2523   __ bind(cont);
2524 
2525   // Compiled code leaves the floating point stack dirty, empty it.
2526   __ empty_FPU_stack();
2527 
2528 
2529   // Call C code.  Need thread and this frame, but NOT official VM entry
2530   // crud.  We cannot block on this call, no GC can happen.
2531   __ get_thread(rcx);
2532   __ push(rcx);
2533   // fetch_unroll_info needs to call last_java_frame()
2534   __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2535 
2536   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2537 
2538   // Need to have an oopmap that tells fetch_unroll_info where to
2539   // find any register it might need.
2540 
2541   oop_maps->add_gc_map( __ pc()-start, map);
2542 
2543   // Discard args to fetch_unroll_info
2544   __ pop(rcx);
2545   __ pop(rcx);
2546 
2547   __ get_thread(rcx);
2548   __ reset_last_Java_frame(rcx, false, false);
2549 
2550   // Load UnrollBlock into EDI
2551   __ mov(rdi, rax);
2552 
2553   // Move the unpack kind to a safe place in the UnrollBlock because
2554   // we are very short of registers
2555 
2556   Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2557   // retrieve the deopt kind from the UnrollBlock.
2558   __ movl(rax, unpack_kind);
2559 
2560    Label noException;
2561   __ cmpl(rax, Deoptimization::Unpack_exception);   // Was exception pending?
2562   __ jcc(Assembler::notEqual, noException);
2563   __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2564   __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2565   __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2566   __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2567 
2568   __ verify_oop(rax);
2569 
2570   // Overwrite the result registers with the exception results.
2571   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2572   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2573 
2574   __ bind(noException);
2575 
2576   // Stack is back to only having register save data on the stack.
2577   // Now restore the result registers. Everything else is either dead or captured
2578   // in the vframeArray.
2579 
2580   RegisterSaver::restore_result_registers(masm);
2581 
2582   // Non standard control word may be leaked out through a safepoint blob, and we can
2583   // deopt at a poll point with the non standard control word. However, we should make
2584   // sure the control word is correct after restore_result_registers.
2585   __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2586 
2587   // All of the register save area has been popped of the stack. Only the
2588   // return address remains.
2589 
2590   // Pop all the frames we must move/replace.
2591   //
2592   // Frame picture (youngest to oldest)
2593   // 1: self-frame (no frame link)
2594   // 2: deopting frame  (no frame link)
2595   // 3: caller of deopting frame (could be compiled/interpreted).
2596   //
2597   // Note: by leaving the return address of self-frame on the stack
2598   // and using the size of frame 2 to adjust the stack
2599   // when we are done the return to frame 3 will still be on the stack.
2600 
2601   // Pop deoptimized frame
2602   __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2603 
2604   // sp should be pointing at the return address to the caller (3)
2605 
2606   // Pick up the initial fp we should save
2607   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2608   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2609 
2610 #ifdef ASSERT
2611   // Compilers generate code that bang the stack by as much as the
2612   // interpreter would need. So this stack banging should never
2613   // trigger a fault. Verify that it does not on non product builds.
2614   if (UseStackBanging) {
2615     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2616     __ bang_stack_size(rbx, rcx);
2617   }
2618 #endif
2619 
2620   // Load array of frame pcs into ECX
2621   __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2622 
2623   __ pop(rsi); // trash the old pc
2624 
2625   // Load array of frame sizes into ESI
2626   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2627 
2628   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2629 
2630   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2631   __ movl(counter, rbx);
2632 
2633   // Now adjust the caller's stack to make up for the extra locals
2634   // but record the original sp so that we can save it in the skeletal interpreter
2635   // frame and the stack walking of interpreter_sender will get the unextended sp
2636   // value and not the "real" sp value.
2637 
2638   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2639   __ movptr(sp_temp, rsp);
2640   __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2641   __ subptr(rsp, rbx);
2642 
2643   // Push interpreter frames in a loop
2644   Label loop;
2645   __ bind(loop);
2646   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2647   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2648   __ pushptr(Address(rcx, 0));          // save return address
2649   __ enter();                           // save old & set new rbp,
2650   __ subptr(rsp, rbx);                  // Prolog!
2651   __ movptr(rbx, sp_temp);              // sender's sp
2652   // This value is corrected by layout_activation_impl
2653   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2654   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2655   __ movptr(sp_temp, rsp);              // pass to next frame
2656   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2657   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2658   __ decrementl(counter);             // decrement counter
2659   __ jcc(Assembler::notZero, loop);
2660   __ pushptr(Address(rcx, 0));          // save final return address
2661 
2662   // Re-push self-frame
2663   __ enter();                           // save old & set new rbp,
2664 
2665   //  Return address and rbp, are in place
2666   // We'll push additional args later. Just allocate a full sized
2667   // register save area
2668   __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2669 
2670   // Restore frame locals after moving the frame
2671   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2672   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2673   __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize));   // Pop float stack and store in local
2674   if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2675   if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2676 
2677   // Set up the args to unpack_frame
2678 
2679   __ pushl(unpack_kind);                     // get the unpack_kind value
2680   __ get_thread(rcx);
2681   __ push(rcx);
2682 
2683   // set last_Java_sp, last_Java_fp
2684   __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2685 
2686   // Call C code.  Need thread but NOT official VM entry
2687   // crud.  We cannot block on this call, no GC can happen.  Call should
2688   // restore return values to their stack-slots with the new SP.
2689   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2690   // Set an oopmap for the call site
2691   oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2692 
2693   // rax, contains the return result type
2694   __ push(rax);
2695 
2696   __ get_thread(rcx);
2697   __ reset_last_Java_frame(rcx, false, false);
2698 
2699   // Collect return values
2700   __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2701   __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2702 
2703   // Clear floating point stack before returning to interpreter
2704   __ empty_FPU_stack();
2705 
2706   // Check if we should push the float or double return value.
2707   Label results_done, yes_double_value;
2708   __ cmpl(Address(rsp, 0), T_DOUBLE);
2709   __ jcc (Assembler::zero, yes_double_value);
2710   __ cmpl(Address(rsp, 0), T_FLOAT);
2711   __ jcc (Assembler::notZero, results_done);
2712 
2713   // return float value as expected by interpreter
2714   if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2715   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2716   __ jmp(results_done);
2717 
2718   // return double value as expected by interpreter
2719   __ bind(yes_double_value);
2720   if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2721   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2722 
2723   __ bind(results_done);
2724 
2725   // Pop self-frame.
2726   __ leave();                              // Epilog!
2727 
2728   // Jump to interpreter
2729   __ ret(0);
2730 
2731   // -------------
2732   // make sure all code is generated
2733   masm->flush();
2734 
2735   _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2736   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2737 }
2738 
2739 
2740 #ifdef COMPILER2
2741 //------------------------------generate_uncommon_trap_blob--------------------
2742 void SharedRuntime::generate_uncommon_trap_blob() {
2743   // allocate space for the code
2744   ResourceMark rm;
2745   // setup code generation tools
2746   CodeBuffer   buffer("uncommon_trap_blob", 512, 512);
2747   MacroAssembler* masm = new MacroAssembler(&buffer);
2748 
2749   enum frame_layout {
2750     arg0_off,      // thread                     sp + 0 // Arg location for
2751     arg1_off,      // unloaded_class_index       sp + 1 // calling C
2752     arg2_off,      // exec_mode                  sp + 2
2753     // The frame sender code expects that rbp will be in the "natural" place and
2754     // will override any oopMap setting for it. We must therefore force the layout
2755     // so that it agrees with the frame sender code.
2756     rbp_off,       // callee saved register      sp + 3
2757     return_off,    // slot for return address    sp + 4
2758     framesize
2759   };
2760 
2761   address start = __ pc();
2762 
2763   if (UseRTMLocking) {
2764     // Abort RTM transaction before possible nmethod deoptimization.
2765     __ xabort(0);
2766   }
2767 
2768   // Push self-frame.
2769   __ subptr(rsp, return_off*wordSize);     // Epilog!
2770 
2771   // rbp, is an implicitly saved callee saved register (i.e. the calling
2772   // convention will save restore it in prolog/epilog) Other than that
2773   // there are no callee save registers no that adapter frames are gone.
2774   __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2775 
2776   // Clear the floating point exception stack
2777   __ empty_FPU_stack();
2778 
2779   // set last_Java_sp
2780   __ get_thread(rdx);
2781   __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2782 
2783   // Call C code.  Need thread but NOT official VM entry
2784   // crud.  We cannot block on this call, no GC can happen.  Call should
2785   // capture callee-saved registers as well as return values.
2786   __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2787   // argument already in ECX
2788   __ movl(Address(rsp, arg1_off*wordSize),rcx);
2789   __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2790   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2791 
2792   // Set an oopmap for the call site
2793   OopMapSet *oop_maps = new OopMapSet();
2794   OopMap* map =  new OopMap( framesize, 0 );
2795   // No oopMap for rbp, it is known implicitly
2796 
2797   oop_maps->add_gc_map( __ pc()-start, map);
2798 
2799   __ get_thread(rcx);
2800 
2801   __ reset_last_Java_frame(rcx, false, false);
2802 
2803   // Load UnrollBlock into EDI
2804   __ movptr(rdi, rax);
2805 
2806 #ifdef ASSERT
2807   { Label L;
2808     __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2809             (int32_t)Deoptimization::Unpack_uncommon_trap);
2810     __ jcc(Assembler::equal, L);
2811     __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2812     __ bind(L);
2813   }
2814 #endif
2815 
2816   // Pop all the frames we must move/replace.
2817   //
2818   // Frame picture (youngest to oldest)
2819   // 1: self-frame (no frame link)
2820   // 2: deopting frame  (no frame link)
2821   // 3: caller of deopting frame (could be compiled/interpreted).
2822 
2823   // Pop self-frame.  We have no frame, and must rely only on EAX and ESP.
2824   __ addptr(rsp,(framesize-1)*wordSize);     // Epilog!
2825 
2826   // Pop deoptimized frame
2827   __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2828   __ addptr(rsp, rcx);
2829 
2830   // sp should be pointing at the return address to the caller (3)
2831 
2832   // Pick up the initial fp we should save
2833   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2834   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2835 
2836 #ifdef ASSERT
2837   // Compilers generate code that bang the stack by as much as the
2838   // interpreter would need. So this stack banging should never
2839   // trigger a fault. Verify that it does not on non product builds.
2840   if (UseStackBanging) {
2841     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2842     __ bang_stack_size(rbx, rcx);
2843   }
2844 #endif
2845 
2846   // Load array of frame pcs into ECX
2847   __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2848 
2849   __ pop(rsi); // trash the pc
2850 
2851   // Load array of frame sizes into ESI
2852   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2853 
2854   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2855 
2856   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2857   __ movl(counter, rbx);
2858 
2859   // Now adjust the caller's stack to make up for the extra locals
2860   // but record the original sp so that we can save it in the skeletal interpreter
2861   // frame and the stack walking of interpreter_sender will get the unextended sp
2862   // value and not the "real" sp value.
2863 
2864   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2865   __ movptr(sp_temp, rsp);
2866   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2867   __ subptr(rsp, rbx);
2868 
2869   // Push interpreter frames in a loop
2870   Label loop;
2871   __ bind(loop);
2872   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2873   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2874   __ pushptr(Address(rcx, 0));          // save return address
2875   __ enter();                           // save old & set new rbp,
2876   __ subptr(rsp, rbx);                  // Prolog!
2877   __ movptr(rbx, sp_temp);              // sender's sp
2878   // This value is corrected by layout_activation_impl
2879   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2880   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2881   __ movptr(sp_temp, rsp);              // pass to next frame
2882   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2883   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2884   __ decrementl(counter);             // decrement counter
2885   __ jcc(Assembler::notZero, loop);
2886   __ pushptr(Address(rcx, 0));            // save final return address
2887 
2888   // Re-push self-frame
2889   __ enter();                           // save old & set new rbp,
2890   __ subptr(rsp, (framesize-2) * wordSize);   // Prolog!
2891 
2892 
2893   // set last_Java_sp, last_Java_fp
2894   __ get_thread(rdi);
2895   __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2896 
2897   // Call C code.  Need thread but NOT official VM entry
2898   // crud.  We cannot block on this call, no GC can happen.  Call should
2899   // restore return values to their stack-slots with the new SP.
2900   __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2901   __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2902   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2903   // Set an oopmap for the call site
2904   oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2905 
2906   __ get_thread(rdi);
2907   __ reset_last_Java_frame(rdi, true, false);
2908 
2909   // Pop self-frame.
2910   __ leave();     // Epilog!
2911 
2912   // Jump to interpreter
2913   __ ret(0);
2914 
2915   // -------------
2916   // make sure all code is generated
2917   masm->flush();
2918 
2919    _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2920 }
2921 #endif // COMPILER2
2922 
2923 //------------------------------generate_handler_blob------
2924 //
2925 // Generate a special Compile2Runtime blob that saves all registers,
2926 // setup oopmap, and calls safepoint code to stop the compiled code for
2927 // a safepoint.
2928 //
2929 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2930 
2931   // Account for thread arg in our frame
2932   const int additional_words = 1;
2933   int frame_size_in_words;
2934 
2935   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2936 
2937   ResourceMark rm;
2938   OopMapSet *oop_maps = new OopMapSet();
2939   OopMap* map;
2940 
2941   // allocate space for the code
2942   // setup code generation tools
2943   CodeBuffer   buffer("handler_blob", 1024, 512);
2944   MacroAssembler* masm = new MacroAssembler(&buffer);
2945 
2946   const Register java_thread = rdi; // callee-saved for VC++
2947   address start   = __ pc();
2948   address call_pc = NULL;
2949   bool cause_return = (poll_type == POLL_AT_RETURN);
2950   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2951 
2952   if (UseRTMLocking) {
2953     // Abort RTM transaction before calling runtime
2954     // because critical section will be large and will be
2955     // aborted anyway. Also nmethod could be deoptimized.
2956     __ xabort(0);
2957   }
2958 
2959   // If cause_return is true we are at a poll_return and there is
2960   // the return address on the stack to the caller on the nmethod
2961   // that is safepoint. We can leave this return on the stack and
2962   // effectively complete the return and safepoint in the caller.
2963   // Otherwise we push space for a return address that the safepoint
2964   // handler will install later to make the stack walking sensible.
2965   if (!cause_return)
2966     __ push(rbx);  // Make room for return address (or push it again)
2967 
2968   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2969 
2970   // The following is basically a call_VM. However, we need the precise
2971   // address of the call in order to generate an oopmap. Hence, we do all the
2972   // work ourselves.
2973 
2974   // Push thread argument and setup last_Java_sp
2975   __ get_thread(java_thread);
2976   __ push(java_thread);
2977   __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2978 
2979   // if this was not a poll_return then we need to correct the return address now.
2980   if (!cause_return) {
2981     __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2982     __ movptr(Address(rbp, wordSize), rax);
2983   }
2984 
2985   // do the call
2986   __ call(RuntimeAddress(call_ptr));
2987 
2988   // Set an oopmap for the call site.  This oopmap will map all
2989   // oop-registers and debug-info registers as callee-saved.  This
2990   // will allow deoptimization at this safepoint to find all possible
2991   // debug-info recordings, as well as let GC find all oops.
2992 
2993   oop_maps->add_gc_map( __ pc() - start, map);
2994 
2995   // Discard arg
2996   __ pop(rcx);
2997 
2998   Label noException;
2999 
3000   // Clear last_Java_sp again
3001   __ get_thread(java_thread);
3002   __ reset_last_Java_frame(java_thread, false, false);
3003 
3004   __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3005   __ jcc(Assembler::equal, noException);
3006 
3007   // Exception pending
3008   RegisterSaver::restore_live_registers(masm, save_vectors);
3009 
3010   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3011 
3012   __ bind(noException);
3013 
3014   // Normal exit, register restoring and exit
3015   RegisterSaver::restore_live_registers(masm, save_vectors);
3016 
3017   __ ret(0);
3018 
3019   // make sure all code is generated
3020   masm->flush();
3021 
3022   // Fill-out other meta info
3023   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3024 }
3025 
3026 //
3027 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3028 //
3029 // Generate a stub that calls into vm to find out the proper destination
3030 // of a java call. All the argument registers are live at this point
3031 // but since this is generic code we don't know what they are and the caller
3032 // must do any gc of the args.
3033 //
3034 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3035   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3036 
3037   // allocate space for the code
3038   ResourceMark rm;
3039 
3040   CodeBuffer buffer(name, 1000, 512);
3041   MacroAssembler* masm                = new MacroAssembler(&buffer);
3042 
3043   int frame_size_words;
3044   enum frame_layout {
3045                 thread_off,
3046                 extra_words };
3047 
3048   OopMapSet *oop_maps = new OopMapSet();
3049   OopMap* map = NULL;
3050 
3051   int start = __ offset();
3052 
3053   map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3054 
3055   int frame_complete = __ offset();
3056 
3057   const Register thread = rdi;
3058   __ get_thread(rdi);
3059 
3060   __ push(thread);
3061   __ set_last_Java_frame(thread, noreg, rbp, NULL);
3062 
3063   __ call(RuntimeAddress(destination));
3064 
3065 
3066   // Set an oopmap for the call site.
3067   // We need this not only for callee-saved registers, but also for volatile
3068   // registers that the compiler might be keeping live across a safepoint.
3069 
3070   oop_maps->add_gc_map( __ offset() - start, map);
3071 
3072   // rax, contains the address we are going to jump to assuming no exception got installed
3073 
3074   __ addptr(rsp, wordSize);
3075 
3076   // clear last_Java_sp
3077   __ reset_last_Java_frame(thread, true, false);
3078   // check for pending exceptions
3079   Label pending;
3080   __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3081   __ jcc(Assembler::notEqual, pending);
3082 
3083   // get the returned Method*
3084   __ get_vm_result_2(rbx, thread);
3085   __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3086 
3087   __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3088 
3089   RegisterSaver::restore_live_registers(masm);
3090 
3091   // We are back the the original state on entry and ready to go.
3092 
3093   __ jmp(rax);
3094 
3095   // Pending exception after the safepoint
3096 
3097   __ bind(pending);
3098 
3099   RegisterSaver::restore_live_registers(masm);
3100 
3101   // exception pending => remove activation and forward to exception handler
3102 
3103   __ get_thread(thread);
3104   __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3105   __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3106   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3107 
3108   // -------------
3109   // make sure all code is generated
3110   masm->flush();
3111 
3112   // return the  blob
3113   // frame_size_words or bytes??
3114   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3115 }