9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_RUNTIME_ATOMIC_HPP
26 #define SHARE_VM_RUNTIME_ATOMIC_HPP
27
28 #include "memory/allocation.hpp"
29
30 class Atomic : AllStatic {
31 private:
32 static jbyte cmpxchg_general(jbyte exchange_value, volatile jbyte* dest, jbyte compare_value);
33
34 public:
35 // Atomic operations on jlong types are not available on all 32-bit
36 // platforms. If atomic ops on jlongs are defined here they must only
37 // be used from code that verifies they are available at runtime and
38 // can provide an alternative action if not - see supports_cx8() for
39 // a means to test availability.
40
41 // The memory operations that are mentioned with each of the atomic
42 // function families come from src/share/vm/runtime/orderAccess.hpp,
43 // e.g., <fence> is described in that file and is implemented by the
44 // OrderAccess::fence() function. See that file for the gory details
45 // on the Memory Access Ordering Model.
46
47 // All of the atomic operations that imply a read-modify-write action
48 // guarantee a two-way memory barrier across that operation. Historically
49 // these semantics reflect the strength of atomic operations that are
50 // provided on SPARC/X86. We assume that strength is necessary unless
51 // we can prove that a weaker form is sufficiently safe.
52
53 // Atomically store to a location
|
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_RUNTIME_ATOMIC_HPP
26 #define SHARE_VM_RUNTIME_ATOMIC_HPP
27
28 #include "memory/allocation.hpp"
29 #include "utilities/traits/selectBaseClass.hpp"
30
31 class AtomicPlatform;
32
33 class AtomicBase : AllStatic {
34 protected:
35 static jbyte cmpxchg_general(jbyte exchange_value, volatile jbyte* dest, jbyte compare_value);
36 public:
37 inline static jbyte cmpxchg(jbyte exchange_value, volatile jbyte* dest, jbyte compare_value) {
38 return cmpxchg_general(exchange_value, dest, compare_value);
39 }
40 };
41
42 // Linux
43 #ifdef TARGET_OS_ARCH_linux_x86
44 # include "atomic_linux_x86.hpp"
45 #endif
46
47 // Solaris
48 #ifdef TARGET_OS_ARCH_solaris_x86
49 # include "atomic_solaris_x86.hpp"
50 #endif
51
52 // Windows
53 #ifdef TARGET_OS_ARCH_windows_x86
54 # include "atomic_windows_x86.hpp"
55 #endif
56
57 // BSD
58 #ifdef TARGET_OS_ARCH_bsd_x86
59 # include "atomic_bsd_x86.hpp"
60 #endif
61
62 typedef SelectBaseClass<AtomicPlatform, AtomicBase>::type AtomicSuper;
63
64 class Atomic : public AtomicSuper {
65 public:
66 // Atomic operations on jlong types are not available on all 32-bit
67 // platforms. If atomic ops on jlongs are defined here they must only
68 // be used from code that verifies they are available at runtime and
69 // can provide an alternative action if not - see supports_cx8() for
70 // a means to test availability.
71
72 // The memory operations that are mentioned with each of the atomic
73 // function families come from src/share/vm/runtime/orderAccess.hpp,
74 // e.g., <fence> is described in that file and is implemented by the
75 // OrderAccess::fence() function. See that file for the gory details
76 // on the Memory Access Ordering Model.
77
78 // All of the atomic operations that imply a read-modify-write action
79 // guarantee a two-way memory barrier across that operation. Historically
80 // these semantics reflect the strength of atomic operations that are
81 // provided on SPARC/X86. We assume that strength is necessary unless
82 // we can prove that a weaker form is sufficiently safe.
83
84 // Atomically store to a location
|