1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 t = T_OBJECT;
111 case T_BOOLEAN:
112 case T_CHAR:
113 case T_FLOAT:
114 case T_DOUBLE:
115 case T_BYTE:
116 case T_SHORT:
117 case T_INT:
118 case T_LONG:
119 case T_OBJECT:
120 case T_ADDRESS:
121 case T_VOID:
122 return ::type2char(t);
123 case T_METADATA:
124 return 'M';
125 case T_ILLEGAL:
126 return '?';
127
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
168 assert((kindfield == cpu_register || kindfield == stack_value) &&
169 size_field() == single_size, "must match");
170 break;
171
172 case T_ILLEGAL:
173 // XXX TKR also means unknown right now
174 // assert(is_illegal(), "must match");
175 break;
176
177 default:
178 ShouldNotReachHere();
179 }
180 }
181 #endif
182
183 }
184 #endif // PRODUCT
185
186
187 bool LIR_OprDesc::is_oop() const {
188 if (is_pointer()) {
189 return pointer()->is_oop_pointer();
190 } else {
191 OprType t= type_field();
192 assert(t != unknown_type, "not set");
193 return t == object_type;
194 }
195 }
196
197
198
199 void LIR_Op2::verify() const {
200 #ifdef ASSERT
201 switch (code()) {
202 case lir_cmove:
203 case lir_xchg:
204 break;
205
206 default:
207 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
208 "can't produce oops from arith");
209 }
210
211 if (TwoOperandLIRForm) {
212
213 #ifdef ASSERT
214 bool threeOperandForm = false;
215 #ifdef S390
216 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
217 threeOperandForm =
218 code() == lir_shl ||
219 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
220 #endif
221 #endif
222
223 switch (code()) {
224 case lir_add:
225 case lir_sub:
226 case lir_mul:
227 case lir_mul_strictfp:
228 case lir_div:
229 case lir_div_strictfp:
230 case lir_rem:
231 case lir_logic_and:
232 case lir_logic_or:
233 case lir_logic_xor:
234 case lir_shl:
235 case lir_shr:
236 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
237 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
238 break;
239
240 // special handling for lir_ushr because of write barriers
241 case lir_ushr:
242 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
243 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
244 break;
245
246 default:
247 break;
248 }
249 }
250 #endif
251 }
252
253
254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
255 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
256 , _cond(cond)
257 , _type(type)
258 , _label(block->label())
259 , _block(block)
260 , _ublock(NULL)
261 , _stub(NULL) {
262 }
263
264 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
265 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
266 , _cond(cond)
267 , _type(type)
268 , _label(stub->entry())
269 , _block(NULL)
270 , _ublock(NULL)
271 , _stub(stub) {
272 }
273
274 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
275 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
276 , _cond(cond)
277 , _type(type)
278 , _label(block->label())
279 , _block(block)
280 , _ublock(ublock)
281 , _stub(NULL)
282 {
283 }
284
285 void LIR_OpBranch::change_block(BlockBegin* b) {
286 assert(_block != NULL, "must have old block");
287 assert(_block->label() == label(), "must be equal");
288
289 _block = b;
290 _label = b->label();
291 }
292
293 void LIR_OpBranch::change_ublock(BlockBegin* b) {
294 assert(_ublock != NULL, "must have old block");
295 _ublock = b;
296 }
297
298 void LIR_OpBranch::negate_cond() {
299 switch (_cond) {
300 case lir_cond_equal: _cond = lir_cond_notEqual; break;
301 case lir_cond_notEqual: _cond = lir_cond_equal; break;
302 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
303 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
304 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
305 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
306 default: ShouldNotReachHere();
307 }
308 }
309
310
311 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
312 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
313 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
314 CodeStub* stub)
315
316 : LIR_Op(code, result, NULL)
317 , _object(object)
318 , _array(LIR_OprFact::illegalOpr)
319 , _klass(klass)
320 , _tmp1(tmp1)
321 , _tmp2(tmp2)
322 , _tmp3(tmp3)
323 , _fast_check(fast_check)
324 , _stub(stub)
325 , _info_for_patch(info_for_patch)
326 , _info_for_exception(info_for_exception)
327 , _profiled_method(NULL)
328 , _profiled_bci(-1)
329 , _should_profile(false)
330 {
331 if (code == lir_checkcast) {
332 assert(info_for_exception != NULL, "checkcast throws exceptions");
333 } else if (code == lir_instanceof) {
334 assert(info_for_exception == NULL, "instanceof throws no exceptions");
335 } else {
336 ShouldNotReachHere();
337 }
338 }
339
340
341
342 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
343 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
344 , _object(object)
345 , _array(array)
346 , _klass(NULL)
347 , _tmp1(tmp1)
348 , _tmp2(tmp2)
349 , _tmp3(tmp3)
350 , _fast_check(false)
351 , _stub(NULL)
352 , _info_for_patch(NULL)
353 , _info_for_exception(info_for_exception)
354 , _profiled_method(NULL)
355 , _profiled_bci(-1)
356 , _should_profile(false)
357 {
358 if (code == lir_store_check) {
359 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
360 assert(info_for_exception != NULL, "store_check throws exceptions");
361 } else {
362 ShouldNotReachHere();
363 }
364 }
365
366
367 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
368 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
369 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
370 , _tmp(tmp)
371 , _src(src)
372 , _src_pos(src_pos)
373 , _dst(dst)
374 , _dst_pos(dst_pos)
375 , _flags(flags)
376 , _expected_type(expected_type)
377 , _length(length) {
378 _stub = new ArrayCopyStub(this);
379 }
380
381 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
382 : LIR_Op(lir_updatecrc32, res, NULL)
383 , _crc(crc)
384 , _val(val) {
385 }
386
387 //-------------------verify--------------------------
388
389 void LIR_Op1::verify() const {
390 switch(code()) {
391 case lir_move:
392 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
393 break;
394 case lir_null_check:
395 assert(in_opr()->is_register(), "must be");
396 break;
397 case lir_return:
398 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
399 break;
400 default:
401 break;
402 }
403 }
404
405 void LIR_OpRTCall::verify() const {
406 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
407 }
408
409 //-------------------visits--------------------------
410
411 // complete rework of LIR instruction visitor.
412 // The virtual call for each instruction type is replaced by a big
413 // switch that adds the operands for each instruction
414
415 void LIR_OpVisitState::visit(LIR_Op* op) {
416 // copy information from the LIR_Op
417 reset();
418 set_op(op);
419
420 switch (op->code()) {
421
422 // LIR_Op0
423 case lir_word_align: // result and info always invalid
424 case lir_backwardbranch_target: // result and info always invalid
425 case lir_build_frame: // result and info always invalid
426 case lir_fpop_raw: // result and info always invalid
427 case lir_24bit_FPU: // result and info always invalid
428 case lir_reset_FPU: // result and info always invalid
429 case lir_breakpoint: // result and info always invalid
430 case lir_membar: // result and info always invalid
431 case lir_membar_acquire: // result and info always invalid
432 case lir_membar_release: // result and info always invalid
433 case lir_membar_loadload: // result and info always invalid
434 case lir_membar_storestore: // result and info always invalid
435 case lir_membar_loadstore: // result and info always invalid
436 case lir_membar_storeload: // result and info always invalid
437 case lir_on_spin_wait:
438 {
439 assert(op->as_Op0() != NULL, "must be");
440 assert(op->_info == NULL, "info not used by this instruction");
441 assert(op->_result->is_illegal(), "not used");
442 break;
443 }
444
445 case lir_nop: // may have info, result always invalid
446 case lir_std_entry: // may have result, info always invalid
447 case lir_osr_entry: // may have result, info always invalid
448 case lir_get_thread: // may have result, info always invalid
449 {
450 assert(op->as_Op0() != NULL, "must be");
451 if (op->_info != NULL) do_info(op->_info);
452 if (op->_result->is_valid()) do_output(op->_result);
453 break;
454 }
455
456
457 // LIR_OpLabel
458 case lir_label: // result and info always invalid
459 {
460 assert(op->as_OpLabel() != NULL, "must be");
461 assert(op->_info == NULL, "info not used by this instruction");
462 assert(op->_result->is_illegal(), "not used");
463 break;
464 }
465
466
467 // LIR_Op1
468 case lir_fxch: // input always valid, result and info always invalid
469 case lir_fld: // input always valid, result and info always invalid
470 case lir_ffree: // input always valid, result and info always invalid
471 case lir_push: // input always valid, result and info always invalid
472 case lir_pop: // input always valid, result and info always invalid
473 case lir_return: // input always valid, result and info always invalid
474 case lir_leal: // input and result always valid, info always invalid
475 case lir_neg: // input and result always valid, info always invalid
476 case lir_monaddr: // input and result always valid, info always invalid
477 case lir_null_check: // input and info always valid, result always invalid
478 case lir_move: // input and result always valid, may have info
479 case lir_pack64: // input and result always valid
480 case lir_unpack64: // input and result always valid
481 {
482 assert(op->as_Op1() != NULL, "must be");
483 LIR_Op1* op1 = (LIR_Op1*)op;
484
485 if (op1->_info) do_info(op1->_info);
486 if (op1->_opr->is_valid()) do_input(op1->_opr);
487 if (op1->_result->is_valid()) do_output(op1->_result);
488
489 break;
490 }
491
492 case lir_safepoint:
493 {
494 assert(op->as_Op1() != NULL, "must be");
495 LIR_Op1* op1 = (LIR_Op1*)op;
496
497 assert(op1->_info != NULL, ""); do_info(op1->_info);
498 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
499 assert(op1->_result->is_illegal(), "safepoint does not produce value");
500
501 break;
502 }
503
504 // LIR_OpConvert;
505 case lir_convert: // input and result always valid, info always invalid
506 {
507 assert(op->as_OpConvert() != NULL, "must be");
508 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
509
510 assert(opConvert->_info == NULL, "must be");
511 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
512 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
513 #ifdef PPC32
514 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
515 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
516 #endif
517 do_stub(opConvert->_stub);
518
519 break;
520 }
521
522 // LIR_OpBranch;
523 case lir_branch: // may have info, input and result register always invalid
524 case lir_cond_float_branch: // may have info, input and result register always invalid
525 {
526 assert(op->as_OpBranch() != NULL, "must be");
527 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
528
529 if (opBranch->_info != NULL) do_info(opBranch->_info);
530 assert(opBranch->_result->is_illegal(), "not used");
531 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
532
533 break;
534 }
535
536
537 // LIR_OpAllocObj
538 case lir_alloc_object:
539 {
540 assert(op->as_OpAllocObj() != NULL, "must be");
541 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
542
543 if (opAllocObj->_info) do_info(opAllocObj->_info);
544 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
545 do_temp(opAllocObj->_opr);
546 }
547 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
548 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
549 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
550 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
551 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
552 do_stub(opAllocObj->_stub);
553 break;
554 }
555
556
557 // LIR_OpRoundFP;
558 case lir_roundfp: {
559 assert(op->as_OpRoundFP() != NULL, "must be");
560 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
561
562 assert(op->_info == NULL, "info not used by this instruction");
563 assert(opRoundFP->_tmp->is_illegal(), "not used");
564 do_input(opRoundFP->_opr);
565 do_output(opRoundFP->_result);
566
567 break;
568 }
569
570
571 // LIR_Op2
572 case lir_cmp:
573 case lir_cmp_l2i:
574 case lir_ucmp_fd2i:
575 case lir_cmp_fd2i:
576 case lir_add:
577 case lir_sub:
578 case lir_mul:
579 case lir_div:
580 case lir_rem:
581 case lir_sqrt:
582 case lir_abs:
583 case lir_logic_and:
584 case lir_logic_or:
585 case lir_logic_xor:
586 case lir_shl:
587 case lir_shr:
588 case lir_ushr:
589 case lir_xadd:
590 case lir_xchg:
591 case lir_assert:
592 {
593 assert(op->as_Op2() != NULL, "must be");
594 LIR_Op2* op2 = (LIR_Op2*)op;
595 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
596 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
597
598 if (op2->_info) do_info(op2->_info);
599 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
600 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
601 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
602 if (op2->_result->is_valid()) do_output(op2->_result);
603 if (op->code() == lir_xchg || op->code() == lir_xadd) {
604 // on ARM and PPC, return value is loaded first so could
605 // destroy inputs. On other platforms that implement those
606 // (x86, sparc), the extra constrainsts are harmless.
607 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
608 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
609 }
610
611 break;
612 }
613
614 // special handling for cmove: right input operand must not be equal
615 // to the result operand, otherwise the backend fails
616 case lir_cmove:
617 {
618 assert(op->as_Op2() != NULL, "must be");
619 LIR_Op2* op2 = (LIR_Op2*)op;
620
621 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
622 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
623 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
624
625 do_input(op2->_opr1);
626 do_input(op2->_opr2);
627 do_temp(op2->_opr2);
628 do_output(op2->_result);
629
630 break;
631 }
632
633 // vspecial handling for strict operations: register input operands
634 // as temp to guarantee that they do not overlap with other
635 // registers
636 case lir_mul_strictfp:
637 case lir_div_strictfp:
638 {
639 assert(op->as_Op2() != NULL, "must be");
640 LIR_Op2* op2 = (LIR_Op2*)op;
641
642 assert(op2->_info == NULL, "not used");
643 assert(op2->_opr1->is_valid(), "used");
644 assert(op2->_opr2->is_valid(), "used");
645 assert(op2->_result->is_valid(), "used");
646 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
647 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
648
649 do_input(op2->_opr1); do_temp(op2->_opr1);
650 do_input(op2->_opr2); do_temp(op2->_opr2);
651 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
652 do_output(op2->_result);
653
654 break;
655 }
656
657 case lir_throw: {
658 assert(op->as_Op2() != NULL, "must be");
659 LIR_Op2* op2 = (LIR_Op2*)op;
660
661 if (op2->_info) do_info(op2->_info);
662 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
663 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
664 assert(op2->_result->is_illegal(), "no result");
665 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
666 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
667
668 break;
669 }
670
671 case lir_unwind: {
672 assert(op->as_Op1() != NULL, "must be");
673 LIR_Op1* op1 = (LIR_Op1*)op;
674
675 assert(op1->_info == NULL, "no info");
676 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
677 assert(op1->_result->is_illegal(), "no result");
678
679 break;
680 }
681
682 // LIR_Op3
683 case lir_idiv:
684 case lir_irem: {
685 assert(op->as_Op3() != NULL, "must be");
686 LIR_Op3* op3= (LIR_Op3*)op;
687
688 if (op3->_info) do_info(op3->_info);
689 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
690
691 // second operand is input and temp, so ensure that second operand
692 // and third operand get not the same register
693 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
694 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
695 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
696
697 if (op3->_result->is_valid()) do_output(op3->_result);
698
699 break;
700 }
701
702 case lir_fmad:
703 case lir_fmaf: {
704 assert(op->as_Op3() != NULL, "must be");
705 LIR_Op3* op3= (LIR_Op3*)op;
706 assert(op3->_info == NULL, "no info");
707 do_input(op3->_opr1);
708 do_input(op3->_opr2);
709 do_input(op3->_opr3);
710 do_output(op3->_result);
711 break;
712 }
713
714 // LIR_OpJavaCall
715 case lir_static_call:
716 case lir_optvirtual_call:
717 case lir_icvirtual_call:
718 case lir_virtual_call:
719 case lir_dynamic_call: {
720 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
721 assert(opJavaCall != NULL, "must be");
722
723 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
724
725 // only visit register parameters
726 int n = opJavaCall->_arguments->length();
727 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
728 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
729 do_input(*opJavaCall->_arguments->adr_at(i));
730 }
731 }
732
733 if (opJavaCall->_info) do_info(opJavaCall->_info);
734 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
735 opJavaCall->is_method_handle_invoke()) {
736 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
737 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
738 }
739 do_call();
740 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
741
742 break;
743 }
744
745
746 // LIR_OpRTCall
747 case lir_rtcall: {
748 assert(op->as_OpRTCall() != NULL, "must be");
749 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
750
751 // only visit register parameters
752 int n = opRTCall->_arguments->length();
753 for (int i = 0; i < n; i++) {
754 if (!opRTCall->_arguments->at(i)->is_pointer()) {
755 do_input(*opRTCall->_arguments->adr_at(i));
756 }
757 }
758 if (opRTCall->_info) do_info(opRTCall->_info);
759 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
760 do_call();
761 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
762
763 break;
764 }
765
766
767 // LIR_OpArrayCopy
768 case lir_arraycopy: {
769 assert(op->as_OpArrayCopy() != NULL, "must be");
770 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
771
772 assert(opArrayCopy->_result->is_illegal(), "unused");
773 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
774 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
775 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
776 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
777 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
778 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
779 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
780
781 // the implementation of arraycopy always has a call into the runtime
782 do_call();
783
784 break;
785 }
786
787
788 // LIR_OpUpdateCRC32
789 case lir_updatecrc32: {
790 assert(op->as_OpUpdateCRC32() != NULL, "must be");
791 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
792
793 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
794 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
795 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
796 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
797
798 break;
799 }
800
801
802 // LIR_OpLock
803 case lir_lock:
804 case lir_unlock: {
805 assert(op->as_OpLock() != NULL, "must be");
806 LIR_OpLock* opLock = (LIR_OpLock*)op;
807
808 if (opLock->_info) do_info(opLock->_info);
809
810 // TODO: check if these operands really have to be temp
811 // (or if input is sufficient). This may have influence on the oop map!
812 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
813 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
814 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
815
816 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
817 assert(opLock->_result->is_illegal(), "unused");
818
819 do_stub(opLock->_stub);
820
821 break;
822 }
823
824
825 // LIR_OpDelay
826 case lir_delay_slot: {
827 assert(op->as_OpDelay() != NULL, "must be");
828 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
829
830 visit(opDelay->delay_op());
831 break;
832 }
833
834 // LIR_OpTypeCheck
835 case lir_instanceof:
836 case lir_checkcast:
837 case lir_store_check: {
838 assert(op->as_OpTypeCheck() != NULL, "must be");
839 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
840
841 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
842 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
843 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
844 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
845 do_temp(opTypeCheck->_object);
846 }
847 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
848 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
849 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
850 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
851 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
852 do_stub(opTypeCheck->_stub);
853 break;
854 }
855
856 // LIR_OpCompareAndSwap
857 case lir_cas_long:
858 case lir_cas_obj:
859 case lir_cas_int: {
860 assert(op->as_OpCompareAndSwap() != NULL, "must be");
861 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
862
863 assert(opCompareAndSwap->_addr->is_valid(), "used");
864 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
865 assert(opCompareAndSwap->_new_value->is_valid(), "used");
866 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
867 do_input(opCompareAndSwap->_addr);
868 do_temp(opCompareAndSwap->_addr);
869 do_input(opCompareAndSwap->_cmp_value);
870 do_temp(opCompareAndSwap->_cmp_value);
871 do_input(opCompareAndSwap->_new_value);
872 do_temp(opCompareAndSwap->_new_value);
873 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
874 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
875 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
876
877 break;
878 }
879
880
881 // LIR_OpAllocArray;
882 case lir_alloc_array: {
883 assert(op->as_OpAllocArray() != NULL, "must be");
884 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
885
886 if (opAllocArray->_info) do_info(opAllocArray->_info);
887 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
888 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
889 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
890 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
891 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
892 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
893 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
894 do_stub(opAllocArray->_stub);
895 break;
896 }
897
898 // LIR_OpProfileCall:
899 case lir_profile_call: {
900 assert(op->as_OpProfileCall() != NULL, "must be");
901 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
902
903 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
904 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
905 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
906 break;
907 }
908
909 // LIR_OpProfileType:
910 case lir_profile_type: {
911 assert(op->as_OpProfileType() != NULL, "must be");
912 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
913
914 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
915 do_input(opProfileType->_obj);
916 do_temp(opProfileType->_tmp);
917 break;
918 }
919 default:
920 ShouldNotReachHere();
921 }
922 }
923
924
925 void LIR_OpVisitState::do_stub(CodeStub* stub) {
926 if (stub != NULL) {
927 stub->visit(this);
928 }
929 }
930
931 XHandlers* LIR_OpVisitState::all_xhandler() {
932 XHandlers* result = NULL;
933
934 int i;
935 for (i = 0; i < info_count(); i++) {
936 if (info_at(i)->exception_handlers() != NULL) {
937 result = info_at(i)->exception_handlers();
938 break;
939 }
940 }
941
942 #ifdef ASSERT
943 for (i = 0; i < info_count(); i++) {
944 assert(info_at(i)->exception_handlers() == NULL ||
945 info_at(i)->exception_handlers() == result,
946 "only one xhandler list allowed per LIR-operation");
947 }
948 #endif
949
950 if (result != NULL) {
951 return result;
952 } else {
953 return new XHandlers();
954 }
955
956 return result;
957 }
958
959
960 #ifdef ASSERT
961 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
962 visit(op);
963
964 return opr_count(inputMode) == 0 &&
965 opr_count(outputMode) == 0 &&
966 opr_count(tempMode) == 0 &&
967 info_count() == 0 &&
968 !has_call() &&
969 !has_slow_case();
970 }
971 #endif
972
973 //---------------------------------------------------
974
975
976 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
977 masm->emit_call(this);
978 }
979
980 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
981 masm->emit_rtcall(this);
982 }
983
984 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
985 masm->emit_opLabel(this);
986 }
987
988 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
989 masm->emit_arraycopy(this);
990 masm->append_code_stub(stub());
991 }
992
993 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
994 masm->emit_updatecrc32(this);
995 }
996
997 void LIR_Op0::emit_code(LIR_Assembler* masm) {
998 masm->emit_op0(this);
999 }
1000
1001 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1002 masm->emit_op1(this);
1003 }
1004
1005 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1006 masm->emit_alloc_obj(this);
1007 masm->append_code_stub(stub());
1008 }
1009
1010 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1011 masm->emit_opBranch(this);
1012 if (stub()) {
1013 masm->append_code_stub(stub());
1014 }
1015 }
1016
1017 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1018 masm->emit_opConvert(this);
1019 if (stub() != NULL) {
1020 masm->append_code_stub(stub());
1021 }
1022 }
1023
1024 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1025 masm->emit_op2(this);
1026 }
1027
1028 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1029 masm->emit_alloc_array(this);
1030 masm->append_code_stub(stub());
1031 }
1032
1033 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1034 masm->emit_opTypeCheck(this);
1035 if (stub()) {
1036 masm->append_code_stub(stub());
1037 }
1038 }
1039
1040 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1041 masm->emit_compare_and_swap(this);
1042 }
1043
1044 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1045 masm->emit_op3(this);
1046 }
1047
1048 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1049 masm->emit_lock(this);
1050 if (stub()) {
1051 masm->append_code_stub(stub());
1052 }
1053 }
1054
1055 #ifdef ASSERT
1056 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1057 masm->emit_assert(this);
1058 }
1059 #endif
1060
1061 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1062 masm->emit_delay(this);
1063 }
1064
1065 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1066 masm->emit_profile_call(this);
1067 }
1068
1069 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1070 masm->emit_profile_type(this);
1071 }
1072
1073 // LIR_List
1074 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1075 : _operations(8)
1076 , _compilation(compilation)
1077 #ifndef PRODUCT
1078 , _block(block)
1079 #endif
1080 #ifdef ASSERT
1081 , _file(NULL)
1082 , _line(0)
1083 #endif
1084 { }
1085
1086
1087 #ifdef ASSERT
1088 void LIR_List::set_file_and_line(const char * file, int line) {
1089 const char * f = strrchr(file, '/');
1090 if (f == NULL) f = strrchr(file, '\\');
1091 if (f == NULL) {
1092 f = file;
1093 } else {
1094 f++;
1095 }
1096 _file = f;
1097 _line = line;
1098 }
1099 #endif
1100
1101
1102 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1103 assert(this == buffer->lir_list(), "wrong lir list");
1104 const int n = _operations.length();
1105
1106 if (buffer->number_of_ops() > 0) {
1107 // increase size of instructions list
1108 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1109 // insert ops from buffer into instructions list
1110 int op_index = buffer->number_of_ops() - 1;
1111 int ip_index = buffer->number_of_insertion_points() - 1;
1112 int from_index = n - 1;
1113 int to_index = _operations.length() - 1;
1114 for (; ip_index >= 0; ip_index --) {
1115 int index = buffer->index_at(ip_index);
1116 // make room after insertion point
1117 while (index < from_index) {
1118 _operations.at_put(to_index --, _operations.at(from_index --));
1119 }
1120 // insert ops from buffer
1121 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1122 _operations.at_put(to_index --, buffer->op_at(op_index --));
1123 }
1124 }
1125 }
1126
1127 buffer->finish();
1128 }
1129
1130
1131 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1132 assert(reg->type() == T_OBJECT, "bad reg");
1133 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1134 }
1135
1136 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1137 assert(reg->type() == T_METADATA, "bad reg");
1138 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1139 }
1140
1141 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1142 append(new LIR_Op1(
1143 lir_move,
1144 LIR_OprFact::address(addr),
1145 src,
1146 addr->type(),
1147 patch_code,
1148 info));
1149 }
1150
1151
1152 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1153 append(new LIR_Op1(
1154 lir_move,
1155 LIR_OprFact::address(address),
1156 dst,
1157 address->type(),
1158 patch_code,
1159 info, lir_move_volatile));
1160 }
1161
1162 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1163 append(new LIR_Op1(
1164 lir_move,
1165 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1166 dst,
1167 type,
1168 patch_code,
1169 info, lir_move_volatile));
1170 }
1171
1172
1173 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1174 append(new LIR_Op1(
1175 lir_move,
1176 LIR_OprFact::intConst(v),
1177 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1178 type,
1179 patch_code,
1180 info));
1181 }
1182
1183
1184 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1185 append(new LIR_Op1(
1186 lir_move,
1187 LIR_OprFact::oopConst(o),
1188 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1189 type,
1190 patch_code,
1191 info));
1192 }
1193
1194
1195 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1196 append(new LIR_Op1(
1197 lir_move,
1198 src,
1199 LIR_OprFact::address(addr),
1200 addr->type(),
1201 patch_code,
1202 info));
1203 }
1204
1205
1206 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1207 append(new LIR_Op1(
1208 lir_move,
1209 src,
1210 LIR_OprFact::address(addr),
1211 addr->type(),
1212 patch_code,
1213 info,
1214 lir_move_volatile));
1215 }
1216
1217 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1218 append(new LIR_Op1(
1219 lir_move,
1220 src,
1221 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1222 type,
1223 patch_code,
1224 info, lir_move_volatile));
1225 }
1226
1227
1228 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1229 append(new LIR_Op3(
1230 lir_idiv,
1231 left,
1232 right,
1233 tmp,
1234 res,
1235 info));
1236 }
1237
1238
1239 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1240 append(new LIR_Op3(
1241 lir_idiv,
1242 left,
1243 LIR_OprFact::intConst(right),
1244 tmp,
1245 res,
1246 info));
1247 }
1248
1249
1250 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1251 append(new LIR_Op3(
1252 lir_irem,
1253 left,
1254 right,
1255 tmp,
1256 res,
1257 info));
1258 }
1259
1260
1261 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1262 append(new LIR_Op3(
1263 lir_irem,
1264 left,
1265 LIR_OprFact::intConst(right),
1266 tmp,
1267 res,
1268 info));
1269 }
1270
1271
1272 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1273 append(new LIR_Op2(
1274 lir_cmp,
1275 condition,
1276 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1277 LIR_OprFact::intConst(c),
1278 info));
1279 }
1280
1281
1282 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1283 append(new LIR_Op2(
1284 lir_cmp,
1285 condition,
1286 reg,
1287 LIR_OprFact::address(addr),
1288 info));
1289 }
1290
1291 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1292 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1293 append(new LIR_OpAllocObj(
1294 klass,
1295 dst,
1296 t1,
1297 t2,
1298 t3,
1299 t4,
1300 header_size,
1301 object_size,
1302 init_check,
1303 stub));
1304 }
1305
1306 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1307 append(new LIR_OpAllocArray(
1308 klass,
1309 len,
1310 dst,
1311 t1,
1312 t2,
1313 t3,
1314 t4,
1315 type,
1316 stub));
1317 }
1318
1319 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1320 append(new LIR_Op2(
1321 lir_shl,
1322 value,
1323 count,
1324 dst,
1325 tmp));
1326 }
1327
1328 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1329 append(new LIR_Op2(
1330 lir_shr,
1331 value,
1332 count,
1333 dst,
1334 tmp));
1335 }
1336
1337
1338 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1339 append(new LIR_Op2(
1340 lir_ushr,
1341 value,
1342 count,
1343 dst,
1344 tmp));
1345 }
1346
1347 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1348 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1349 left,
1350 right,
1351 dst));
1352 }
1353
1354 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1355 append(new LIR_OpLock(
1356 lir_lock,
1357 hdr,
1358 obj,
1359 lock,
1360 scratch,
1361 stub,
1362 info));
1363 }
1364
1365 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1366 append(new LIR_OpLock(
1367 lir_unlock,
1368 hdr,
1369 obj,
1370 lock,
1371 scratch,
1372 stub,
1373 NULL));
1374 }
1375
1376
1377 void check_LIR() {
1378 // cannot do the proper checking as PRODUCT and other modes return different results
1379 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1380 }
1381
1382
1383
1384 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1385 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1386 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1387 ciMethod* profiled_method, int profiled_bci) {
1388 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1389 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1390 if (profiled_method != NULL) {
1391 c->set_profiled_method(profiled_method);
1392 c->set_profiled_bci(profiled_bci);
1393 c->set_should_profile(true);
1394 }
1395 append(c);
1396 }
1397
1398 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1399 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1400 if (profiled_method != NULL) {
1401 c->set_profiled_method(profiled_method);
1402 c->set_profiled_bci(profiled_bci);
1403 c->set_should_profile(true);
1404 }
1405 append(c);
1406 }
1407
1408
1409 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1410 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1411 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1412 if (profiled_method != NULL) {
1413 c->set_profiled_method(profiled_method);
1414 c->set_profiled_bci(profiled_bci);
1415 c->set_should_profile(true);
1416 }
1417 append(c);
1418 }
1419
1420 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1421 if (deoptimize_on_null) {
1422 // Emit an explicit null check and deoptimize if opr is null
1423 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1424 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1425 branch(lir_cond_equal, T_OBJECT, deopt);
1426 } else {
1427 // Emit an implicit null check
1428 append(new LIR_Op1(lir_null_check, opr, info));
1429 }
1430 }
1431
1432 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1433 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1434 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1435 }
1436
1437 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1438 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1439 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1440 }
1441
1442 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1443 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1444 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1445 }
1446
1447
1448 #ifdef PRODUCT
1449
1450 void print_LIR(BlockList* blocks) {
1451 }
1452
1453 #else
1454 // LIR_OprDesc
1455 void LIR_OprDesc::print() const {
1456 print(tty);
1457 }
1458
1459 void LIR_OprDesc::print(outputStream* out) const {
1460 if (is_illegal()) {
1461 return;
1462 }
1463
1464 out->print("[");
1465 if (is_pointer()) {
1466 pointer()->print_value_on(out);
1467 } else if (is_single_stack()) {
1468 out->print("stack:%d", single_stack_ix());
1469 } else if (is_double_stack()) {
1470 out->print("dbl_stack:%d",double_stack_ix());
1471 } else if (is_virtual()) {
1472 out->print("R%d", vreg_number());
1473 } else if (is_single_cpu()) {
1474 out->print("%s", as_register()->name());
1475 } else if (is_double_cpu()) {
1476 out->print("%s", as_register_hi()->name());
1477 out->print("%s", as_register_lo()->name());
1478 #if defined(X86)
1479 } else if (is_single_xmm()) {
1480 out->print("%s", as_xmm_float_reg()->name());
1481 } else if (is_double_xmm()) {
1482 out->print("%s", as_xmm_double_reg()->name());
1483 } else if (is_single_fpu()) {
1484 out->print("fpu%d", fpu_regnr());
1485 } else if (is_double_fpu()) {
1486 out->print("fpu%d", fpu_regnrLo());
1487 #elif defined(AARCH64)
1488 } else if (is_single_fpu()) {
1489 out->print("fpu%d", fpu_regnr());
1490 } else if (is_double_fpu()) {
1491 out->print("fpu%d", fpu_regnrLo());
1492 #elif defined(ARM)
1493 } else if (is_single_fpu()) {
1494 out->print("s%d", fpu_regnr());
1495 } else if (is_double_fpu()) {
1496 out->print("d%d", fpu_regnrLo() >> 1);
1497 #else
1498 } else if (is_single_fpu()) {
1499 out->print("%s", as_float_reg()->name());
1500 } else if (is_double_fpu()) {
1501 out->print("%s", as_double_reg()->name());
1502 #endif
1503
1504 } else if (is_illegal()) {
1505 out->print("-");
1506 } else {
1507 out->print("Unknown Operand");
1508 }
1509 if (!is_illegal()) {
1510 out->print("|%c", type_char());
1511 }
1512 if (is_register() && is_last_use()) {
1513 out->print("(last_use)");
1514 }
1515 out->print("]");
1516 }
1517
1518
1519 // LIR_Address
1520 void LIR_Const::print_value_on(outputStream* out) const {
1521 switch (type()) {
1522 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1523 case T_INT: out->print("int:%d", as_jint()); break;
1524 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1525 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1526 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1527 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1528 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1529 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1530 }
1531 }
1532
1533 // LIR_Address
1534 void LIR_Address::print_value_on(outputStream* out) const {
1535 out->print("Base:"); _base->print(out);
1536 if (!_index->is_illegal()) {
1537 out->print(" Index:"); _index->print(out);
1538 switch (scale()) {
1539 case times_1: break;
1540 case times_2: out->print(" * 2"); break;
1541 case times_4: out->print(" * 4"); break;
1542 case times_8: out->print(" * 8"); break;
1543 }
1544 }
1545 out->print(" Disp: " INTX_FORMAT, _disp);
1546 }
1547
1548 // debug output of block header without InstructionPrinter
1549 // (because phi functions are not necessary for LIR)
1550 static void print_block(BlockBegin* x) {
1551 // print block id
1552 BlockEnd* end = x->end();
1553 tty->print("B%d ", x->block_id());
1554
1555 // print flags
1556 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1557 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1558 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1559 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1560 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1561 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1562 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1563
1564 // print block bci range
1565 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1566
1567 // print predecessors and successors
1568 if (x->number_of_preds() > 0) {
1569 tty->print("preds: ");
1570 for (int i = 0; i < x->number_of_preds(); i ++) {
1571 tty->print("B%d ", x->pred_at(i)->block_id());
1572 }
1573 }
1574
1575 if (x->number_of_sux() > 0) {
1576 tty->print("sux: ");
1577 for (int i = 0; i < x->number_of_sux(); i ++) {
1578 tty->print("B%d ", x->sux_at(i)->block_id());
1579 }
1580 }
1581
1582 // print exception handlers
1583 if (x->number_of_exception_handlers() > 0) {
1584 tty->print("xhandler: ");
1585 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1586 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1587 }
1588 }
1589
1590 tty->cr();
1591 }
1592
1593 void print_LIR(BlockList* blocks) {
1594 tty->print_cr("LIR:");
1595 int i;
1596 for (i = 0; i < blocks->length(); i++) {
1597 BlockBegin* bb = blocks->at(i);
1598 print_block(bb);
1599 tty->print("__id_Instruction___________________________________________"); tty->cr();
1600 bb->lir()->print_instructions();
1601 }
1602 }
1603
1604 void LIR_List::print_instructions() {
1605 for (int i = 0; i < _operations.length(); i++) {
1606 _operations.at(i)->print(); tty->cr();
1607 }
1608 tty->cr();
1609 }
1610
1611 // LIR_Ops printing routines
1612 // LIR_Op
1613 void LIR_Op::print_on(outputStream* out) const {
1614 if (id() != -1 || PrintCFGToFile) {
1615 out->print("%4d ", id());
1616 } else {
1617 out->print(" ");
1618 }
1619 out->print("%s ", name());
1620 print_instr(out);
1621 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1622 #ifdef ASSERT
1623 if (Verbose && _file != NULL) {
1624 out->print(" (%s:%d)", _file, _line);
1625 }
1626 #endif
1627 }
1628
1629 const char * LIR_Op::name() const {
1630 const char* s = NULL;
1631 switch(code()) {
1632 // LIR_Op0
1633 case lir_membar: s = "membar"; break;
1634 case lir_membar_acquire: s = "membar_acquire"; break;
1635 case lir_membar_release: s = "membar_release"; break;
1636 case lir_membar_loadload: s = "membar_loadload"; break;
1637 case lir_membar_storestore: s = "membar_storestore"; break;
1638 case lir_membar_loadstore: s = "membar_loadstore"; break;
1639 case lir_membar_storeload: s = "membar_storeload"; break;
1640 case lir_word_align: s = "word_align"; break;
1641 case lir_label: s = "label"; break;
1642 case lir_nop: s = "nop"; break;
1643 case lir_on_spin_wait: s = "on_spin_wait"; break;
1644 case lir_backwardbranch_target: s = "backbranch"; break;
1645 case lir_std_entry: s = "std_entry"; break;
1646 case lir_osr_entry: s = "osr_entry"; break;
1647 case lir_build_frame: s = "build_frm"; break;
1648 case lir_fpop_raw: s = "fpop_raw"; break;
1649 case lir_24bit_FPU: s = "24bit_FPU"; break;
1650 case lir_reset_FPU: s = "reset_FPU"; break;
1651 case lir_breakpoint: s = "breakpoint"; break;
1652 case lir_get_thread: s = "get_thread"; break;
1653 // LIR_Op1
1654 case lir_fxch: s = "fxch"; break;
1655 case lir_fld: s = "fld"; break;
1656 case lir_ffree: s = "ffree"; break;
1657 case lir_push: s = "push"; break;
1658 case lir_pop: s = "pop"; break;
1659 case lir_null_check: s = "null_check"; break;
1660 case lir_return: s = "return"; break;
1661 case lir_safepoint: s = "safepoint"; break;
1662 case lir_neg: s = "neg"; break;
1663 case lir_leal: s = "leal"; break;
1664 case lir_branch: s = "branch"; break;
1665 case lir_cond_float_branch: s = "flt_cond_br"; break;
1666 case lir_move: s = "move"; break;
1667 case lir_roundfp: s = "roundfp"; break;
1668 case lir_rtcall: s = "rtcall"; break;
1669 case lir_throw: s = "throw"; break;
1670 case lir_unwind: s = "unwind"; break;
1671 case lir_convert: s = "convert"; break;
1672 case lir_alloc_object: s = "alloc_obj"; break;
1673 case lir_monaddr: s = "mon_addr"; break;
1674 case lir_pack64: s = "pack64"; break;
1675 case lir_unpack64: s = "unpack64"; break;
1676 // LIR_Op2
1677 case lir_cmp: s = "cmp"; break;
1678 case lir_cmp_l2i: s = "cmp_l2i"; break;
1679 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1680 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1681 case lir_cmove: s = "cmove"; break;
1682 case lir_add: s = "add"; break;
1683 case lir_sub: s = "sub"; break;
1684 case lir_mul: s = "mul"; break;
1685 case lir_mul_strictfp: s = "mul_strictfp"; break;
1686 case lir_div: s = "div"; break;
1687 case lir_div_strictfp: s = "div_strictfp"; break;
1688 case lir_rem: s = "rem"; break;
1689 case lir_abs: s = "abs"; break;
1690 case lir_sqrt: s = "sqrt"; break;
1691 case lir_logic_and: s = "logic_and"; break;
1692 case lir_logic_or: s = "logic_or"; break;
1693 case lir_logic_xor: s = "logic_xor"; break;
1694 case lir_shl: s = "shift_left"; break;
1695 case lir_shr: s = "shift_right"; break;
1696 case lir_ushr: s = "ushift_right"; break;
1697 case lir_alloc_array: s = "alloc_array"; break;
1698 case lir_xadd: s = "xadd"; break;
1699 case lir_xchg: s = "xchg"; break;
1700 // LIR_Op3
1701 case lir_idiv: s = "idiv"; break;
1702 case lir_irem: s = "irem"; break;
1703 case lir_fmad: s = "fmad"; break;
1704 case lir_fmaf: s = "fmaf"; break;
1705 // LIR_OpJavaCall
1706 case lir_static_call: s = "static"; break;
1707 case lir_optvirtual_call: s = "optvirtual"; break;
1708 case lir_icvirtual_call: s = "icvirtual"; break;
1709 case lir_virtual_call: s = "virtual"; break;
1710 case lir_dynamic_call: s = "dynamic"; break;
1711 // LIR_OpArrayCopy
1712 case lir_arraycopy: s = "arraycopy"; break;
1713 // LIR_OpUpdateCRC32
1714 case lir_updatecrc32: s = "updatecrc32"; break;
1715 // LIR_OpLock
1716 case lir_lock: s = "lock"; break;
1717 case lir_unlock: s = "unlock"; break;
1718 // LIR_OpDelay
1719 case lir_delay_slot: s = "delay"; break;
1720 // LIR_OpTypeCheck
1721 case lir_instanceof: s = "instanceof"; break;
1722 case lir_checkcast: s = "checkcast"; break;
1723 case lir_store_check: s = "store_check"; break;
1724 // LIR_OpCompareAndSwap
1725 case lir_cas_long: s = "cas_long"; break;
1726 case lir_cas_obj: s = "cas_obj"; break;
1727 case lir_cas_int: s = "cas_int"; break;
1728 // LIR_OpProfileCall
1729 case lir_profile_call: s = "profile_call"; break;
1730 // LIR_OpProfileType
1731 case lir_profile_type: s = "profile_type"; break;
1732 // LIR_OpAssert
1733 #ifdef ASSERT
1734 case lir_assert: s = "assert"; break;
1735 #endif
1736 case lir_none: ShouldNotReachHere();break;
1737 default: s = "illegal_op"; break;
1738 }
1739 return s;
1740 }
1741
1742 // LIR_OpJavaCall
1743 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1744 out->print("call: ");
1745 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1746 if (receiver()->is_valid()) {
1747 out->print(" [recv: "); receiver()->print(out); out->print("]");
1748 }
1749 if (result_opr()->is_valid()) {
1750 out->print(" [result: "); result_opr()->print(out); out->print("]");
1751 }
1752 }
1753
1754 // LIR_OpLabel
1755 void LIR_OpLabel::print_instr(outputStream* out) const {
1756 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1757 }
1758
1759 // LIR_OpArrayCopy
1760 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1761 src()->print(out); out->print(" ");
1762 src_pos()->print(out); out->print(" ");
1763 dst()->print(out); out->print(" ");
1764 dst_pos()->print(out); out->print(" ");
1765 length()->print(out); out->print(" ");
1766 tmp()->print(out); out->print(" ");
1767 }
1768
1769 // LIR_OpUpdateCRC32
1770 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1771 crc()->print(out); out->print(" ");
1772 val()->print(out); out->print(" ");
1773 result_opr()->print(out); out->print(" ");
1774 }
1775
1776 // LIR_OpCompareAndSwap
1777 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1778 addr()->print(out); out->print(" ");
1779 cmp_value()->print(out); out->print(" ");
1780 new_value()->print(out); out->print(" ");
1781 tmp1()->print(out); out->print(" ");
1782 tmp2()->print(out); out->print(" ");
1783
1784 }
1785
1786 // LIR_Op0
1787 void LIR_Op0::print_instr(outputStream* out) const {
1788 result_opr()->print(out);
1789 }
1790
1791 // LIR_Op1
1792 const char * LIR_Op1::name() const {
1793 if (code() == lir_move) {
1794 switch (move_kind()) {
1795 case lir_move_normal:
1796 return "move";
1797 case lir_move_unaligned:
1798 return "unaligned move";
1799 case lir_move_volatile:
1800 return "volatile_move";
1801 case lir_move_wide:
1802 return "wide_move";
1803 default:
1804 ShouldNotReachHere();
1805 return "illegal_op";
1806 }
1807 } else {
1808 return LIR_Op::name();
1809 }
1810 }
1811
1812
1813 void LIR_Op1::print_instr(outputStream* out) const {
1814 _opr->print(out); out->print(" ");
1815 result_opr()->print(out); out->print(" ");
1816 print_patch_code(out, patch_code());
1817 }
1818
1819
1820 // LIR_Op1
1821 void LIR_OpRTCall::print_instr(outputStream* out) const {
1822 intx a = (intx)addr();
1823 out->print("%s", Runtime1::name_for_address(addr()));
1824 out->print(" ");
1825 tmp()->print(out);
1826 }
1827
1828 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1829 switch(code) {
1830 case lir_patch_none: break;
1831 case lir_patch_low: out->print("[patch_low]"); break;
1832 case lir_patch_high: out->print("[patch_high]"); break;
1833 case lir_patch_normal: out->print("[patch_normal]"); break;
1834 default: ShouldNotReachHere();
1835 }
1836 }
1837
1838 // LIR_OpBranch
1839 void LIR_OpBranch::print_instr(outputStream* out) const {
1840 print_condition(out, cond()); out->print(" ");
1841 if (block() != NULL) {
1842 out->print("[B%d] ", block()->block_id());
1843 } else if (stub() != NULL) {
1844 out->print("[");
1845 stub()->print_name(out);
1846 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1847 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1848 } else {
1849 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1850 }
1851 if (ublock() != NULL) {
1852 out->print("unordered: [B%d] ", ublock()->block_id());
1853 }
1854 }
1855
1856 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1857 switch(cond) {
1858 case lir_cond_equal: out->print("[EQ]"); break;
1859 case lir_cond_notEqual: out->print("[NE]"); break;
1860 case lir_cond_less: out->print("[LT]"); break;
1861 case lir_cond_lessEqual: out->print("[LE]"); break;
1862 case lir_cond_greaterEqual: out->print("[GE]"); break;
1863 case lir_cond_greater: out->print("[GT]"); break;
1864 case lir_cond_belowEqual: out->print("[BE]"); break;
1865 case lir_cond_aboveEqual: out->print("[AE]"); break;
1866 case lir_cond_always: out->print("[AL]"); break;
1867 default: out->print("[%d]",cond); break;
1868 }
1869 }
1870
1871 // LIR_OpConvert
1872 void LIR_OpConvert::print_instr(outputStream* out) const {
1873 print_bytecode(out, bytecode());
1874 in_opr()->print(out); out->print(" ");
1875 result_opr()->print(out); out->print(" ");
1876 #ifdef PPC32
1877 if(tmp1()->is_valid()) {
1878 tmp1()->print(out); out->print(" ");
1879 tmp2()->print(out); out->print(" ");
1880 }
1881 #endif
1882 }
1883
1884 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1885 switch(code) {
1886 case Bytecodes::_d2f: out->print("[d2f] "); break;
1887 case Bytecodes::_d2i: out->print("[d2i] "); break;
1888 case Bytecodes::_d2l: out->print("[d2l] "); break;
1889 case Bytecodes::_f2d: out->print("[f2d] "); break;
1890 case Bytecodes::_f2i: out->print("[f2i] "); break;
1891 case Bytecodes::_f2l: out->print("[f2l] "); break;
1892 case Bytecodes::_i2b: out->print("[i2b] "); break;
1893 case Bytecodes::_i2c: out->print("[i2c] "); break;
1894 case Bytecodes::_i2d: out->print("[i2d] "); break;
1895 case Bytecodes::_i2f: out->print("[i2f] "); break;
1896 case Bytecodes::_i2l: out->print("[i2l] "); break;
1897 case Bytecodes::_i2s: out->print("[i2s] "); break;
1898 case Bytecodes::_l2i: out->print("[l2i] "); break;
1899 case Bytecodes::_l2f: out->print("[l2f] "); break;
1900 case Bytecodes::_l2d: out->print("[l2d] "); break;
1901 default:
1902 out->print("[?%d]",code);
1903 break;
1904 }
1905 }
1906
1907 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1908 klass()->print(out); out->print(" ");
1909 obj()->print(out); out->print(" ");
1910 tmp1()->print(out); out->print(" ");
1911 tmp2()->print(out); out->print(" ");
1912 tmp3()->print(out); out->print(" ");
1913 tmp4()->print(out); out->print(" ");
1914 out->print("[hdr:%d]", header_size()); out->print(" ");
1915 out->print("[obj:%d]", object_size()); out->print(" ");
1916 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1917 }
1918
1919 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1920 _opr->print(out); out->print(" ");
1921 tmp()->print(out); out->print(" ");
1922 result_opr()->print(out); out->print(" ");
1923 }
1924
1925 // LIR_Op2
1926 void LIR_Op2::print_instr(outputStream* out) const {
1927 if (code() == lir_cmove || code() == lir_cmp) {
1928 print_condition(out, condition()); out->print(" ");
1929 }
1930 in_opr1()->print(out); out->print(" ");
1931 in_opr2()->print(out); out->print(" ");
1932 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1933 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1934 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1935 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1936 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1937 result_opr()->print(out);
1938 }
1939
1940 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1941 klass()->print(out); out->print(" ");
1942 len()->print(out); out->print(" ");
1943 obj()->print(out); out->print(" ");
1944 tmp1()->print(out); out->print(" ");
1945 tmp2()->print(out); out->print(" ");
1946 tmp3()->print(out); out->print(" ");
1947 tmp4()->print(out); out->print(" ");
1948 out->print("[type:0x%x]", type()); out->print(" ");
1949 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1950 }
1951
1952
1953 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1954 object()->print(out); out->print(" ");
1955 if (code() == lir_store_check) {
1956 array()->print(out); out->print(" ");
1957 }
1958 if (code() != lir_store_check) {
1959 klass()->print_name_on(out); out->print(" ");
1960 if (fast_check()) out->print("fast_check ");
1961 }
1962 tmp1()->print(out); out->print(" ");
1963 tmp2()->print(out); out->print(" ");
1964 tmp3()->print(out); out->print(" ");
1965 result_opr()->print(out); out->print(" ");
1966 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1967 }
1968
1969
1970 // LIR_Op3
1971 void LIR_Op3::print_instr(outputStream* out) const {
1972 in_opr1()->print(out); out->print(" ");
1973 in_opr2()->print(out); out->print(" ");
1974 in_opr3()->print(out); out->print(" ");
1975 result_opr()->print(out);
1976 }
1977
1978
1979 void LIR_OpLock::print_instr(outputStream* out) const {
1980 hdr_opr()->print(out); out->print(" ");
1981 obj_opr()->print(out); out->print(" ");
1982 lock_opr()->print(out); out->print(" ");
1983 if (_scratch->is_valid()) {
1984 _scratch->print(out); out->print(" ");
1985 }
1986 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1987 }
1988
1989 #ifdef ASSERT
1990 void LIR_OpAssert::print_instr(outputStream* out) const {
1991 print_condition(out, condition()); out->print(" ");
1992 in_opr1()->print(out); out->print(" ");
1993 in_opr2()->print(out); out->print(", \"");
1994 out->print("%s", msg()); out->print("\"");
1995 }
1996 #endif
1997
1998
1999 void LIR_OpDelay::print_instr(outputStream* out) const {
2000 _op->print_on(out);
2001 }
2002
2003
2004 // LIR_OpProfileCall
2005 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2006 profiled_method()->name()->print_symbol_on(out);
2007 out->print(".");
2008 profiled_method()->holder()->name()->print_symbol_on(out);
2009 out->print(" @ %d ", profiled_bci());
2010 mdo()->print(out); out->print(" ");
2011 recv()->print(out); out->print(" ");
2012 tmp1()->print(out); out->print(" ");
2013 }
2014
2015 // LIR_OpProfileType
2016 void LIR_OpProfileType::print_instr(outputStream* out) const {
2017 out->print("exact = ");
2018 if (exact_klass() == NULL) {
2019 out->print("unknown");
2020 } else {
2021 exact_klass()->print_name_on(out);
2022 }
2023 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2024 out->print(" ");
2025 mdp()->print(out); out->print(" ");
2026 obj()->print(out); out->print(" ");
2027 tmp()->print(out); out->print(" ");
2028 }
2029
2030 #endif // PRODUCT
2031
2032 // Implementation of LIR_InsertionBuffer
2033
2034 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2035 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2036
2037 int i = number_of_insertion_points() - 1;
2038 if (i < 0 || index_at(i) < index) {
2039 append_new(index, 1);
2040 } else {
2041 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2042 assert(count_at(i) > 0, "check");
2043 set_count_at(i, count_at(i) + 1);
2044 }
2045 _ops.push(op);
2046
2047 DEBUG_ONLY(verify());
2048 }
2049
2050 #ifdef ASSERT
2051 void LIR_InsertionBuffer::verify() {
2052 int sum = 0;
2053 int prev_idx = -1;
2054
2055 for (int i = 0; i < number_of_insertion_points(); i++) {
2056 assert(prev_idx < index_at(i), "index must be ordered ascending");
2057 sum += count_at(i);
2058 }
2059 assert(sum == number_of_ops(), "wrong total sum");
2060 }
2061 #endif