1 /*
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
695 ubyte_at(0) == 0xEB; /* short jump */ }
696 inline bool NativeInstruction::is_jump_reg() {
697 int pos = 0;
698 if (ubyte_at(0) == Assembler::REX_B) pos = 1;
699 return ubyte_at(pos) == 0xFF && (ubyte_at(pos + 1) & 0xF0) == 0xE0;
700 }
701 inline bool NativeInstruction::is_far_jump() { return is_mov_literal64(); }
702 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
703 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
704 inline bool NativeInstruction::is_safepoint_poll() {
705 #ifdef AMD64
706 // Try decoding a near safepoint first:
707 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
708 ubyte_at(1) == 0x05) { // 00 rax 101
709 address fault = addr_at(6) + int_at(2);
710 NOT_JVMCI(assert(!Assembler::is_polling_page_far(), "unexpected poll encoding");)
711 return os::is_poll_address(fault);
712 }
713 // Now try decoding a far safepoint:
714 // two cases, depending on the choice of the base register in the address.
715 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
716 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
717 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
718 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
719 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) {
720 NOT_JVMCI(assert(Assembler::is_polling_page_far(), "unexpected poll encoding");)
721 return true;
722 }
723 return false;
724 #else
725 return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
726 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
727 (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */
728 (os::is_poll_address((address)int_at(2)));
729 #endif // AMD64
730 }
731
732 inline bool NativeInstruction::is_mov_literal64() {
733 #ifdef AMD64
734 return ((ubyte_at(0) == Assembler::REX_W || ubyte_at(0) == Assembler::REX_WB) &&
735 (ubyte_at(1) & (0xff ^ NativeMovConstReg::register_mask)) == 0xB8);
736 #else
737 return false;
738 #endif // AMD64
739 }
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1 /*
2 * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
695 ubyte_at(0) == 0xEB; /* short jump */ }
696 inline bool NativeInstruction::is_jump_reg() {
697 int pos = 0;
698 if (ubyte_at(0) == Assembler::REX_B) pos = 1;
699 return ubyte_at(pos) == 0xFF && (ubyte_at(pos + 1) & 0xF0) == 0xE0;
700 }
701 inline bool NativeInstruction::is_far_jump() { return is_mov_literal64(); }
702 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
703 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
704 inline bool NativeInstruction::is_safepoint_poll() {
705 #ifdef AMD64
706 // Try decoding a near safepoint first:
707 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
708 ubyte_at(1) == 0x05) { // 00 rax 101
709 address fault = addr_at(6) + int_at(2);
710 NOT_JVMCI(assert(!Assembler::is_polling_page_far(), "unexpected poll encoding");)
711 return os::is_poll_address(fault);
712 }
713 // Now try decoding a far safepoint:
714 // two cases, depending on the choice of the base register in the address.
715 if ( ( (ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix
716 && ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl
717 && (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg)
718 || ( ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl
719 && (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ) {
720 NOT_JVMCI(assert(Assembler::is_polling_page_far(), "unexpected poll encoding");)
721 return true;
722 }
723 return false;
724 #else
725 return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
726 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
727 (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */
728 (os::is_poll_address((address)int_at(2)));
729 #endif // AMD64
730 }
731
732 inline bool NativeInstruction::is_mov_literal64() {
733 #ifdef AMD64
734 return ((ubyte_at(0) == Assembler::REX_W || ubyte_at(0) == Assembler::REX_WB) &&
735 (ubyte_at(1) & (0xff ^ NativeMovConstReg::register_mask)) == 0xB8);
736 #else
737 return false;
738 #endif // AMD64
739 }
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