1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 t = T_OBJECT;
111 case T_BOOLEAN:
112 case T_CHAR:
113 case T_FLOAT:
114 case T_DOUBLE:
115 case T_BYTE:
116 case T_SHORT:
117 case T_INT:
118 case T_LONG:
119 case T_OBJECT:
120 case T_ADDRESS:
121 case T_VOID:
122 return ::type2char(t);
123 case T_METADATA:
124 return 'M';
125 case T_ILLEGAL:
126 return '?';
127
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
168 assert((kindfield == cpu_register || kindfield == stack_value) &&
169 size_field() == single_size, "must match");
170 break;
171
172 case T_ILLEGAL:
173 // XXX TKR also means unknown right now
174 // assert(is_illegal(), "must match");
175 break;
176
177 default:
178 ShouldNotReachHere();
179 }
180 }
181 #endif
182
183 }
184 #endif // PRODUCT
185
186
187 bool LIR_OprDesc::is_oop() const {
188 if (is_pointer()) {
189 return pointer()->is_oop_pointer();
190 } else {
191 OprType t= type_field();
192 assert(t != unknown_type, "not set");
193 return t == object_type;
194 }
195 }
196
197
198
199 void LIR_Op2::verify() const {
200 #ifdef ASSERT
201 switch (code()) {
202 case lir_cmove:
203 case lir_xchg:
204 break;
205
206 default:
207 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
208 "can't produce oops from arith");
209 }
210
211 if (TwoOperandLIRForm) {
212
213 #ifdef ASSERT
214 bool threeOperandForm = false;
215 #ifdef S390
216 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
217 threeOperandForm =
218 code() == lir_shl ||
219 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
220 #endif
221 #endif
222
223 switch (code()) {
224 case lir_add:
225 case lir_sub:
226 case lir_mul:
227 case lir_mul_strictfp:
228 case lir_div:
229 case lir_div_strictfp:
230 case lir_rem:
231 case lir_logic_and:
232 case lir_logic_or:
233 case lir_logic_xor:
234 case lir_shl:
235 case lir_shr:
236 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
237 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
238 break;
239
240 // special handling for lir_ushr because of write barriers
241 case lir_ushr:
242 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
243 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
244 break;
245
246 }
247 }
248 #endif
249 }
250
251
252 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
253 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
254 , _cond(cond)
255 , _type(type)
256 , _label(block->label())
257 , _block(block)
258 , _ublock(NULL)
259 , _stub(NULL) {
260 }
261
262 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
263 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
264 , _cond(cond)
265 , _type(type)
266 , _label(stub->entry())
267 , _block(NULL)
268 , _ublock(NULL)
269 , _stub(stub) {
270 }
271
272 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
273 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
274 , _cond(cond)
275 , _type(type)
276 , _label(block->label())
277 , _block(block)
278 , _ublock(ublock)
279 , _stub(NULL)
280 {
281 }
282
283 void LIR_OpBranch::change_block(BlockBegin* b) {
284 assert(_block != NULL, "must have old block");
285 assert(_block->label() == label(), "must be equal");
286
287 _block = b;
288 _label = b->label();
289 }
290
291 void LIR_OpBranch::change_ublock(BlockBegin* b) {
292 assert(_ublock != NULL, "must have old block");
293 _ublock = b;
294 }
295
296 void LIR_OpBranch::negate_cond() {
297 switch (_cond) {
298 case lir_cond_equal: _cond = lir_cond_notEqual; break;
299 case lir_cond_notEqual: _cond = lir_cond_equal; break;
300 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
301 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
302 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
303 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
304 default: ShouldNotReachHere();
305 }
306 }
307
308
309 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
310 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
311 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
312 CodeStub* stub)
313
314 : LIR_Op(code, result, NULL)
315 , _object(object)
316 , _array(LIR_OprFact::illegalOpr)
317 , _klass(klass)
318 , _tmp1(tmp1)
319 , _tmp2(tmp2)
320 , _tmp3(tmp3)
321 , _fast_check(fast_check)
322 , _stub(stub)
323 , _info_for_patch(info_for_patch)
324 , _info_for_exception(info_for_exception)
325 , _profiled_method(NULL)
326 , _profiled_bci(-1)
327 , _should_profile(false)
328 {
329 if (code == lir_checkcast) {
330 assert(info_for_exception != NULL, "checkcast throws exceptions");
331 } else if (code == lir_instanceof) {
332 assert(info_for_exception == NULL, "instanceof throws no exceptions");
333 } else {
334 ShouldNotReachHere();
335 }
336 }
337
338
339
340 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
341 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
342 , _object(object)
343 , _array(array)
344 , _klass(NULL)
345 , _tmp1(tmp1)
346 , _tmp2(tmp2)
347 , _tmp3(tmp3)
348 , _fast_check(false)
349 , _stub(NULL)
350 , _info_for_patch(NULL)
351 , _info_for_exception(info_for_exception)
352 , _profiled_method(NULL)
353 , _profiled_bci(-1)
354 , _should_profile(false)
355 {
356 if (code == lir_store_check) {
357 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
358 assert(info_for_exception != NULL, "store_check throws exceptions");
359 } else {
360 ShouldNotReachHere();
361 }
362 }
363
364
365 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
366 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
367 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
368 , _tmp(tmp)
369 , _src(src)
370 , _src_pos(src_pos)
371 , _dst(dst)
372 , _dst_pos(dst_pos)
373 , _flags(flags)
374 , _expected_type(expected_type)
375 , _length(length) {
376 _stub = new ArrayCopyStub(this);
377 }
378
379 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
380 : LIR_Op(lir_updatecrc32, res, NULL)
381 , _crc(crc)
382 , _val(val) {
383 }
384
385 //-------------------verify--------------------------
386
387 void LIR_Op1::verify() const {
388 switch(code()) {
389 case lir_move:
390 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
391 break;
392 case lir_null_check:
393 assert(in_opr()->is_register(), "must be");
394 break;
395 case lir_return:
396 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
397 break;
398 default:
399 break;
400 }
401 }
402
403 void LIR_OpRTCall::verify() const {
404 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
405 }
406
407 //-------------------visits--------------------------
408
409 // complete rework of LIR instruction visitor.
410 // The virtual call for each instruction type is replaced by a big
411 // switch that adds the operands for each instruction
412
413 void LIR_OpVisitState::visit(LIR_Op* op) {
414 // copy information from the LIR_Op
415 reset();
416 set_op(op);
417
418 switch (op->code()) {
419
420 // LIR_Op0
421 case lir_word_align: // result and info always invalid
422 case lir_backwardbranch_target: // result and info always invalid
423 case lir_build_frame: // result and info always invalid
424 case lir_fpop_raw: // result and info always invalid
425 case lir_24bit_FPU: // result and info always invalid
426 case lir_reset_FPU: // result and info always invalid
427 case lir_breakpoint: // result and info always invalid
428 case lir_membar: // result and info always invalid
429 case lir_membar_acquire: // result and info always invalid
430 case lir_membar_release: // result and info always invalid
431 case lir_membar_loadload: // result and info always invalid
432 case lir_membar_storestore: // result and info always invalid
433 case lir_membar_loadstore: // result and info always invalid
434 case lir_membar_storeload: // result and info always invalid
435 case lir_on_spin_wait:
436 {
437 assert(op->as_Op0() != NULL, "must be");
438 assert(op->_info == NULL, "info not used by this instruction");
439 assert(op->_result->is_illegal(), "not used");
440 break;
441 }
442
443 case lir_nop: // may have info, result always invalid
444 case lir_std_entry: // may have result, info always invalid
445 case lir_osr_entry: // may have result, info always invalid
446 case lir_get_thread: // may have result, info always invalid
447 {
448 assert(op->as_Op0() != NULL, "must be");
449 if (op->_info != NULL) do_info(op->_info);
450 if (op->_result->is_valid()) do_output(op->_result);
451 break;
452 }
453
454
455 // LIR_OpLabel
456 case lir_label: // result and info always invalid
457 {
458 assert(op->as_OpLabel() != NULL, "must be");
459 assert(op->_info == NULL, "info not used by this instruction");
460 assert(op->_result->is_illegal(), "not used");
461 break;
462 }
463
464
465 // LIR_Op1
466 case lir_fxch: // input always valid, result and info always invalid
467 case lir_fld: // input always valid, result and info always invalid
468 case lir_ffree: // input always valid, result and info always invalid
469 case lir_push: // input always valid, result and info always invalid
470 case lir_pop: // input always valid, result and info always invalid
471 case lir_return: // input always valid, result and info always invalid
472 case lir_leal: // input and result always valid, info always invalid
473 case lir_neg: // input and result always valid, info always invalid
474 case lir_monaddr: // input and result always valid, info always invalid
475 case lir_null_check: // input and info always valid, result always invalid
476 case lir_move: // input and result always valid, may have info
477 case lir_pack64: // input and result always valid
478 case lir_unpack64: // input and result always valid
479 {
480 assert(op->as_Op1() != NULL, "must be");
481 LIR_Op1* op1 = (LIR_Op1*)op;
482
483 if (op1->_info) do_info(op1->_info);
484 if (op1->_opr->is_valid()) do_input(op1->_opr);
485 if (op1->_result->is_valid()) do_output(op1->_result);
486
487 break;
488 }
489
490 case lir_safepoint:
491 {
492 assert(op->as_Op1() != NULL, "must be");
493 LIR_Op1* op1 = (LIR_Op1*)op;
494
495 assert(op1->_info != NULL, ""); do_info(op1->_info);
496 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
497 assert(op1->_result->is_illegal(), "safepoint does not produce value");
498
499 break;
500 }
501
502 // LIR_OpConvert;
503 case lir_convert: // input and result always valid, info always invalid
504 {
505 assert(op->as_OpConvert() != NULL, "must be");
506 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
507
508 assert(opConvert->_info == NULL, "must be");
509 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
510 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
511 #ifdef PPC32
512 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
513 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
514 #endif
515 do_stub(opConvert->_stub);
516
517 break;
518 }
519
520 // LIR_OpBranch;
521 case lir_branch: // may have info, input and result register always invalid
522 case lir_cond_float_branch: // may have info, input and result register always invalid
523 {
524 assert(op->as_OpBranch() != NULL, "must be");
525 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
526
527 if (opBranch->_info != NULL) do_info(opBranch->_info);
528 assert(opBranch->_result->is_illegal(), "not used");
529 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
530
531 break;
532 }
533
534
535 // LIR_OpAllocObj
536 case lir_alloc_object:
537 {
538 assert(op->as_OpAllocObj() != NULL, "must be");
539 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
540
541 if (opAllocObj->_info) do_info(opAllocObj->_info);
542 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
543 do_temp(opAllocObj->_opr);
544 }
545 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
546 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
547 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
548 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
549 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
550 do_stub(opAllocObj->_stub);
551 break;
552 }
553
554
555 // LIR_OpRoundFP;
556 case lir_roundfp: {
557 assert(op->as_OpRoundFP() != NULL, "must be");
558 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
559
560 assert(op->_info == NULL, "info not used by this instruction");
561 assert(opRoundFP->_tmp->is_illegal(), "not used");
562 do_input(opRoundFP->_opr);
563 do_output(opRoundFP->_result);
564
565 break;
566 }
567
568
569 // LIR_Op2
570 case lir_cmp:
571 case lir_cmp_l2i:
572 case lir_ucmp_fd2i:
573 case lir_cmp_fd2i:
574 case lir_add:
575 case lir_sub:
576 case lir_mul:
577 case lir_div:
578 case lir_rem:
579 case lir_sqrt:
580 case lir_abs:
581 case lir_logic_and:
582 case lir_logic_or:
583 case lir_logic_xor:
584 case lir_shl:
585 case lir_shr:
586 case lir_ushr:
587 case lir_xadd:
588 case lir_xchg:
589 case lir_assert:
590 {
591 assert(op->as_Op2() != NULL, "must be");
592 LIR_Op2* op2 = (LIR_Op2*)op;
593 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
594 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
595
596 if (op2->_info) do_info(op2->_info);
597 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
598 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
599 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
600 if (op2->_result->is_valid()) do_output(op2->_result);
601 if (op->code() == lir_xchg || op->code() == lir_xadd) {
602 // on ARM and PPC, return value is loaded first so could
603 // destroy inputs. On other platforms that implement those
604 // (x86, sparc), the extra constrainsts are harmless.
605 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
606 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
607 }
608
609 break;
610 }
611
612 // special handling for cmove: right input operand must not be equal
613 // to the result operand, otherwise the backend fails
614 case lir_cmove:
615 {
616 assert(op->as_Op2() != NULL, "must be");
617 LIR_Op2* op2 = (LIR_Op2*)op;
618
619 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
620 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
621 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
622
623 do_input(op2->_opr1);
624 do_input(op2->_opr2);
625 do_temp(op2->_opr2);
626 do_output(op2->_result);
627
628 break;
629 }
630
631 // vspecial handling for strict operations: register input operands
632 // as temp to guarantee that they do not overlap with other
633 // registers
634 case lir_mul_strictfp:
635 case lir_div_strictfp:
636 {
637 assert(op->as_Op2() != NULL, "must be");
638 LIR_Op2* op2 = (LIR_Op2*)op;
639
640 assert(op2->_info == NULL, "not used");
641 assert(op2->_opr1->is_valid(), "used");
642 assert(op2->_opr2->is_valid(), "used");
643 assert(op2->_result->is_valid(), "used");
644 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
645 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
646
647 do_input(op2->_opr1); do_temp(op2->_opr1);
648 do_input(op2->_opr2); do_temp(op2->_opr2);
649 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
650 do_output(op2->_result);
651
652 break;
653 }
654
655 case lir_throw: {
656 assert(op->as_Op2() != NULL, "must be");
657 LIR_Op2* op2 = (LIR_Op2*)op;
658
659 if (op2->_info) do_info(op2->_info);
660 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
661 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
662 assert(op2->_result->is_illegal(), "no result");
663 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
664 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
665
666 break;
667 }
668
669 case lir_unwind: {
670 assert(op->as_Op1() != NULL, "must be");
671 LIR_Op1* op1 = (LIR_Op1*)op;
672
673 assert(op1->_info == NULL, "no info");
674 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
675 assert(op1->_result->is_illegal(), "no result");
676
677 break;
678 }
679
680 // LIR_Op3
681 case lir_idiv:
682 case lir_irem: {
683 assert(op->as_Op3() != NULL, "must be");
684 LIR_Op3* op3= (LIR_Op3*)op;
685
686 if (op3->_info) do_info(op3->_info);
687 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
688
689 // second operand is input and temp, so ensure that second operand
690 // and third operand get not the same register
691 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
692 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
693 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
694
695 if (op3->_result->is_valid()) do_output(op3->_result);
696
697 break;
698 }
699
700 case lir_fmad:
701 case lir_fmaf: {
702 assert(op->as_Op3() != NULL, "must be");
703 LIR_Op3* op3= (LIR_Op3*)op;
704 assert(op3->_info == NULL, "no info");
705 do_input(op3->_opr1);
706 do_input(op3->_opr2);
707 do_input(op3->_opr3);
708 do_output(op3->_result);
709 break;
710 }
711
712 // LIR_OpJavaCall
713 case lir_static_call:
714 case lir_optvirtual_call:
715 case lir_icvirtual_call:
716 case lir_virtual_call:
717 case lir_dynamic_call: {
718 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
719 assert(opJavaCall != NULL, "must be");
720
721 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
722
723 // only visit register parameters
724 int n = opJavaCall->_arguments->length();
725 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
726 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
727 do_input(*opJavaCall->_arguments->adr_at(i));
728 }
729 }
730
731 if (opJavaCall->_info) do_info(opJavaCall->_info);
732 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
733 opJavaCall->is_method_handle_invoke()) {
734 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
735 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
736 }
737 do_call();
738 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
739
740 break;
741 }
742
743
744 // LIR_OpRTCall
745 case lir_rtcall: {
746 assert(op->as_OpRTCall() != NULL, "must be");
747 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
748
749 // only visit register parameters
750 int n = opRTCall->_arguments->length();
751 for (int i = 0; i < n; i++) {
752 if (!opRTCall->_arguments->at(i)->is_pointer()) {
753 do_input(*opRTCall->_arguments->adr_at(i));
754 }
755 }
756 if (opRTCall->_info) do_info(opRTCall->_info);
757 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
758 do_call();
759 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
760
761 break;
762 }
763
764
765 // LIR_OpArrayCopy
766 case lir_arraycopy: {
767 assert(op->as_OpArrayCopy() != NULL, "must be");
768 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
769
770 assert(opArrayCopy->_result->is_illegal(), "unused");
771 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
772 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
773 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
774 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
775 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
776 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
777 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
778
779 // the implementation of arraycopy always has a call into the runtime
780 do_call();
781
782 break;
783 }
784
785
786 // LIR_OpUpdateCRC32
787 case lir_updatecrc32: {
788 assert(op->as_OpUpdateCRC32() != NULL, "must be");
789 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
790
791 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
792 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
793 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
794 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
795
796 break;
797 }
798
799
800 // LIR_OpLock
801 case lir_lock:
802 case lir_unlock: {
803 assert(op->as_OpLock() != NULL, "must be");
804 LIR_OpLock* opLock = (LIR_OpLock*)op;
805
806 if (opLock->_info) do_info(opLock->_info);
807
808 // TODO: check if these operands really have to be temp
809 // (or if input is sufficient). This may have influence on the oop map!
810 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
811 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
812 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
813
814 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
815 assert(opLock->_result->is_illegal(), "unused");
816
817 do_stub(opLock->_stub);
818
819 break;
820 }
821
822
823 // LIR_OpDelay
824 case lir_delay_slot: {
825 assert(op->as_OpDelay() != NULL, "must be");
826 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
827
828 visit(opDelay->delay_op());
829 break;
830 }
831
832 // LIR_OpTypeCheck
833 case lir_instanceof:
834 case lir_checkcast:
835 case lir_store_check: {
836 assert(op->as_OpTypeCheck() != NULL, "must be");
837 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
838
839 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
840 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
841 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
842 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
843 do_temp(opTypeCheck->_object);
844 }
845 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
846 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
847 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
848 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
849 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
850 do_stub(opTypeCheck->_stub);
851 break;
852 }
853
854 // LIR_OpCompareAndSwap
855 case lir_cas_long:
856 case lir_cas_obj:
857 case lir_cas_int: {
858 assert(op->as_OpCompareAndSwap() != NULL, "must be");
859 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
860
861 assert(opCompareAndSwap->_addr->is_valid(), "used");
862 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
863 assert(opCompareAndSwap->_new_value->is_valid(), "used");
864 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
865 do_input(opCompareAndSwap->_addr);
866 do_temp(opCompareAndSwap->_addr);
867 do_input(opCompareAndSwap->_cmp_value);
868 do_temp(opCompareAndSwap->_cmp_value);
869 do_input(opCompareAndSwap->_new_value);
870 do_temp(opCompareAndSwap->_new_value);
871 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
872 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
873 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
874
875 break;
876 }
877
878
879 // LIR_OpAllocArray;
880 case lir_alloc_array: {
881 assert(op->as_OpAllocArray() != NULL, "must be");
882 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
883
884 if (opAllocArray->_info) do_info(opAllocArray->_info);
885 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
886 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
887 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
888 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
889 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
890 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
891 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
892 do_stub(opAllocArray->_stub);
893 break;
894 }
895
896 // LIR_OpProfileCall:
897 case lir_profile_call: {
898 assert(op->as_OpProfileCall() != NULL, "must be");
899 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
900
901 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
902 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
903 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
904 break;
905 }
906
907 // LIR_OpProfileType:
908 case lir_profile_type: {
909 assert(op->as_OpProfileType() != NULL, "must be");
910 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
911
912 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
913 do_input(opProfileType->_obj);
914 do_temp(opProfileType->_tmp);
915 break;
916 }
917 default:
918 ShouldNotReachHere();
919 }
920 }
921
922
923 void LIR_OpVisitState::do_stub(CodeStub* stub) {
924 if (stub != NULL) {
925 stub->visit(this);
926 }
927 }
928
929 XHandlers* LIR_OpVisitState::all_xhandler() {
930 XHandlers* result = NULL;
931
932 int i;
933 for (i = 0; i < info_count(); i++) {
934 if (info_at(i)->exception_handlers() != NULL) {
935 result = info_at(i)->exception_handlers();
936 break;
937 }
938 }
939
940 #ifdef ASSERT
941 for (i = 0; i < info_count(); i++) {
942 assert(info_at(i)->exception_handlers() == NULL ||
943 info_at(i)->exception_handlers() == result,
944 "only one xhandler list allowed per LIR-operation");
945 }
946 #endif
947
948 if (result != NULL) {
949 return result;
950 } else {
951 return new XHandlers();
952 }
953
954 return result;
955 }
956
957
958 #ifdef ASSERT
959 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
960 visit(op);
961
962 return opr_count(inputMode) == 0 &&
963 opr_count(outputMode) == 0 &&
964 opr_count(tempMode) == 0 &&
965 info_count() == 0 &&
966 !has_call() &&
967 !has_slow_case();
968 }
969 #endif
970
971 //---------------------------------------------------
972
973
974 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
975 masm->emit_call(this);
976 }
977
978 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
979 masm->emit_rtcall(this);
980 }
981
982 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
983 masm->emit_opLabel(this);
984 }
985
986 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
987 masm->emit_arraycopy(this);
988 masm->append_code_stub(stub());
989 }
990
991 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
992 masm->emit_updatecrc32(this);
993 }
994
995 void LIR_Op0::emit_code(LIR_Assembler* masm) {
996 masm->emit_op0(this);
997 }
998
999 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1000 masm->emit_op1(this);
1001 }
1002
1003 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1004 masm->emit_alloc_obj(this);
1005 masm->append_code_stub(stub());
1006 }
1007
1008 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1009 masm->emit_opBranch(this);
1010 if (stub()) {
1011 masm->append_code_stub(stub());
1012 }
1013 }
1014
1015 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1016 masm->emit_opConvert(this);
1017 if (stub() != NULL) {
1018 masm->append_code_stub(stub());
1019 }
1020 }
1021
1022 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1023 masm->emit_op2(this);
1024 }
1025
1026 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1027 masm->emit_alloc_array(this);
1028 masm->append_code_stub(stub());
1029 }
1030
1031 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1032 masm->emit_opTypeCheck(this);
1033 if (stub()) {
1034 masm->append_code_stub(stub());
1035 }
1036 }
1037
1038 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1039 masm->emit_compare_and_swap(this);
1040 }
1041
1042 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1043 masm->emit_op3(this);
1044 }
1045
1046 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1047 masm->emit_lock(this);
1048 if (stub()) {
1049 masm->append_code_stub(stub());
1050 }
1051 }
1052
1053 #ifdef ASSERT
1054 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1055 masm->emit_assert(this);
1056 }
1057 #endif
1058
1059 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1060 masm->emit_delay(this);
1061 }
1062
1063 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1064 masm->emit_profile_call(this);
1065 }
1066
1067 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1068 masm->emit_profile_type(this);
1069 }
1070
1071 // LIR_List
1072 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1073 : _operations(8)
1074 , _compilation(compilation)
1075 #ifndef PRODUCT
1076 , _block(block)
1077 #endif
1078 #ifdef ASSERT
1079 , _file(NULL)
1080 , _line(0)
1081 #endif
1082 { }
1083
1084
1085 #ifdef ASSERT
1086 void LIR_List::set_file_and_line(const char * file, int line) {
1087 const char * f = strrchr(file, '/');
1088 if (f == NULL) f = strrchr(file, '\\');
1089 if (f == NULL) {
1090 f = file;
1091 } else {
1092 f++;
1093 }
1094 _file = f;
1095 _line = line;
1096 }
1097 #endif
1098
1099
1100 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1101 assert(this == buffer->lir_list(), "wrong lir list");
1102 const int n = _operations.length();
1103
1104 if (buffer->number_of_ops() > 0) {
1105 // increase size of instructions list
1106 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1107 // insert ops from buffer into instructions list
1108 int op_index = buffer->number_of_ops() - 1;
1109 int ip_index = buffer->number_of_insertion_points() - 1;
1110 int from_index = n - 1;
1111 int to_index = _operations.length() - 1;
1112 for (; ip_index >= 0; ip_index --) {
1113 int index = buffer->index_at(ip_index);
1114 // make room after insertion point
1115 while (index < from_index) {
1116 _operations.at_put(to_index --, _operations.at(from_index --));
1117 }
1118 // insert ops from buffer
1119 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1120 _operations.at_put(to_index --, buffer->op_at(op_index --));
1121 }
1122 }
1123 }
1124
1125 buffer->finish();
1126 }
1127
1128
1129 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1130 assert(reg->type() == T_OBJECT, "bad reg");
1131 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1132 }
1133
1134 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1135 assert(reg->type() == T_METADATA, "bad reg");
1136 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1137 }
1138
1139 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1140 append(new LIR_Op1(
1141 lir_move,
1142 LIR_OprFact::address(addr),
1143 src,
1144 addr->type(),
1145 patch_code,
1146 info));
1147 }
1148
1149
1150 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1151 append(new LIR_Op1(
1152 lir_move,
1153 LIR_OprFact::address(address),
1154 dst,
1155 address->type(),
1156 patch_code,
1157 info, lir_move_volatile));
1158 }
1159
1160 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1161 append(new LIR_Op1(
1162 lir_move,
1163 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1164 dst,
1165 type,
1166 patch_code,
1167 info, lir_move_volatile));
1168 }
1169
1170
1171 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1172 append(new LIR_Op1(
1173 lir_move,
1174 LIR_OprFact::intConst(v),
1175 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1176 type,
1177 patch_code,
1178 info));
1179 }
1180
1181
1182 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1183 append(new LIR_Op1(
1184 lir_move,
1185 LIR_OprFact::oopConst(o),
1186 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1187 type,
1188 patch_code,
1189 info));
1190 }
1191
1192
1193 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1194 append(new LIR_Op1(
1195 lir_move,
1196 src,
1197 LIR_OprFact::address(addr),
1198 addr->type(),
1199 patch_code,
1200 info));
1201 }
1202
1203
1204 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1205 append(new LIR_Op1(
1206 lir_move,
1207 src,
1208 LIR_OprFact::address(addr),
1209 addr->type(),
1210 patch_code,
1211 info,
1212 lir_move_volatile));
1213 }
1214
1215 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1216 append(new LIR_Op1(
1217 lir_move,
1218 src,
1219 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1220 type,
1221 patch_code,
1222 info, lir_move_volatile));
1223 }
1224
1225
1226 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1227 append(new LIR_Op3(
1228 lir_idiv,
1229 left,
1230 right,
1231 tmp,
1232 res,
1233 info));
1234 }
1235
1236
1237 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1238 append(new LIR_Op3(
1239 lir_idiv,
1240 left,
1241 LIR_OprFact::intConst(right),
1242 tmp,
1243 res,
1244 info));
1245 }
1246
1247
1248 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1249 append(new LIR_Op3(
1250 lir_irem,
1251 left,
1252 right,
1253 tmp,
1254 res,
1255 info));
1256 }
1257
1258
1259 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1260 append(new LIR_Op3(
1261 lir_irem,
1262 left,
1263 LIR_OprFact::intConst(right),
1264 tmp,
1265 res,
1266 info));
1267 }
1268
1269
1270 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1271 append(new LIR_Op2(
1272 lir_cmp,
1273 condition,
1274 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1275 LIR_OprFact::intConst(c),
1276 info));
1277 }
1278
1279
1280 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1281 append(new LIR_Op2(
1282 lir_cmp,
1283 condition,
1284 reg,
1285 LIR_OprFact::address(addr),
1286 info));
1287 }
1288
1289 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1290 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1291 append(new LIR_OpAllocObj(
1292 klass,
1293 dst,
1294 t1,
1295 t2,
1296 t3,
1297 t4,
1298 header_size,
1299 object_size,
1300 init_check,
1301 stub));
1302 }
1303
1304 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1305 append(new LIR_OpAllocArray(
1306 klass,
1307 len,
1308 dst,
1309 t1,
1310 t2,
1311 t3,
1312 t4,
1313 type,
1314 stub));
1315 }
1316
1317 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1318 append(new LIR_Op2(
1319 lir_shl,
1320 value,
1321 count,
1322 dst,
1323 tmp));
1324 }
1325
1326 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1327 append(new LIR_Op2(
1328 lir_shr,
1329 value,
1330 count,
1331 dst,
1332 tmp));
1333 }
1334
1335
1336 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1337 append(new LIR_Op2(
1338 lir_ushr,
1339 value,
1340 count,
1341 dst,
1342 tmp));
1343 }
1344
1345 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1346 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1347 left,
1348 right,
1349 dst));
1350 }
1351
1352 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1353 append(new LIR_OpLock(
1354 lir_lock,
1355 hdr,
1356 obj,
1357 lock,
1358 scratch,
1359 stub,
1360 info));
1361 }
1362
1363 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1364 append(new LIR_OpLock(
1365 lir_unlock,
1366 hdr,
1367 obj,
1368 lock,
1369 scratch,
1370 stub,
1371 NULL));
1372 }
1373
1374
1375 void check_LIR() {
1376 // cannot do the proper checking as PRODUCT and other modes return different results
1377 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1378 }
1379
1380
1381
1382 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1383 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1384 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1385 ciMethod* profiled_method, int profiled_bci) {
1386 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1387 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1388 if (profiled_method != NULL) {
1389 c->set_profiled_method(profiled_method);
1390 c->set_profiled_bci(profiled_bci);
1391 c->set_should_profile(true);
1392 }
1393 append(c);
1394 }
1395
1396 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1397 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1398 if (profiled_method != NULL) {
1399 c->set_profiled_method(profiled_method);
1400 c->set_profiled_bci(profiled_bci);
1401 c->set_should_profile(true);
1402 }
1403 append(c);
1404 }
1405
1406
1407 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1408 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1409 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1410 if (profiled_method != NULL) {
1411 c->set_profiled_method(profiled_method);
1412 c->set_profiled_bci(profiled_bci);
1413 c->set_should_profile(true);
1414 }
1415 append(c);
1416 }
1417
1418 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1419 if (deoptimize_on_null) {
1420 // Emit an explicit null check and deoptimize if opr is null
1421 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1422 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1423 branch(lir_cond_equal, T_OBJECT, deopt);
1424 } else {
1425 // Emit an implicit null check
1426 append(new LIR_Op1(lir_null_check, opr, info));
1427 }
1428 }
1429
1430 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1431 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1432 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1433 }
1434
1435 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1436 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1437 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1438 }
1439
1440 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1441 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1442 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1443 }
1444
1445
1446 #ifdef PRODUCT
1447
1448 void print_LIR(BlockList* blocks) {
1449 }
1450
1451 #else
1452 // LIR_OprDesc
1453 void LIR_OprDesc::print() const {
1454 print(tty);
1455 }
1456
1457 void LIR_OprDesc::print(outputStream* out) const {
1458 if (is_illegal()) {
1459 return;
1460 }
1461
1462 out->print("[");
1463 if (is_pointer()) {
1464 pointer()->print_value_on(out);
1465 } else if (is_single_stack()) {
1466 out->print("stack:%d", single_stack_ix());
1467 } else if (is_double_stack()) {
1468 out->print("dbl_stack:%d",double_stack_ix());
1469 } else if (is_virtual()) {
1470 out->print("R%d", vreg_number());
1471 } else if (is_single_cpu()) {
1472 out->print("%s", as_register()->name());
1473 } else if (is_double_cpu()) {
1474 out->print("%s", as_register_hi()->name());
1475 out->print("%s", as_register_lo()->name());
1476 #if defined(X86)
1477 } else if (is_single_xmm()) {
1478 out->print("%s", as_xmm_float_reg()->name());
1479 } else if (is_double_xmm()) {
1480 out->print("%s", as_xmm_double_reg()->name());
1481 } else if (is_single_fpu()) {
1482 out->print("fpu%d", fpu_regnr());
1483 } else if (is_double_fpu()) {
1484 out->print("fpu%d", fpu_regnrLo());
1485 #elif defined(AARCH64)
1486 } else if (is_single_fpu()) {
1487 out->print("fpu%d", fpu_regnr());
1488 } else if (is_double_fpu()) {
1489 out->print("fpu%d", fpu_regnrLo());
1490 #elif defined(ARM)
1491 } else if (is_single_fpu()) {
1492 out->print("s%d", fpu_regnr());
1493 } else if (is_double_fpu()) {
1494 out->print("d%d", fpu_regnrLo() >> 1);
1495 #else
1496 } else if (is_single_fpu()) {
1497 out->print("%s", as_float_reg()->name());
1498 } else if (is_double_fpu()) {
1499 out->print("%s", as_double_reg()->name());
1500 #endif
1501
1502 } else if (is_illegal()) {
1503 out->print("-");
1504 } else {
1505 out->print("Unknown Operand");
1506 }
1507 if (!is_illegal()) {
1508 out->print("|%c", type_char());
1509 }
1510 if (is_register() && is_last_use()) {
1511 out->print("(last_use)");
1512 }
1513 out->print("]");
1514 }
1515
1516
1517 // LIR_Address
1518 void LIR_Const::print_value_on(outputStream* out) const {
1519 switch (type()) {
1520 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1521 case T_INT: out->print("int:%d", as_jint()); break;
1522 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1523 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1524 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1525 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1526 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1527 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1528 }
1529 }
1530
1531 // LIR_Address
1532 void LIR_Address::print_value_on(outputStream* out) const {
1533 out->print("Base:"); _base->print(out);
1534 if (!_index->is_illegal()) {
1535 out->print(" Index:"); _index->print(out);
1536 switch (scale()) {
1537 case times_1: break;
1538 case times_2: out->print(" * 2"); break;
1539 case times_4: out->print(" * 4"); break;
1540 case times_8: out->print(" * 8"); break;
1541 }
1542 }
1543 out->print(" Disp: " INTX_FORMAT, _disp);
1544 }
1545
1546 // debug output of block header without InstructionPrinter
1547 // (because phi functions are not necessary for LIR)
1548 static void print_block(BlockBegin* x) {
1549 // print block id
1550 BlockEnd* end = x->end();
1551 tty->print("B%d ", x->block_id());
1552
1553 // print flags
1554 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1555 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1556 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1557 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1558 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1559 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1560 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1561
1562 // print block bci range
1563 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1564
1565 // print predecessors and successors
1566 if (x->number_of_preds() > 0) {
1567 tty->print("preds: ");
1568 for (int i = 0; i < x->number_of_preds(); i ++) {
1569 tty->print("B%d ", x->pred_at(i)->block_id());
1570 }
1571 }
1572
1573 if (x->number_of_sux() > 0) {
1574 tty->print("sux: ");
1575 for (int i = 0; i < x->number_of_sux(); i ++) {
1576 tty->print("B%d ", x->sux_at(i)->block_id());
1577 }
1578 }
1579
1580 // print exception handlers
1581 if (x->number_of_exception_handlers() > 0) {
1582 tty->print("xhandler: ");
1583 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1584 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1585 }
1586 }
1587
1588 tty->cr();
1589 }
1590
1591 void print_LIR(BlockList* blocks) {
1592 tty->print_cr("LIR:");
1593 int i;
1594 for (i = 0; i < blocks->length(); i++) {
1595 BlockBegin* bb = blocks->at(i);
1596 print_block(bb);
1597 tty->print("__id_Instruction___________________________________________"); tty->cr();
1598 bb->lir()->print_instructions();
1599 }
1600 }
1601
1602 void LIR_List::print_instructions() {
1603 for (int i = 0; i < _operations.length(); i++) {
1604 _operations.at(i)->print(); tty->cr();
1605 }
1606 tty->cr();
1607 }
1608
1609 // LIR_Ops printing routines
1610 // LIR_Op
1611 void LIR_Op::print_on(outputStream* out) const {
1612 if (id() != -1 || PrintCFGToFile) {
1613 out->print("%4d ", id());
1614 } else {
1615 out->print(" ");
1616 }
1617 out->print("%s ", name());
1618 print_instr(out);
1619 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1620 #ifdef ASSERT
1621 if (Verbose && _file != NULL) {
1622 out->print(" (%s:%d)", _file, _line);
1623 }
1624 #endif
1625 }
1626
1627 const char * LIR_Op::name() const {
1628 const char* s = NULL;
1629 switch(code()) {
1630 // LIR_Op0
1631 case lir_membar: s = "membar"; break;
1632 case lir_membar_acquire: s = "membar_acquire"; break;
1633 case lir_membar_release: s = "membar_release"; break;
1634 case lir_membar_loadload: s = "membar_loadload"; break;
1635 case lir_membar_storestore: s = "membar_storestore"; break;
1636 case lir_membar_loadstore: s = "membar_loadstore"; break;
1637 case lir_membar_storeload: s = "membar_storeload"; break;
1638 case lir_word_align: s = "word_align"; break;
1639 case lir_label: s = "label"; break;
1640 case lir_nop: s = "nop"; break;
1641 case lir_on_spin_wait: s = "on_spin_wait"; break;
1642 case lir_backwardbranch_target: s = "backbranch"; break;
1643 case lir_std_entry: s = "std_entry"; break;
1644 case lir_osr_entry: s = "osr_entry"; break;
1645 case lir_build_frame: s = "build_frm"; break;
1646 case lir_fpop_raw: s = "fpop_raw"; break;
1647 case lir_24bit_FPU: s = "24bit_FPU"; break;
1648 case lir_reset_FPU: s = "reset_FPU"; break;
1649 case lir_breakpoint: s = "breakpoint"; break;
1650 case lir_get_thread: s = "get_thread"; break;
1651 // LIR_Op1
1652 case lir_fxch: s = "fxch"; break;
1653 case lir_fld: s = "fld"; break;
1654 case lir_ffree: s = "ffree"; break;
1655 case lir_push: s = "push"; break;
1656 case lir_pop: s = "pop"; break;
1657 case lir_null_check: s = "null_check"; break;
1658 case lir_return: s = "return"; break;
1659 case lir_safepoint: s = "safepoint"; break;
1660 case lir_neg: s = "neg"; break;
1661 case lir_leal: s = "leal"; break;
1662 case lir_branch: s = "branch"; break;
1663 case lir_cond_float_branch: s = "flt_cond_br"; break;
1664 case lir_move: s = "move"; break;
1665 case lir_roundfp: s = "roundfp"; break;
1666 case lir_rtcall: s = "rtcall"; break;
1667 case lir_throw: s = "throw"; break;
1668 case lir_unwind: s = "unwind"; break;
1669 case lir_convert: s = "convert"; break;
1670 case lir_alloc_object: s = "alloc_obj"; break;
1671 case lir_monaddr: s = "mon_addr"; break;
1672 case lir_pack64: s = "pack64"; break;
1673 case lir_unpack64: s = "unpack64"; break;
1674 // LIR_Op2
1675 case lir_cmp: s = "cmp"; break;
1676 case lir_cmp_l2i: s = "cmp_l2i"; break;
1677 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1678 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1679 case lir_cmove: s = "cmove"; break;
1680 case lir_add: s = "add"; break;
1681 case lir_sub: s = "sub"; break;
1682 case lir_mul: s = "mul"; break;
1683 case lir_mul_strictfp: s = "mul_strictfp"; break;
1684 case lir_div: s = "div"; break;
1685 case lir_div_strictfp: s = "div_strictfp"; break;
1686 case lir_rem: s = "rem"; break;
1687 case lir_abs: s = "abs"; break;
1688 case lir_sqrt: s = "sqrt"; break;
1689 case lir_logic_and: s = "logic_and"; break;
1690 case lir_logic_or: s = "logic_or"; break;
1691 case lir_logic_xor: s = "logic_xor"; break;
1692 case lir_shl: s = "shift_left"; break;
1693 case lir_shr: s = "shift_right"; break;
1694 case lir_ushr: s = "ushift_right"; break;
1695 case lir_alloc_array: s = "alloc_array"; break;
1696 case lir_xadd: s = "xadd"; break;
1697 case lir_xchg: s = "xchg"; break;
1698 // LIR_Op3
1699 case lir_idiv: s = "idiv"; break;
1700 case lir_irem: s = "irem"; break;
1701 case lir_fmad: s = "fmad"; break;
1702 case lir_fmaf: s = "fmaf"; break;
1703 // LIR_OpJavaCall
1704 case lir_static_call: s = "static"; break;
1705 case lir_optvirtual_call: s = "optvirtual"; break;
1706 case lir_icvirtual_call: s = "icvirtual"; break;
1707 case lir_virtual_call: s = "virtual"; break;
1708 case lir_dynamic_call: s = "dynamic"; break;
1709 // LIR_OpArrayCopy
1710 case lir_arraycopy: s = "arraycopy"; break;
1711 // LIR_OpUpdateCRC32
1712 case lir_updatecrc32: s = "updatecrc32"; break;
1713 // LIR_OpLock
1714 case lir_lock: s = "lock"; break;
1715 case lir_unlock: s = "unlock"; break;
1716 // LIR_OpDelay
1717 case lir_delay_slot: s = "delay"; break;
1718 // LIR_OpTypeCheck
1719 case lir_instanceof: s = "instanceof"; break;
1720 case lir_checkcast: s = "checkcast"; break;
1721 case lir_store_check: s = "store_check"; break;
1722 // LIR_OpCompareAndSwap
1723 case lir_cas_long: s = "cas_long"; break;
1724 case lir_cas_obj: s = "cas_obj"; break;
1725 case lir_cas_int: s = "cas_int"; break;
1726 // LIR_OpProfileCall
1727 case lir_profile_call: s = "profile_call"; break;
1728 // LIR_OpProfileType
1729 case lir_profile_type: s = "profile_type"; break;
1730 // LIR_OpAssert
1731 #ifdef ASSERT
1732 case lir_assert: s = "assert"; break;
1733 #endif
1734 case lir_none: ShouldNotReachHere();break;
1735 default: s = "illegal_op"; break;
1736 }
1737 return s;
1738 }
1739
1740 // LIR_OpJavaCall
1741 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1742 out->print("call: ");
1743 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1744 if (receiver()->is_valid()) {
1745 out->print(" [recv: "); receiver()->print(out); out->print("]");
1746 }
1747 if (result_opr()->is_valid()) {
1748 out->print(" [result: "); result_opr()->print(out); out->print("]");
1749 }
1750 }
1751
1752 // LIR_OpLabel
1753 void LIR_OpLabel::print_instr(outputStream* out) const {
1754 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1755 }
1756
1757 // LIR_OpArrayCopy
1758 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1759 src()->print(out); out->print(" ");
1760 src_pos()->print(out); out->print(" ");
1761 dst()->print(out); out->print(" ");
1762 dst_pos()->print(out); out->print(" ");
1763 length()->print(out); out->print(" ");
1764 tmp()->print(out); out->print(" ");
1765 }
1766
1767 // LIR_OpUpdateCRC32
1768 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1769 crc()->print(out); out->print(" ");
1770 val()->print(out); out->print(" ");
1771 result_opr()->print(out); out->print(" ");
1772 }
1773
1774 // LIR_OpCompareAndSwap
1775 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1776 addr()->print(out); out->print(" ");
1777 cmp_value()->print(out); out->print(" ");
1778 new_value()->print(out); out->print(" ");
1779 tmp1()->print(out); out->print(" ");
1780 tmp2()->print(out); out->print(" ");
1781
1782 }
1783
1784 // LIR_Op0
1785 void LIR_Op0::print_instr(outputStream* out) const {
1786 result_opr()->print(out);
1787 }
1788
1789 // LIR_Op1
1790 const char * LIR_Op1::name() const {
1791 if (code() == lir_move) {
1792 switch (move_kind()) {
1793 case lir_move_normal:
1794 return "move";
1795 case lir_move_unaligned:
1796 return "unaligned move";
1797 case lir_move_volatile:
1798 return "volatile_move";
1799 case lir_move_wide:
1800 return "wide_move";
1801 default:
1802 ShouldNotReachHere();
1803 return "illegal_op";
1804 }
1805 } else {
1806 return LIR_Op::name();
1807 }
1808 }
1809
1810
1811 void LIR_Op1::print_instr(outputStream* out) const {
1812 _opr->print(out); out->print(" ");
1813 result_opr()->print(out); out->print(" ");
1814 print_patch_code(out, patch_code());
1815 }
1816
1817
1818 // LIR_Op1
1819 void LIR_OpRTCall::print_instr(outputStream* out) const {
1820 intx a = (intx)addr();
1821 out->print("%s", Runtime1::name_for_address(addr()));
1822 out->print(" ");
1823 tmp()->print(out);
1824 }
1825
1826 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1827 switch(code) {
1828 case lir_patch_none: break;
1829 case lir_patch_low: out->print("[patch_low]"); break;
1830 case lir_patch_high: out->print("[patch_high]"); break;
1831 case lir_patch_normal: out->print("[patch_normal]"); break;
1832 default: ShouldNotReachHere();
1833 }
1834 }
1835
1836 // LIR_OpBranch
1837 void LIR_OpBranch::print_instr(outputStream* out) const {
1838 print_condition(out, cond()); out->print(" ");
1839 if (block() != NULL) {
1840 out->print("[B%d] ", block()->block_id());
1841 } else if (stub() != NULL) {
1842 out->print("[");
1843 stub()->print_name(out);
1844 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1845 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1846 } else {
1847 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1848 }
1849 if (ublock() != NULL) {
1850 out->print("unordered: [B%d] ", ublock()->block_id());
1851 }
1852 }
1853
1854 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1855 switch(cond) {
1856 case lir_cond_equal: out->print("[EQ]"); break;
1857 case lir_cond_notEqual: out->print("[NE]"); break;
1858 case lir_cond_less: out->print("[LT]"); break;
1859 case lir_cond_lessEqual: out->print("[LE]"); break;
1860 case lir_cond_greaterEqual: out->print("[GE]"); break;
1861 case lir_cond_greater: out->print("[GT]"); break;
1862 case lir_cond_belowEqual: out->print("[BE]"); break;
1863 case lir_cond_aboveEqual: out->print("[AE]"); break;
1864 case lir_cond_always: out->print("[AL]"); break;
1865 default: out->print("[%d]",cond); break;
1866 }
1867 }
1868
1869 // LIR_OpConvert
1870 void LIR_OpConvert::print_instr(outputStream* out) const {
1871 print_bytecode(out, bytecode());
1872 in_opr()->print(out); out->print(" ");
1873 result_opr()->print(out); out->print(" ");
1874 #ifdef PPC32
1875 if(tmp1()->is_valid()) {
1876 tmp1()->print(out); out->print(" ");
1877 tmp2()->print(out); out->print(" ");
1878 }
1879 #endif
1880 }
1881
1882 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1883 switch(code) {
1884 case Bytecodes::_d2f: out->print("[d2f] "); break;
1885 case Bytecodes::_d2i: out->print("[d2i] "); break;
1886 case Bytecodes::_d2l: out->print("[d2l] "); break;
1887 case Bytecodes::_f2d: out->print("[f2d] "); break;
1888 case Bytecodes::_f2i: out->print("[f2i] "); break;
1889 case Bytecodes::_f2l: out->print("[f2l] "); break;
1890 case Bytecodes::_i2b: out->print("[i2b] "); break;
1891 case Bytecodes::_i2c: out->print("[i2c] "); break;
1892 case Bytecodes::_i2d: out->print("[i2d] "); break;
1893 case Bytecodes::_i2f: out->print("[i2f] "); break;
1894 case Bytecodes::_i2l: out->print("[i2l] "); break;
1895 case Bytecodes::_i2s: out->print("[i2s] "); break;
1896 case Bytecodes::_l2i: out->print("[l2i] "); break;
1897 case Bytecodes::_l2f: out->print("[l2f] "); break;
1898 case Bytecodes::_l2d: out->print("[l2d] "); break;
1899 default:
1900 out->print("[?%d]",code);
1901 break;
1902 }
1903 }
1904
1905 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1906 klass()->print(out); out->print(" ");
1907 obj()->print(out); out->print(" ");
1908 tmp1()->print(out); out->print(" ");
1909 tmp2()->print(out); out->print(" ");
1910 tmp3()->print(out); out->print(" ");
1911 tmp4()->print(out); out->print(" ");
1912 out->print("[hdr:%d]", header_size()); out->print(" ");
1913 out->print("[obj:%d]", object_size()); out->print(" ");
1914 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1915 }
1916
1917 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1918 _opr->print(out); out->print(" ");
1919 tmp()->print(out); out->print(" ");
1920 result_opr()->print(out); out->print(" ");
1921 }
1922
1923 // LIR_Op2
1924 void LIR_Op2::print_instr(outputStream* out) const {
1925 if (code() == lir_cmove || code() == lir_cmp) {
1926 print_condition(out, condition()); out->print(" ");
1927 }
1928 in_opr1()->print(out); out->print(" ");
1929 in_opr2()->print(out); out->print(" ");
1930 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1931 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1932 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1933 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1934 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1935 result_opr()->print(out);
1936 }
1937
1938 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1939 klass()->print(out); out->print(" ");
1940 len()->print(out); out->print(" ");
1941 obj()->print(out); out->print(" ");
1942 tmp1()->print(out); out->print(" ");
1943 tmp2()->print(out); out->print(" ");
1944 tmp3()->print(out); out->print(" ");
1945 tmp4()->print(out); out->print(" ");
1946 out->print("[type:0x%x]", type()); out->print(" ");
1947 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1948 }
1949
1950
1951 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1952 object()->print(out); out->print(" ");
1953 if (code() == lir_store_check) {
1954 array()->print(out); out->print(" ");
1955 }
1956 if (code() != lir_store_check) {
1957 klass()->print_name_on(out); out->print(" ");
1958 if (fast_check()) out->print("fast_check ");
1959 }
1960 tmp1()->print(out); out->print(" ");
1961 tmp2()->print(out); out->print(" ");
1962 tmp3()->print(out); out->print(" ");
1963 result_opr()->print(out); out->print(" ");
1964 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1965 }
1966
1967
1968 // LIR_Op3
1969 void LIR_Op3::print_instr(outputStream* out) const {
1970 in_opr1()->print(out); out->print(" ");
1971 in_opr2()->print(out); out->print(" ");
1972 in_opr3()->print(out); out->print(" ");
1973 result_opr()->print(out);
1974 }
1975
1976
1977 void LIR_OpLock::print_instr(outputStream* out) const {
1978 hdr_opr()->print(out); out->print(" ");
1979 obj_opr()->print(out); out->print(" ");
1980 lock_opr()->print(out); out->print(" ");
1981 if (_scratch->is_valid()) {
1982 _scratch->print(out); out->print(" ");
1983 }
1984 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1985 }
1986
1987 #ifdef ASSERT
1988 void LIR_OpAssert::print_instr(outputStream* out) const {
1989 print_condition(out, condition()); out->print(" ");
1990 in_opr1()->print(out); out->print(" ");
1991 in_opr2()->print(out); out->print(", \"");
1992 out->print("%s", msg()); out->print("\"");
1993 }
1994 #endif
1995
1996
1997 void LIR_OpDelay::print_instr(outputStream* out) const {
1998 _op->print_on(out);
1999 }
2000
2001
2002 // LIR_OpProfileCall
2003 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2004 profiled_method()->name()->print_symbol_on(out);
2005 out->print(".");
2006 profiled_method()->holder()->name()->print_symbol_on(out);
2007 out->print(" @ %d ", profiled_bci());
2008 mdo()->print(out); out->print(" ");
2009 recv()->print(out); out->print(" ");
2010 tmp1()->print(out); out->print(" ");
2011 }
2012
2013 // LIR_OpProfileType
2014 void LIR_OpProfileType::print_instr(outputStream* out) const {
2015 out->print("exact = ");
2016 if (exact_klass() == NULL) {
2017 out->print("unknown");
2018 } else {
2019 exact_klass()->print_name_on(out);
2020 }
2021 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2022 out->print(" ");
2023 mdp()->print(out); out->print(" ");
2024 obj()->print(out); out->print(" ");
2025 tmp()->print(out); out->print(" ");
2026 }
2027
2028 #endif // PRODUCT
2029
2030 // Implementation of LIR_InsertionBuffer
2031
2032 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2033 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2034
2035 int i = number_of_insertion_points() - 1;
2036 if (i < 0 || index_at(i) < index) {
2037 append_new(index, 1);
2038 } else {
2039 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2040 assert(count_at(i) > 0, "check");
2041 set_count_at(i, count_at(i) + 1);
2042 }
2043 _ops.push(op);
2044
2045 DEBUG_ONLY(verify());
2046 }
2047
2048 #ifdef ASSERT
2049 void LIR_InsertionBuffer::verify() {
2050 int sum = 0;
2051 int prev_idx = -1;
2052
2053 for (int i = 0; i < number_of_insertion_points(); i++) {
2054 assert(prev_idx < index_at(i), "index must be ordered ascending");
2055 sum += count_at(i);
2056 }
2057 assert(sum == number_of_ops(), "wrong total sum");
2058 }
2059 #endif