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src/hotspot/cpu/aarch64/aarch64.ad

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rev 56895 : 8233948: AArch64: Incorrect mapping between OptoReg and VMReg for high 64 bits of Vector Register
Reviewed-by: duke


1871 
1872 //=============================================================================
1873 
1874 // Figure out which register class each belongs in: rc_int, rc_float or
1875 // rc_stack.
1876 enum RC { rc_bad, rc_int, rc_float, rc_stack };
1877 
1878 static enum RC rc_class(OptoReg::Name reg) {
1879 
1880   if (reg == OptoReg::Bad) {
1881     return rc_bad;
1882   }
1883 
1884   // we have 30 int registers * 2 halves
1885   // (rscratch1 and rscratch2 are omitted)
1886 
1887   if (reg < 60) {
1888     return rc_int;
1889   }
1890 
1891   // we have 32 float register * 2 halves
1892   if (reg < 60 + 128) {
1893     return rc_float;
1894   }
1895 
1896   // Between float regs & stack is the flags regs.
1897   assert(OptoReg::is_stack(reg), "blow up if spilling flags");
1898 
1899   return rc_stack;
1900 }
1901 
1902 uint MachSpillCopyNode::implementation(CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream *st) const {
1903   Compile* C = ra_->C;
1904 
1905   // Get registers to move.
1906   OptoReg::Name src_hi = ra_->get_reg_second(in(1));
1907   OptoReg::Name src_lo = ra_->get_reg_first(in(1));
1908   OptoReg::Name dst_hi = ra_->get_reg_second(this);
1909   OptoReg::Name dst_lo = ra_->get_reg_first(this);
1910 
1911   enum RC src_hi_rc = rc_class(src_hi);
1912   enum RC src_lo_rc = rc_class(src_lo);




1871 
1872 //=============================================================================
1873 
1874 // Figure out which register class each belongs in: rc_int, rc_float or
1875 // rc_stack.
1876 enum RC { rc_bad, rc_int, rc_float, rc_stack };
1877 
1878 static enum RC rc_class(OptoReg::Name reg) {
1879 
1880   if (reg == OptoReg::Bad) {
1881     return rc_bad;
1882   }
1883 
1884   // we have 30 int registers * 2 halves
1885   // (rscratch1 and rscratch2 are omitted)
1886 
1887   if (reg < 60) {
1888     return rc_int;
1889   }
1890 
1891   // we have 32 float register * 4 halves
1892   if (reg < 60 + FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers) {
1893     return rc_float;
1894   }
1895 
1896   // Between float regs & stack is the flags regs.
1897   assert(OptoReg::is_stack(reg), "blow up if spilling flags");
1898 
1899   return rc_stack;
1900 }
1901 
1902 uint MachSpillCopyNode::implementation(CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream *st) const {
1903   Compile* C = ra_->C;
1904 
1905   // Get registers to move.
1906   OptoReg::Name src_hi = ra_->get_reg_second(in(1));
1907   OptoReg::Name src_lo = ra_->get_reg_first(in(1));
1908   OptoReg::Name dst_hi = ra_->get_reg_second(this);
1909   OptoReg::Name dst_lo = ra_->get_reg_first(this);
1910 
1911   enum RC src_hi_rc = rc_class(src_hi);
1912   enum RC src_lo_rc = rc_class(src_lo);


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