src/hotspot/cpu/aarch64/register_aarch64.hpp

rev 56895 : 8233948: AArch64: Incorrect mapping between OptoReg and VMReg for high 64 bits of Vector Register
Reviewed-by: duke

@@ -42,11 +42,12 @@
 class RegisterImpl: public AbstractRegisterImpl {
  public:
   enum {
     number_of_registers         =   32,
     number_of_byte_registers      = 32,
-    number_of_registers_for_jvmci = 34   // Including SP and ZR.
+    number_of_registers_for_jvmci = 34,  // Including SP and ZR.
+    max_slots_per_register = 2
   };
 
   // derived registers, offsets, and addresses
   Register successor() const                          { return as_Register(encoding() + 1); }
 

@@ -125,11 +126,12 @@
 
 // The implementation of floating point registers for the architecture
 class FloatRegisterImpl: public AbstractRegisterImpl {
  public:
   enum {
-    number_of_registers = 32
+    number_of_registers = 32,
+    max_slots_per_register = 4
   };
 
   // construction
   inline friend FloatRegister as_FloatRegister(int encoding);
 

@@ -191,12 +193,12 @@
   // A big enough number for C2: all the registers plus flags
   // This number must be large enough to cover REG_COUNT (defined by c2) registers.
   // There is no requirement that any ordering here matches any ordering c2 gives
   // it's optoregs.
 
-    number_of_registers = (2 * RegisterImpl::number_of_registers +
-                           4 * FloatRegisterImpl::number_of_registers +
+    number_of_registers = (RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers +
+                           FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers +
                            1) // flags
   };
 
   // added to make it compile
   static const int max_gpr;