1 /*
2 * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include <sys/types.h>
27
28 #include "precompiled.hpp"
29 #include "asm/assembler.hpp"
30 #include "asm/assembler.inline.hpp"
31 #include "interpreter/interpreter.hpp"
32
33 #include "compiler/disassembler.hpp"
34 #include "memory/resourceArea.hpp"
35 #include "nativeInst_aarch64.hpp"
36 #include "oops/klass.inline.hpp"
37 #include "oops/oop.inline.hpp"
38 #include "opto/compile.hpp"
39 #include "opto/intrinsicnode.hpp"
40 #include "opto/node.hpp"
41 #include "runtime/biasedLocking.hpp"
42 #include "runtime/icache.hpp"
43 #include "runtime/interfaceSupport.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/thread.hpp"
46
47 #if INCLUDE_ALL_GCS
48 #include "gc/g1/g1CollectedHeap.inline.hpp"
49 #include "gc/g1/g1SATBCardTableModRefBS.hpp"
50 #include "gc/g1/heapRegion.hpp"
51 #endif
52
53 #ifdef PRODUCT
54 #define BLOCK_COMMENT(str) /* nothing */
55 #define STOP(error) stop(error)
56 #else
57 #define BLOCK_COMMENT(str) block_comment(str)
58 #define STOP(error) block_comment(error); stop(error)
59 #endif
60
1992 cmpptr(rheapbase, ExternalAddress((address)Universe::narrow_ptrs_base_addr()));
1993 br(Assembler::EQ, ok);
1994 stop(msg);
1995 bind(ok);
1996 pop(1 << rscratch1->encoding(), sp);
1997 }
1998 #endif
1999 }
2000 #endif
2001
2002 void MacroAssembler::stop(const char* msg) {
2003 address ip = pc();
2004 pusha();
2005 mov(c_rarg0, (address)msg);
2006 mov(c_rarg1, (address)ip);
2007 mov(c_rarg2, sp);
2008 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
2009 // call(c_rarg3);
2010 blrt(c_rarg3, 3, 0, 1);
2011 hlt(0);
2012 }
2013
2014 // If a constant does not fit in an immediate field, generate some
2015 // number of MOV instructions and then perform the operation.
2016 void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm,
2017 add_sub_imm_insn insn1,
2018 add_sub_reg_insn insn2) {
2019 assert(Rd != zr, "Rd = zr and not setting flags?");
2020 if (operand_valid_for_add_sub_immediate((int)imm)) {
2021 (this->*insn1)(Rd, Rn, imm);
2022 } else {
2023 if (uabs(imm) < (1 << 24)) {
2024 (this->*insn1)(Rd, Rn, imm & -(1 << 12));
2025 (this->*insn1)(Rd, Rd, imm & ((1 << 12)-1));
2026 } else {
2027 assert_different_registers(Rd, Rn);
2028 mov(Rd, (uint64_t)imm);
2029 (this->*insn2)(Rd, Rn, Rd, LSL, 0);
2030 }
2031 }
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1 /*
2 * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include <sys/types.h>
27
28 #include "precompiled.hpp"
29 #include "asm/assembler.hpp"
30 #include "asm/assembler.inline.hpp"
31 #include "interpreter/interpreter.hpp"
32
33 #include "compiler/disassembler.hpp"
34 #include "memory/resourceArea.hpp"
35 #include "nativeInst_aarch64.hpp"
36 #include "oops/klass.inline.hpp"
37 #include "oops/oop.inline.hpp"
38 #include "opto/compile.hpp"
39 #include "opto/intrinsicnode.hpp"
40 #include "opto/node.hpp"
41 #include "prims/jvm.h"
42 #include "runtime/biasedLocking.hpp"
43 #include "runtime/icache.hpp"
44 #include "runtime/interfaceSupport.hpp"
45 #include "runtime/sharedRuntime.hpp"
46 #include "runtime/thread.hpp"
47
48 #if INCLUDE_ALL_GCS
49 #include "gc/g1/g1CollectedHeap.inline.hpp"
50 #include "gc/g1/g1SATBCardTableModRefBS.hpp"
51 #include "gc/g1/heapRegion.hpp"
52 #endif
53
54 #ifdef PRODUCT
55 #define BLOCK_COMMENT(str) /* nothing */
56 #define STOP(error) stop(error)
57 #else
58 #define BLOCK_COMMENT(str) block_comment(str)
59 #define STOP(error) block_comment(error); stop(error)
60 #endif
61
1993 cmpptr(rheapbase, ExternalAddress((address)Universe::narrow_ptrs_base_addr()));
1994 br(Assembler::EQ, ok);
1995 stop(msg);
1996 bind(ok);
1997 pop(1 << rscratch1->encoding(), sp);
1998 }
1999 #endif
2000 }
2001 #endif
2002
2003 void MacroAssembler::stop(const char* msg) {
2004 address ip = pc();
2005 pusha();
2006 mov(c_rarg0, (address)msg);
2007 mov(c_rarg1, (address)ip);
2008 mov(c_rarg2, sp);
2009 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
2010 // call(c_rarg3);
2011 blrt(c_rarg3, 3, 0, 1);
2012 hlt(0);
2013 }
2014
2015 void MacroAssembler::unimplemented(const char* what) {
2016 char* b = new char[1024];
2017 jio_snprintf(b, 1024, "unimplemented: %s", what);
2018 stop(b);
2019 }
2020
2021 // If a constant does not fit in an immediate field, generate some
2022 // number of MOV instructions and then perform the operation.
2023 void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm,
2024 add_sub_imm_insn insn1,
2025 add_sub_reg_insn insn2) {
2026 assert(Rd != zr, "Rd = zr and not setting flags?");
2027 if (operand_valid_for_add_sub_immediate((int)imm)) {
2028 (this->*insn1)(Rd, Rn, imm);
2029 } else {
2030 if (uabs(imm) < (1 << 24)) {
2031 (this->*insn1)(Rd, Rn, imm & -(1 << 12));
2032 (this->*insn1)(Rd, Rd, imm & ((1 << 12)-1));
2033 } else {
2034 assert_different_registers(Rd, Rn);
2035 mov(Rd, (uint64_t)imm);
2036 (this->*insn2)(Rd, Rn, Rd, LSL, 0);
2037 }
2038 }
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