src/cpu/sparc/vm/vm_version_sparc.cpp

*** 227,266 ****
    if (!has_vis1()) // Drop to 0 if no VIS1 support
      UseVIS = 0;
  
    // SPARC T4 and above should have support for AES instructions
    if (has_aes()) {
-     if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3
        if (FLAG_IS_DEFAULT(UseAES)) {
          FLAG_SET_DEFAULT(UseAES, true);
        }
!       if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
!         FLAG_SET_DEFAULT(UseAESIntrinsics, true);
        }
-       // we disable both the AES flags if either of them is disabled on the command line
-       if (!UseAES || !UseAESIntrinsics) {
-         FLAG_SET_DEFAULT(UseAES, false);
          FLAG_SET_DEFAULT(UseAESIntrinsics, false);
        }
      } else {
!         if (UseAES || UseAESIntrinsics) {
!           warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled.");
!           if (UseAES) {
!             FLAG_SET_DEFAULT(UseAES, false);
            }
-           if (UseAESIntrinsics) {
              FLAG_SET_DEFAULT(UseAESIntrinsics, false);
            }
          }
-     }
    } else if (UseAES || UseAESIntrinsics) {
      warning("AES instructions are not available on this CPU");
-     if (UseAES) {
-       FLAG_SET_DEFAULT(UseAES, false);
      }
!     if (UseAESIntrinsics) {
!       FLAG_SET_DEFAULT(UseAESIntrinsics, false);
      }
    }
  
    // GHASH/GCM intrinsics
    if (has_vis3() && (UseVIS > 2)) {
--- 227,264 ----
    if (!has_vis1()) // Drop to 0 if no VIS1 support
      UseVIS = 0;
  
    // SPARC T4 and above should have support for AES instructions
    if (has_aes()) {
      if (FLAG_IS_DEFAULT(UseAES)) {
        FLAG_SET_DEFAULT(UseAES, true);
      }
!     if (!UseAES) {
!       if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
!         warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
        }
        FLAG_SET_DEFAULT(UseAESIntrinsics, false);
+       } else {
+         // The AES intrinsic stubs require AES instruction support (of course)
+         // but also require VIS3 mode or higher for instructions it use.
+         if (UseVIS > 2) {
+           if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
+             FLAG_SET_DEFAULT(UseAESIntrinsics, true);
            }
          } else {
!           if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
!             warning("SPARC AES intrinsics require VIS3 instructions. Intrinsics will be disabled.");
            }
            FLAG_SET_DEFAULT(UseAESIntrinsics, false);
          }
        }
    } else if (UseAES || UseAESIntrinsics) {
+     if (UseAES && !FLAG_IS_DEFAULT(UseAES)) {
        warning("AES instructions are not available on this CPU");
      }
!     if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
!       warning("AES intrinsics are not available on this CPU");
      }
   }
  
    // GHASH/GCM intrinsics
    if (has_vis3() && (UseVIS > 2)) {