1 /*
2 * Copyright 2003-2010 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_sharedRuntime_x86_32.cpp.incl"
27
28 #define __ masm->
29 #ifdef COMPILER2
30 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob;
31 #endif // COMPILER2
32
33 DeoptimizationBlob *SharedRuntime::_deopt_blob;
34 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob;
35 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob;
36 RuntimeStub* SharedRuntime::_wrong_method_blob;
37 RuntimeStub* SharedRuntime::_ic_miss_blob;
38 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob;
39 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob;
40 RuntimeStub* SharedRuntime::_resolve_static_call_blob;
41
42 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
43
44 class RegisterSaver {
45 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
46 // Capture info about frame layout
47 enum layout {
48 fpu_state_off = 0,
49 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
50 st0_off, st0H_off,
51 st1_off, st1H_off,
52 st2_off, st2H_off,
53 st3_off, st3H_off,
54 st4_off, st4H_off,
55 st5_off, st5H_off,
56 st6_off, st6H_off,
57 st7_off, st7H_off,
58
59 xmm0_off, xmm0H_off,
60 xmm1_off, xmm1H_off,
61 xmm2_off, xmm2H_off,
62 xmm3_off, xmm3H_off,
63 xmm4_off, xmm4H_off,
64 xmm5_off, xmm5H_off,
65 xmm6_off, xmm6H_off,
66 xmm7_off, xmm7H_off,
67 flags_off,
68 rdi_off,
69 rsi_off,
70 ignore_off, // extra copy of rbp,
71 rsp_off,
72 rbx_off,
73 rdx_off,
74 rcx_off,
75 rax_off,
76 // The frame sender code expects that rbp will be in the "natural" place and
77 // will override any oopMap setting for it. We must therefore force the layout
78 // so that it agrees with the frame sender code.
79 rbp_off,
80 return_off, // slot for return address
81 reg_save_size };
82
83
84 public:
85
86 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
87 int* total_frame_words, bool verify_fpu = true);
88 static void restore_live_registers(MacroAssembler* masm);
89
90 static int rax_offset() { return rax_off; }
91 static int rbx_offset() { return rbx_off; }
92
93 // Offsets into the register save area
94 // Used by deoptimization when it is managing result register
95 // values on its own
96
97 static int raxOffset(void) { return rax_off; }
98 static int rdxOffset(void) { return rdx_off; }
99 static int rbxOffset(void) { return rbx_off; }
100 static int xmm0Offset(void) { return xmm0_off; }
101 // This really returns a slot in the fp save area, which one is not important
102 static int fpResultOffset(void) { return st0_off; }
103
104 // During deoptimization only the result register need to be restored
105 // all the other values have already been extracted.
106
107 static void restore_result_registers(MacroAssembler* masm);
108
109 };
110
111 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
112 int* total_frame_words, bool verify_fpu) {
113
114 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
115 int frame_words = frame_size_in_bytes / wordSize;
116 *total_frame_words = frame_words;
117
118 assert(FPUStateSizeInWords == 27, "update stack layout");
119
120 // save registers, fpu state, and flags
121 // We assume caller has already has return address slot on the stack
122 // We push epb twice in this sequence because we want the real rbp,
123 // to be under the return like a normal enter and we want to use pusha
124 // We push by hand instead of pusing push
125 __ enter();
126 __ pusha();
127 __ pushf();
128 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
129 __ push_FPU_state(); // Save FPU state & init
130
131 if (verify_fpu) {
132 // Some stubs may have non standard FPU control word settings so
133 // only check and reset the value when it required to be the
134 // standard value. The safepoint blob in particular can be used
135 // in methods which are using the 24 bit control word for
136 // optimized float math.
137
138 #ifdef ASSERT
139 // Make sure the control word has the expected value
140 Label ok;
141 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
142 __ jccb(Assembler::equal, ok);
143 __ stop("corrupted control word detected");
144 __ bind(ok);
145 #endif
146
147 // Reset the control word to guard against exceptions being unmasked
148 // since fstp_d can cause FPU stack underflow exceptions. Write it
149 // into the on stack copy and then reload that to make sure that the
150 // current and future values are correct.
151 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
152 }
153
154 __ frstor(Address(rsp, 0));
155 if (!verify_fpu) {
156 // Set the control word so that exceptions are masked for the
157 // following code.
158 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
159 }
160
161 // Save the FPU registers in de-opt-able form
162
163 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
164 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
165 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
166 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
167 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
168 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
169 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
170 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
171
172 if( UseSSE == 1 ) { // Save the XMM state
173 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
174 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
175 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
176 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
177 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
178 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
179 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
180 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
181 } else if( UseSSE >= 2 ) {
182 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
183 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
184 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
185 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
186 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
187 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
188 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
189 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
190 }
191
192 // Set an oopmap for the call site. This oopmap will map all
193 // oop-registers and debug-info registers as callee-saved. This
194 // will allow deoptimization at this safepoint to find all possible
195 // debug-info recordings, as well as let GC find all oops.
196
197 OopMapSet *oop_maps = new OopMapSet();
198 OopMap* map = new OopMap( frame_words, 0 );
199
200 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
201
202 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
203 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
204 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
205 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
206 // rbp, location is known implicitly, no oopMap
207 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
208 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
209 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
210 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
211 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
212 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
213 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
214 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
215 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
216 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
217 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
218 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
222 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
223 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
225 // %%% This is really a waste but we'll keep things as they were for now
226 if (true) {
227 #define NEXTREG(x) (x)->as_VMReg()->next()
228 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
229 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
230 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
231 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
232 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
233 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
234 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
235 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
236 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
237 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
238 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
239 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
240 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
241 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
242 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
243 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
244 #undef NEXTREG
245 #undef STACK_OFFSET
246 }
247
248 return map;
249
250 }
251
252 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
253
254 // Recover XMM & FPU state
255 if( UseSSE == 1 ) {
256 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
257 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
258 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
259 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
260 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
261 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
262 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
263 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
264 } else if( UseSSE >= 2 ) {
265 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
266 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
267 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
268 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
269 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
270 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
271 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
272 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
273 }
274 __ pop_FPU_state();
275 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
276
277 __ popf();
278 __ popa();
279 // Get the rbp, described implicitly by the frame sender code (no oopMap)
280 __ pop(rbp);
281
282 }
283
284 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
285
286 // Just restore result register. Only used by deoptimization. By
287 // now any callee save register that needs to be restore to a c2
288 // caller of the deoptee has been extracted into the vframeArray
289 // and will be stuffed into the c2i adapter we create for later
290 // restoration so only result registers need to be restored here.
291 //
292
293 __ frstor(Address(rsp, 0)); // Restore fpu state
294
295 // Recover XMM & FPU state
296 if( UseSSE == 1 ) {
297 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
298 } else if( UseSSE >= 2 ) {
299 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
300 }
301 __ movptr(rax, Address(rsp, rax_off*wordSize));
302 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
303 // Pop all of the register save are off the stack except the return address
304 __ addptr(rsp, return_off * wordSize);
305 }
306
307 // The java_calling_convention describes stack locations as ideal slots on
308 // a frame with no abi restrictions. Since we must observe abi restrictions
309 // (like the placement of the register window) the slots must be biased by
310 // the following value.
311 static int reg2offset_in(VMReg r) {
312 // Account for saved rbp, and return address
313 // This should really be in_preserve_stack_slots
314 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
315 }
316
317 static int reg2offset_out(VMReg r) {
318 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
319 }
320
321 // ---------------------------------------------------------------------------
322 // Read the array of BasicTypes from a signature, and compute where the
323 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
324 // quantities. Values less than SharedInfo::stack0 are registers, those above
325 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
326 // as framesizes are fixed.
327 // VMRegImpl::stack0 refers to the first slot 0(sp).
328 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
329 // up to RegisterImpl::number_of_registers) are the 32-bit
330 // integer registers.
331
332 // Pass first two oop/int args in registers ECX and EDX.
333 // Pass first two float/double args in registers XMM0 and XMM1.
334 // Doubles have precedence, so if you pass a mix of floats and doubles
335 // the doubles will grab the registers before the floats will.
336
337 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
338 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
339 // units regardless of build. Of course for i486 there is no 64 bit build
340
341
342 // ---------------------------------------------------------------------------
343 // The compiled Java calling convention.
344 // Pass first two oop/int args in registers ECX and EDX.
345 // Pass first two float/double args in registers XMM0 and XMM1.
346 // Doubles have precedence, so if you pass a mix of floats and doubles
347 // the doubles will grab the registers before the floats will.
348 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
349 VMRegPair *regs,
350 int total_args_passed,
351 int is_outgoing) {
352 uint stack = 0; // Starting stack position for args on stack
353
354
355 // Pass first two oop/int args in registers ECX and EDX.
356 uint reg_arg0 = 9999;
357 uint reg_arg1 = 9999;
358
359 // Pass first two float/double args in registers XMM0 and XMM1.
360 // Doubles have precedence, so if you pass a mix of floats and doubles
361 // the doubles will grab the registers before the floats will.
362 // CNC - TURNED OFF FOR non-SSE.
363 // On Intel we have to round all doubles (and most floats) at
364 // call sites by storing to the stack in any case.
365 // UseSSE=0 ==> Don't Use ==> 9999+0
366 // UseSSE=1 ==> Floats only ==> 9999+1
367 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
368 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
369 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
370 uint freg_arg0 = 9999+fargs;
371 uint freg_arg1 = 9999+fargs;
372
373 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
374 int i;
375 for( i = 0; i < total_args_passed; i++) {
376 if( sig_bt[i] == T_DOUBLE ) {
377 // first 2 doubles go in registers
378 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
379 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
380 else // Else double is passed low on the stack to be aligned.
381 stack += 2;
382 } else if( sig_bt[i] == T_LONG ) {
383 stack += 2;
384 }
385 }
386 int dstack = 0; // Separate counter for placing doubles
387
388 // Now pick where all else goes.
389 for( i = 0; i < total_args_passed; i++) {
390 // From the type and the argument number (count) compute the location
391 switch( sig_bt[i] ) {
392 case T_SHORT:
393 case T_CHAR:
394 case T_BYTE:
395 case T_BOOLEAN:
396 case T_INT:
397 case T_ARRAY:
398 case T_OBJECT:
399 case T_ADDRESS:
400 if( reg_arg0 == 9999 ) {
401 reg_arg0 = i;
402 regs[i].set1(rcx->as_VMReg());
403 } else if( reg_arg1 == 9999 ) {
404 reg_arg1 = i;
405 regs[i].set1(rdx->as_VMReg());
406 } else {
407 regs[i].set1(VMRegImpl::stack2reg(stack++));
408 }
409 break;
410 case T_FLOAT:
411 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
412 freg_arg0 = i;
413 regs[i].set1(xmm0->as_VMReg());
414 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
415 freg_arg1 = i;
416 regs[i].set1(xmm1->as_VMReg());
417 } else {
418 regs[i].set1(VMRegImpl::stack2reg(stack++));
419 }
420 break;
421 case T_LONG:
422 assert(sig_bt[i+1] == T_VOID, "missing Half" );
423 regs[i].set2(VMRegImpl::stack2reg(dstack));
424 dstack += 2;
425 break;
426 case T_DOUBLE:
427 assert(sig_bt[i+1] == T_VOID, "missing Half" );
428 if( freg_arg0 == (uint)i ) {
429 regs[i].set2(xmm0->as_VMReg());
430 } else if( freg_arg1 == (uint)i ) {
431 regs[i].set2(xmm1->as_VMReg());
432 } else {
433 regs[i].set2(VMRegImpl::stack2reg(dstack));
434 dstack += 2;
435 }
436 break;
437 case T_VOID: regs[i].set_bad(); break;
438 break;
439 default:
440 ShouldNotReachHere();
441 break;
442 }
443 }
444
445 // return value can be odd number of VMRegImpl stack slots make multiple of 2
446 return round_to(stack, 2);
447 }
448
449 // Patch the callers callsite with entry to compiled code if it exists.
450 static void patch_callers_callsite(MacroAssembler *masm) {
451 Label L;
452 __ verify_oop(rbx);
453 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
454 __ jcc(Assembler::equal, L);
455 // Schedule the branch target address early.
456 // Call into the VM to patch the caller, then jump to compiled callee
457 // rax, isn't live so capture return address while we easily can
458 __ movptr(rax, Address(rsp, 0));
459 __ pusha();
460 __ pushf();
461
462 if (UseSSE == 1) {
463 __ subptr(rsp, 2*wordSize);
464 __ movflt(Address(rsp, 0), xmm0);
465 __ movflt(Address(rsp, wordSize), xmm1);
466 }
467 if (UseSSE >= 2) {
468 __ subptr(rsp, 4*wordSize);
469 __ movdbl(Address(rsp, 0), xmm0);
470 __ movdbl(Address(rsp, 2*wordSize), xmm1);
471 }
472 #ifdef COMPILER2
473 // C2 may leave the stack dirty if not in SSE2+ mode
474 if (UseSSE >= 2) {
475 __ verify_FPU(0, "c2i transition should have clean FPU stack");
476 } else {
477 __ empty_FPU_stack();
478 }
479 #endif /* COMPILER2 */
480
481 // VM needs caller's callsite
482 __ push(rax);
483 // VM needs target method
484 __ push(rbx);
485 __ verify_oop(rbx);
486 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
487 __ addptr(rsp, 2*wordSize);
488
489 if (UseSSE == 1) {
490 __ movflt(xmm0, Address(rsp, 0));
491 __ movflt(xmm1, Address(rsp, wordSize));
492 __ addptr(rsp, 2*wordSize);
493 }
494 if (UseSSE >= 2) {
495 __ movdbl(xmm0, Address(rsp, 0));
496 __ movdbl(xmm1, Address(rsp, 2*wordSize));
497 __ addptr(rsp, 4*wordSize);
498 }
499
500 __ popf();
501 __ popa();
502 __ bind(L);
503 }
504
505
506 // Helper function to put tags in interpreter stack.
507 static void tag_stack(MacroAssembler *masm, const BasicType sig, int st_off) {
508 if (TaggedStackInterpreter) {
509 int tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(0);
510 if (sig == T_OBJECT || sig == T_ARRAY) {
511 __ movptr(Address(rsp, tag_offset), frame::TagReference);
512 } else if (sig == T_LONG || sig == T_DOUBLE) {
513 int next_tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(1);
514 __ movptr(Address(rsp, next_tag_offset), frame::TagValue);
515 __ movptr(Address(rsp, tag_offset), frame::TagValue);
516 } else {
517 __ movptr(Address(rsp, tag_offset), frame::TagValue);
518 }
519 }
520 }
521
522 // Double and long values with Tagged stacks are not contiguous.
523 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
524 int next_off = st_off - Interpreter::stackElementSize();
525 if (TaggedStackInterpreter) {
526 __ movdbl(Address(rsp, next_off), r);
527 // Move top half up and put tag in the middle.
528 __ movl(rdi, Address(rsp, next_off+wordSize));
529 __ movl(Address(rsp, st_off), rdi);
530 tag_stack(masm, T_DOUBLE, next_off);
531 } else {
532 __ movdbl(Address(rsp, next_off), r);
533 }
534 }
535
536 static void gen_c2i_adapter(MacroAssembler *masm,
537 int total_args_passed,
538 int comp_args_on_stack,
539 const BasicType *sig_bt,
540 const VMRegPair *regs,
541 Label& skip_fixup) {
542 // Before we get into the guts of the C2I adapter, see if we should be here
543 // at all. We've come from compiled code and are attempting to jump to the
544 // interpreter, which means the caller made a static call to get here
545 // (vcalls always get a compiled target if there is one). Check for a
546 // compiled target. If there is one, we need to patch the caller's call.
547 patch_callers_callsite(masm);
548
549 __ bind(skip_fixup);
550
551 #ifdef COMPILER2
552 // C2 may leave the stack dirty if not in SSE2+ mode
553 if (UseSSE >= 2) {
554 __ verify_FPU(0, "c2i transition should have clean FPU stack");
555 } else {
556 __ empty_FPU_stack();
557 }
558 #endif /* COMPILER2 */
559
560 // Since all args are passed on the stack, total_args_passed * interpreter_
561 // stack_element_size is the
562 // space we need.
563 int extraspace = total_args_passed * Interpreter::stackElementSize();
564
565 // Get return address
566 __ pop(rax);
567
568 // set senderSP value
569 __ movptr(rsi, rsp);
570
571 __ subptr(rsp, extraspace);
572
573 // Now write the args into the outgoing interpreter space
574 for (int i = 0; i < total_args_passed; i++) {
575 if (sig_bt[i] == T_VOID) {
576 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
577 continue;
578 }
579
580 // st_off points to lowest address on stack.
581 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize();
582 int next_off = st_off - Interpreter::stackElementSize();
583
584 // Say 4 args:
585 // i st_off
586 // 0 12 T_LONG
587 // 1 8 T_VOID
588 // 2 4 T_OBJECT
589 // 3 0 T_BOOL
590 VMReg r_1 = regs[i].first();
591 VMReg r_2 = regs[i].second();
592 if (!r_1->is_valid()) {
593 assert(!r_2->is_valid(), "");
594 continue;
595 }
596
597 if (r_1->is_stack()) {
598 // memory to memory use fpu stack top
599 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
600
601 if (!r_2->is_valid()) {
602 __ movl(rdi, Address(rsp, ld_off));
603 __ movptr(Address(rsp, st_off), rdi);
604 tag_stack(masm, sig_bt[i], st_off);
605 } else {
606
607 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
608 // st_off == MSW, st_off-wordSize == LSW
609
610 __ movptr(rdi, Address(rsp, ld_off));
611 __ movptr(Address(rsp, next_off), rdi);
612 #ifndef _LP64
613 __ movptr(rdi, Address(rsp, ld_off + wordSize));
614 __ movptr(Address(rsp, st_off), rdi);
615 #else
616 #ifdef ASSERT
617 // Overwrite the unused slot with known junk
618 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
619 __ movptr(Address(rsp, st_off), rax);
620 #endif /* ASSERT */
621 #endif // _LP64
622 tag_stack(masm, sig_bt[i], next_off);
623 }
624 } else if (r_1->is_Register()) {
625 Register r = r_1->as_Register();
626 if (!r_2->is_valid()) {
627 __ movl(Address(rsp, st_off), r);
628 tag_stack(masm, sig_bt[i], st_off);
629 } else {
630 // long/double in gpr
631 NOT_LP64(ShouldNotReachHere());
632 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
633 // T_DOUBLE and T_LONG use two slots in the interpreter
634 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
635 // long/double in gpr
636 #ifdef ASSERT
637 // Overwrite the unused slot with known junk
638 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
639 __ movptr(Address(rsp, st_off), rax);
640 #endif /* ASSERT */
641 __ movptr(Address(rsp, next_off), r);
642 tag_stack(masm, sig_bt[i], next_off);
643 } else {
644 __ movptr(Address(rsp, st_off), r);
645 tag_stack(masm, sig_bt[i], st_off);
646 }
647 }
648 } else {
649 assert(r_1->is_XMMRegister(), "");
650 if (!r_2->is_valid()) {
651 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
652 tag_stack(masm, sig_bt[i], st_off);
653 } else {
654 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
655 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
656 }
657 }
658 }
659
660 // Schedule the branch target address early.
661 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
662 // And repush original return address
663 __ push(rax);
664 __ jmp(rcx);
665 }
666
667
668 // For tagged stacks, double or long value aren't contiguous on the stack
669 // so get them contiguous for the xmm load
670 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
671 int next_val_off = ld_off - Interpreter::stackElementSize();
672 if (TaggedStackInterpreter) {
673 // use tag slot temporarily for MSW
674 __ movptr(rsi, Address(saved_sp, ld_off));
675 __ movptr(Address(saved_sp, next_val_off+wordSize), rsi);
676 __ movdbl(r, Address(saved_sp, next_val_off));
677 // restore tag
678 __ movptr(Address(saved_sp, next_val_off+wordSize), frame::TagValue);
679 } else {
680 __ movdbl(r, Address(saved_sp, next_val_off));
681 }
682 }
683
684 static void gen_i2c_adapter(MacroAssembler *masm,
685 int total_args_passed,
686 int comp_args_on_stack,
687 const BasicType *sig_bt,
688 const VMRegPair *regs) {
689 // we're being called from the interpreter but need to find the
690 // compiled return entry point. The return address on the stack
691 // should point at it and we just need to pull the old value out.
692 // load up the pointer to the compiled return entry point and
693 // rewrite our return pc. The code is arranged like so:
694 //
695 // .word Interpreter::return_sentinel
696 // .word address_of_compiled_return_point
697 // return_entry_point: blah_blah_blah
698 //
699 // So we can find the appropriate return point by loading up the word
700 // just prior to the current return address we have on the stack.
701 //
702 // We will only enter here from an interpreted frame and never from after
703 // passing thru a c2i. Azul allowed this but we do not. If we lose the
704 // race and use a c2i we will remain interpreted for the race loser(s).
705 // This removes all sorts of headaches on the x86 side and also eliminates
706 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
707
708
709 // Note: rsi contains the senderSP on entry. We must preserve it since
710 // we may do a i2c -> c2i transition if we lose a race where compiled
711 // code goes non-entrant while we get args ready.
712
713 // Pick up the return address
714 __ movptr(rax, Address(rsp, 0));
715
716 // If UseSSE >= 2 then no cleanup is needed on the return to the
717 // interpreter so skip fixing up the return entry point unless
718 // VerifyFPU is enabled.
719 if (UseSSE < 2 || VerifyFPU) {
720 Label skip, chk_int;
721 // If we were called from the call stub we need to do a little bit different
722 // cleanup than if the interpreter returned to the call stub.
723
724 ExternalAddress stub_return_address(StubRoutines::_call_stub_return_address);
725 __ cmpptr(rax, stub_return_address.addr());
726 __ jcc(Assembler::notEqual, chk_int);
727 assert(StubRoutines::x86::get_call_stub_compiled_return() != NULL, "must be set");
728 __ lea(rax, ExternalAddress(StubRoutines::x86::get_call_stub_compiled_return()));
729 __ jmp(skip);
730
731 // It must be the interpreter since we never get here via a c2i (unlike Azul)
732
733 __ bind(chk_int);
734 #ifdef ASSERT
735 {
736 Label ok;
737 __ cmpl(Address(rax, -2*wordSize), Interpreter::return_sentinel);
738 __ jcc(Assembler::equal, ok);
739 __ int3();
740 __ bind(ok);
741 }
742 #endif // ASSERT
743 __ movptr(rax, Address(rax, -wordSize));
744 __ bind(skip);
745 }
746
747 // rax, now contains the compiled return entry point which will do an
748 // cleanup needed for the return from compiled to interpreted.
749
750 // Must preserve original SP for loading incoming arguments because
751 // we need to align the outgoing SP for compiled code.
752 __ movptr(rdi, rsp);
753
754 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
755 // in registers, we will occasionally have no stack args.
756 int comp_words_on_stack = 0;
757 if (comp_args_on_stack) {
758 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
759 // registers are below. By subtracting stack0, we either get a negative
760 // number (all values in registers) or the maximum stack slot accessed.
761 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
762 // Convert 4-byte stack slots to words.
763 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
764 // Round up to miminum stack alignment, in wordSize
765 comp_words_on_stack = round_to(comp_words_on_stack, 2);
766 __ subptr(rsp, comp_words_on_stack * wordSize);
767 }
768
769 // Align the outgoing SP
770 __ andptr(rsp, -(StackAlignmentInBytes));
771
772 // push the return address on the stack (note that pushing, rather
773 // than storing it, yields the correct frame alignment for the callee)
774 __ push(rax);
775
776 // Put saved SP in another register
777 const Register saved_sp = rax;
778 __ movptr(saved_sp, rdi);
779
780
781 // Will jump to the compiled code just as if compiled code was doing it.
782 // Pre-load the register-jump target early, to schedule it better.
783 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
784
785 // Now generate the shuffle code. Pick up all register args and move the
786 // rest through the floating point stack top.
787 for (int i = 0; i < total_args_passed; i++) {
788 if (sig_bt[i] == T_VOID) {
789 // Longs and doubles are passed in native word order, but misaligned
790 // in the 32-bit build.
791 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
792 continue;
793 }
794
795 // Pick up 0, 1 or 2 words from SP+offset.
796
797 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
798 "scrambled load targets?");
799 // Load in argument order going down.
800 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
801 // Point to interpreter value (vs. tag)
802 int next_off = ld_off - Interpreter::stackElementSize();
803 //
804 //
805 //
806 VMReg r_1 = regs[i].first();
807 VMReg r_2 = regs[i].second();
808 if (!r_1->is_valid()) {
809 assert(!r_2->is_valid(), "");
810 continue;
811 }
812 if (r_1->is_stack()) {
813 // Convert stack slot to an SP offset (+ wordSize to account for return address )
814 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
815
816 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
817 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
818 // we be generated.
819 if (!r_2->is_valid()) {
820 // __ fld_s(Address(saved_sp, ld_off));
821 // __ fstp_s(Address(rsp, st_off));
822 __ movl(rsi, Address(saved_sp, ld_off));
823 __ movptr(Address(rsp, st_off), rsi);
824 } else {
825 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
826 // are accessed as negative so LSW is at LOW address
827
828 // ld_off is MSW so get LSW
829 // st_off is LSW (i.e. reg.first())
830 // __ fld_d(Address(saved_sp, next_off));
831 // __ fstp_d(Address(rsp, st_off));
832 //
833 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
834 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
835 // So we must adjust where to pick up the data to match the interpreter.
836 //
837 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
838 // are accessed as negative so LSW is at LOW address
839
840 // ld_off is MSW so get LSW
841 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
842 next_off : ld_off;
843 __ movptr(rsi, Address(saved_sp, offset));
844 __ movptr(Address(rsp, st_off), rsi);
845 #ifndef _LP64
846 __ movptr(rsi, Address(saved_sp, ld_off));
847 __ movptr(Address(rsp, st_off + wordSize), rsi);
848 #endif // _LP64
849 }
850 } else if (r_1->is_Register()) { // Register argument
851 Register r = r_1->as_Register();
852 assert(r != rax, "must be different");
853 if (r_2->is_valid()) {
854 //
855 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
856 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
857 // So we must adjust where to pick up the data to match the interpreter.
858
859 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
860 next_off : ld_off;
861
862 // this can be a misaligned move
863 __ movptr(r, Address(saved_sp, offset));
864 #ifndef _LP64
865 assert(r_2->as_Register() != rax, "need another temporary register");
866 // Remember r_1 is low address (and LSB on x86)
867 // So r_2 gets loaded from high address regardless of the platform
868 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
869 #endif // _LP64
870 } else {
871 __ movl(r, Address(saved_sp, ld_off));
872 }
873 } else {
874 assert(r_1->is_XMMRegister(), "");
875 if (!r_2->is_valid()) {
876 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
877 } else {
878 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
879 }
880 }
881 }
882
883 // 6243940 We might end up in handle_wrong_method if
884 // the callee is deoptimized as we race thru here. If that
885 // happens we don't want to take a safepoint because the
886 // caller frame will look interpreted and arguments are now
887 // "compiled" so it is much better to make this transition
888 // invisible to the stack walking code. Unfortunately if
889 // we try and find the callee by normal means a safepoint
890 // is possible. So we stash the desired callee in the thread
891 // and the vm will find there should this case occur.
892
893 __ get_thread(rax);
894 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
895
896 // move methodOop to rax, in case we end up in an c2i adapter.
897 // the c2i adapters expect methodOop in rax, (c2) because c2's
898 // resolve stubs return the result (the method) in rax,.
899 // I'd love to fix this.
900 __ mov(rax, rbx);
901
902 __ jmp(rdi);
903 }
904
905 // ---------------------------------------------------------------
906 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
907 int total_args_passed,
908 int comp_args_on_stack,
909 const BasicType *sig_bt,
910 const VMRegPair *regs,
911 AdapterFingerPrint* fingerprint) {
912 address i2c_entry = __ pc();
913
914 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
915
916 // -------------------------------------------------------------------------
917 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
918 // to the interpreter. The args start out packed in the compiled layout. They
919 // need to be unpacked into the interpreter layout. This will almost always
920 // require some stack space. We grow the current (compiled) stack, then repack
921 // the args. We finally end in a jump to the generic interpreter entry point.
922 // On exit from the interpreter, the interpreter will restore our SP (lest the
923 // compiled code, which relys solely on SP and not EBP, get sick).
924
925 address c2i_unverified_entry = __ pc();
926 Label skip_fixup;
927
928 Register holder = rax;
929 Register receiver = rcx;
930 Register temp = rbx;
931
932 {
933
934 Label missed;
935
936 __ verify_oop(holder);
937 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
938 __ verify_oop(temp);
939
940 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
941 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
942 __ jcc(Assembler::notEqual, missed);
943 // Method might have been compiled since the call site was patched to
944 // interpreted if that is the case treat it as a miss so we can get
945 // the call site corrected.
946 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
947 __ jcc(Assembler::equal, skip_fixup);
948
949 __ bind(missed);
950 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
951 }
952
953 address c2i_entry = __ pc();
954
955 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
956
957 __ flush();
958 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
959 }
960
961 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
962 VMRegPair *regs,
963 int total_args_passed) {
964 // We return the amount of VMRegImpl stack slots we need to reserve for all
965 // the arguments NOT counting out_preserve_stack_slots.
966
967 uint stack = 0; // All arguments on stack
968
969 for( int i = 0; i < total_args_passed; i++) {
970 // From the type and the argument number (count) compute the location
971 switch( sig_bt[i] ) {
972 case T_BOOLEAN:
973 case T_CHAR:
974 case T_FLOAT:
975 case T_BYTE:
976 case T_SHORT:
977 case T_INT:
978 case T_OBJECT:
979 case T_ARRAY:
980 case T_ADDRESS:
981 regs[i].set1(VMRegImpl::stack2reg(stack++));
982 break;
983 case T_LONG:
984 case T_DOUBLE: // The stack numbering is reversed from Java
985 // Since C arguments do not get reversed, the ordering for
986 // doubles on the stack must be opposite the Java convention
987 assert(sig_bt[i+1] == T_VOID, "missing Half" );
988 regs[i].set2(VMRegImpl::stack2reg(stack));
989 stack += 2;
990 break;
991 case T_VOID: regs[i].set_bad(); break;
992 default:
993 ShouldNotReachHere();
994 break;
995 }
996 }
997 return stack;
998 }
999
1000 // A simple move of integer like type
1001 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1002 if (src.first()->is_stack()) {
1003 if (dst.first()->is_stack()) {
1004 // stack to stack
1005 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1006 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1007 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1008 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1009 } else {
1010 // stack to reg
1011 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1012 }
1013 } else if (dst.first()->is_stack()) {
1014 // reg to stack
1015 // no need to sign extend on 64bit
1016 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1017 } else {
1018 if (dst.first() != src.first()) {
1019 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1020 }
1021 }
1022 }
1023
1024 // An oop arg. Must pass a handle not the oop itself
1025 static void object_move(MacroAssembler* masm,
1026 OopMap* map,
1027 int oop_handle_offset,
1028 int framesize_in_slots,
1029 VMRegPair src,
1030 VMRegPair dst,
1031 bool is_receiver,
1032 int* receiver_offset) {
1033
1034 // Because of the calling conventions we know that src can be a
1035 // register or a stack location. dst can only be a stack location.
1036
1037 assert(dst.first()->is_stack(), "must be stack");
1038 // must pass a handle. First figure out the location we use as a handle
1039
1040 if (src.first()->is_stack()) {
1041 // Oop is already on the stack as an argument
1042 Register rHandle = rax;
1043 Label nil;
1044 __ xorptr(rHandle, rHandle);
1045 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1046 __ jcc(Assembler::equal, nil);
1047 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1048 __ bind(nil);
1049 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1050
1051 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1052 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1053 if (is_receiver) {
1054 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1055 }
1056 } else {
1057 // Oop is in an a register we must store it to the space we reserve
1058 // on the stack for oop_handles
1059 const Register rOop = src.first()->as_Register();
1060 const Register rHandle = rax;
1061 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1062 int offset = oop_slot*VMRegImpl::stack_slot_size;
1063 Label skip;
1064 __ movptr(Address(rsp, offset), rOop);
1065 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1066 __ xorptr(rHandle, rHandle);
1067 __ cmpptr(rOop, (int32_t)NULL_WORD);
1068 __ jcc(Assembler::equal, skip);
1069 __ lea(rHandle, Address(rsp, offset));
1070 __ bind(skip);
1071 // Store the handle parameter
1072 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1073 if (is_receiver) {
1074 *receiver_offset = offset;
1075 }
1076 }
1077 }
1078
1079 // A float arg may have to do float reg int reg conversion
1080 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1081 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1082
1083 // Because of the calling convention we know that src is either a stack location
1084 // or an xmm register. dst can only be a stack location.
1085
1086 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1087
1088 if (src.first()->is_stack()) {
1089 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1090 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1091 } else {
1092 // reg to stack
1093 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1094 }
1095 }
1096
1097 // A long move
1098 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1099
1100 // The only legal possibility for a long_move VMRegPair is:
1101 // 1: two stack slots (possibly unaligned)
1102 // as neither the java or C calling convention will use registers
1103 // for longs.
1104
1105 if (src.first()->is_stack() && dst.first()->is_stack()) {
1106 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1107 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1108 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1109 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1110 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1111 } else {
1112 ShouldNotReachHere();
1113 }
1114 }
1115
1116 // A double move
1117 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1118
1119 // The only legal possibilities for a double_move VMRegPair are:
1120 // The painful thing here is that like long_move a VMRegPair might be
1121
1122 // Because of the calling convention we know that src is either
1123 // 1: a single physical register (xmm registers only)
1124 // 2: two stack slots (possibly unaligned)
1125 // dst can only be a pair of stack slots.
1126
1127 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1128
1129 if (src.first()->is_stack()) {
1130 // source is all stack
1131 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1132 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1133 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1134 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1135 } else {
1136 // reg to stack
1137 // No worries about stack alignment
1138 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1139 }
1140 }
1141
1142
1143 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1144 // We always ignore the frame_slots arg and just use the space just below frame pointer
1145 // which by this time is free to use
1146 switch (ret_type) {
1147 case T_FLOAT:
1148 __ fstp_s(Address(rbp, -wordSize));
1149 break;
1150 case T_DOUBLE:
1151 __ fstp_d(Address(rbp, -2*wordSize));
1152 break;
1153 case T_VOID: break;
1154 case T_LONG:
1155 __ movptr(Address(rbp, -wordSize), rax);
1156 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1157 break;
1158 default: {
1159 __ movptr(Address(rbp, -wordSize), rax);
1160 }
1161 }
1162 }
1163
1164 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1165 // We always ignore the frame_slots arg and just use the space just below frame pointer
1166 // which by this time is free to use
1167 switch (ret_type) {
1168 case T_FLOAT:
1169 __ fld_s(Address(rbp, -wordSize));
1170 break;
1171 case T_DOUBLE:
1172 __ fld_d(Address(rbp, -2*wordSize));
1173 break;
1174 case T_LONG:
1175 __ movptr(rax, Address(rbp, -wordSize));
1176 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1177 break;
1178 case T_VOID: break;
1179 default: {
1180 __ movptr(rax, Address(rbp, -wordSize));
1181 }
1182 }
1183 }
1184
1185 // ---------------------------------------------------------------------------
1186 // Generate a native wrapper for a given method. The method takes arguments
1187 // in the Java compiled code convention, marshals them to the native
1188 // convention (handlizes oops, etc), transitions to native, makes the call,
1189 // returns to java state (possibly blocking), unhandlizes any result and
1190 // returns.
1191 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1192 methodHandle method,
1193 int total_in_args,
1194 int comp_args_on_stack,
1195 BasicType *in_sig_bt,
1196 VMRegPair *in_regs,
1197 BasicType ret_type) {
1198
1199 // An OopMap for lock (and class if static)
1200 OopMapSet *oop_maps = new OopMapSet();
1201
1202 // We have received a description of where all the java arg are located
1203 // on entry to the wrapper. We need to convert these args to where
1204 // the jni function will expect them. To figure out where they go
1205 // we convert the java signature to a C signature by inserting
1206 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1207
1208 int total_c_args = total_in_args + 1;
1209 if (method->is_static()) {
1210 total_c_args++;
1211 }
1212
1213 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1214 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1215
1216 int argc = 0;
1217 out_sig_bt[argc++] = T_ADDRESS;
1218 if (method->is_static()) {
1219 out_sig_bt[argc++] = T_OBJECT;
1220 }
1221
1222 int i;
1223 for (i = 0; i < total_in_args ; i++ ) {
1224 out_sig_bt[argc++] = in_sig_bt[i];
1225 }
1226
1227
1228 // Now figure out where the args must be stored and how much stack space
1229 // they require (neglecting out_preserve_stack_slots but space for storing
1230 // the 1st six register arguments). It's weird see int_stk_helper.
1231 //
1232 int out_arg_slots;
1233 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1234
1235 // Compute framesize for the wrapper. We need to handlize all oops in
1236 // registers a max of 2 on x86.
1237
1238 // Calculate the total number of stack slots we will need.
1239
1240 // First count the abi requirement plus all of the outgoing args
1241 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1242
1243 // Now the space for the inbound oop handle area
1244
1245 int oop_handle_offset = stack_slots;
1246 stack_slots += 2*VMRegImpl::slots_per_word;
1247
1248 // Now any space we need for handlizing a klass if static method
1249
1250 int klass_slot_offset = 0;
1251 int klass_offset = -1;
1252 int lock_slot_offset = 0;
1253 bool is_static = false;
1254 int oop_temp_slot_offset = 0;
1255
1256 if (method->is_static()) {
1257 klass_slot_offset = stack_slots;
1258 stack_slots += VMRegImpl::slots_per_word;
1259 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1260 is_static = true;
1261 }
1262
1263 // Plus a lock if needed
1264
1265 if (method->is_synchronized()) {
1266 lock_slot_offset = stack_slots;
1267 stack_slots += VMRegImpl::slots_per_word;
1268 }
1269
1270 // Now a place (+2) to save return values or temp during shuffling
1271 // + 2 for return address (which we own) and saved rbp,
1272 stack_slots += 4;
1273
1274 // Ok The space we have allocated will look like:
1275 //
1276 //
1277 // FP-> | |
1278 // |---------------------|
1279 // | 2 slots for moves |
1280 // |---------------------|
1281 // | lock box (if sync) |
1282 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1283 // | klass (if static) |
1284 // |---------------------| <- klass_slot_offset
1285 // | oopHandle area |
1286 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1287 // | outbound memory |
1288 // | based arguments |
1289 // | |
1290 // |---------------------|
1291 // | |
1292 // SP-> | out_preserved_slots |
1293 //
1294 //
1295 // ****************************************************************************
1296 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1297 // arguments off of the stack after the jni call. Before the call we can use
1298 // instructions that are SP relative. After the jni call we switch to FP
1299 // relative instructions instead of re-adjusting the stack on windows.
1300 // ****************************************************************************
1301
1302
1303 // Now compute actual number of stack words we need rounding to make
1304 // stack properly aligned.
1305 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1306
1307 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1308
1309 intptr_t start = (intptr_t)__ pc();
1310
1311 // First thing make an ic check to see if we should even be here
1312
1313 // We are free to use all registers as temps without saving them and
1314 // restoring them except rbp,. rbp, is the only callee save register
1315 // as far as the interpreter and the compiler(s) are concerned.
1316
1317
1318 const Register ic_reg = rax;
1319 const Register receiver = rcx;
1320 Label hit;
1321 Label exception_pending;
1322
1323
1324 __ verify_oop(receiver);
1325 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1326 __ jcc(Assembler::equal, hit);
1327
1328 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1329
1330 // verified entry must be aligned for code patching.
1331 // and the first 5 bytes must be in the same cache line
1332 // if we align at 8 then we will be sure 5 bytes are in the same line
1333 __ align(8);
1334
1335 __ bind(hit);
1336
1337 int vep_offset = ((intptr_t)__ pc()) - start;
1338
1339 #ifdef COMPILER1
1340 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1341 // Object.hashCode can pull the hashCode from the header word
1342 // instead of doing a full VM transition once it's been computed.
1343 // Since hashCode is usually polymorphic at call sites we can't do
1344 // this optimization at the call site without a lot of work.
1345 Label slowCase;
1346 Register receiver = rcx;
1347 Register result = rax;
1348 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1349
1350 // check if locked
1351 __ testptr(result, markOopDesc::unlocked_value);
1352 __ jcc (Assembler::zero, slowCase);
1353
1354 if (UseBiasedLocking) {
1355 // Check if biased and fall through to runtime if so
1356 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1357 __ jcc (Assembler::notZero, slowCase);
1358 }
1359
1360 // get hash
1361 __ andptr(result, markOopDesc::hash_mask_in_place);
1362 // test if hashCode exists
1363 __ jcc (Assembler::zero, slowCase);
1364 __ shrptr(result, markOopDesc::hash_shift);
1365 __ ret(0);
1366 __ bind (slowCase);
1367 }
1368 #endif // COMPILER1
1369
1370 // The instruction at the verified entry point must be 5 bytes or longer
1371 // because it can be patched on the fly by make_non_entrant. The stack bang
1372 // instruction fits that requirement.
1373
1374 // Generate stack overflow check
1375
1376 if (UseStackBanging) {
1377 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1378 } else {
1379 // need a 5 byte instruction to allow MT safe patching to non-entrant
1380 __ fat_nop();
1381 }
1382
1383 // Generate a new frame for the wrapper.
1384 __ enter();
1385 // -2 because return address is already present and so is saved rbp,
1386 __ subptr(rsp, stack_size - 2*wordSize);
1387
1388 // Frame is now completed as far a size and linkage.
1389
1390 int frame_complete = ((intptr_t)__ pc()) - start;
1391
1392 // Calculate the difference between rsp and rbp,. We need to know it
1393 // after the native call because on windows Java Natives will pop
1394 // the arguments and it is painful to do rsp relative addressing
1395 // in a platform independent way. So after the call we switch to
1396 // rbp, relative addressing.
1397
1398 int fp_adjustment = stack_size - 2*wordSize;
1399
1400 #ifdef COMPILER2
1401 // C2 may leave the stack dirty if not in SSE2+ mode
1402 if (UseSSE >= 2) {
1403 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1404 } else {
1405 __ empty_FPU_stack();
1406 }
1407 #endif /* COMPILER2 */
1408
1409 // Compute the rbp, offset for any slots used after the jni call
1410
1411 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1412 int oop_temp_slot_rbp_offset = (oop_temp_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1413
1414 // We use rdi as a thread pointer because it is callee save and
1415 // if we load it once it is usable thru the entire wrapper
1416 const Register thread = rdi;
1417
1418 // We use rsi as the oop handle for the receiver/klass
1419 // It is callee save so it survives the call to native
1420
1421 const Register oop_handle_reg = rsi;
1422
1423 __ get_thread(thread);
1424
1425
1426 //
1427 // We immediately shuffle the arguments so that any vm call we have to
1428 // make from here on out (sync slow path, jvmti, etc.) we will have
1429 // captured the oops from our caller and have a valid oopMap for
1430 // them.
1431
1432 // -----------------
1433 // The Grand Shuffle
1434 //
1435 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1436 // and, if static, the class mirror instead of a receiver. This pretty much
1437 // guarantees that register layout will not match (and x86 doesn't use reg
1438 // parms though amd does). Since the native abi doesn't use register args
1439 // and the java conventions does we don't have to worry about collisions.
1440 // All of our moved are reg->stack or stack->stack.
1441 // We ignore the extra arguments during the shuffle and handle them at the
1442 // last moment. The shuffle is described by the two calling convention
1443 // vectors we have in our possession. We simply walk the java vector to
1444 // get the source locations and the c vector to get the destinations.
1445
1446 int c_arg = method->is_static() ? 2 : 1 ;
1447
1448 // Record rsp-based slot for receiver on stack for non-static methods
1449 int receiver_offset = -1;
1450
1451 // This is a trick. We double the stack slots so we can claim
1452 // the oops in the caller's frame. Since we are sure to have
1453 // more args than the caller doubling is enough to make
1454 // sure we can capture all the incoming oop args from the
1455 // caller.
1456 //
1457 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1458
1459 // Mark location of rbp,
1460 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1461
1462 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1463 // Are free to temporaries if we have to do stack to steck moves.
1464 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1465
1466 for (i = 0; i < total_in_args ; i++, c_arg++ ) {
1467 switch (in_sig_bt[i]) {
1468 case T_ARRAY:
1469 case T_OBJECT:
1470 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1471 ((i == 0) && (!is_static)),
1472 &receiver_offset);
1473 break;
1474 case T_VOID:
1475 break;
1476
1477 case T_FLOAT:
1478 float_move(masm, in_regs[i], out_regs[c_arg]);
1479 break;
1480
1481 case T_DOUBLE:
1482 assert( i + 1 < total_in_args &&
1483 in_sig_bt[i + 1] == T_VOID &&
1484 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1485 double_move(masm, in_regs[i], out_regs[c_arg]);
1486 break;
1487
1488 case T_LONG :
1489 long_move(masm, in_regs[i], out_regs[c_arg]);
1490 break;
1491
1492 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1493
1494 default:
1495 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1496 }
1497 }
1498
1499 // Pre-load a static method's oop into rsi. Used both by locking code and
1500 // the normal JNI call code.
1501 if (method->is_static()) {
1502
1503 // load opp into a register
1504 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1505
1506 // Now handlize the static class mirror it's known not-null.
1507 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1508 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1509
1510 // Now get the handle
1511 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1512 // store the klass handle as second argument
1513 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1514 }
1515
1516 // Change state to native (we save the return address in the thread, since it might not
1517 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1518 // points into the right code segment. It does not have to be the correct return pc.
1519 // We use the same pc/oopMap repeatedly when we call out
1520
1521 intptr_t the_pc = (intptr_t) __ pc();
1522 oop_maps->add_gc_map(the_pc - start, map);
1523
1524 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1525
1526
1527 // We have all of the arguments setup at this point. We must not touch any register
1528 // argument registers at this point (what if we save/restore them there are no oop?
1529
1530 {
1531 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1532 __ movoop(rax, JNIHandles::make_local(method()));
1533 __ call_VM_leaf(
1534 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1535 thread, rax);
1536 }
1537
1538 // RedefineClasses() tracing support for obsolete method entry
1539 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1540 __ movoop(rax, JNIHandles::make_local(method()));
1541 __ call_VM_leaf(
1542 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1543 thread, rax);
1544 }
1545
1546 // These are register definitions we need for locking/unlocking
1547 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1548 const Register obj_reg = rcx; // Will contain the oop
1549 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1550
1551 Label slow_path_lock;
1552 Label lock_done;
1553
1554 // Lock a synchronized method
1555 if (method->is_synchronized()) {
1556
1557
1558 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1559
1560 // Get the handle (the 2nd argument)
1561 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1562
1563 // Get address of the box
1564
1565 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1566
1567 // Load the oop from the handle
1568 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1569
1570 if (UseBiasedLocking) {
1571 // Note that oop_handle_reg is trashed during this call
1572 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1573 }
1574
1575 // Load immediate 1 into swap_reg %rax,
1576 __ movptr(swap_reg, 1);
1577
1578 // Load (object->mark() | 1) into swap_reg %rax,
1579 __ orptr(swap_reg, Address(obj_reg, 0));
1580
1581 // Save (object->mark() | 1) into BasicLock's displaced header
1582 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1583
1584 if (os::is_MP()) {
1585 __ lock();
1586 }
1587
1588 // src -> dest iff dest == rax, else rax, <- dest
1589 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1590 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1591 __ jcc(Assembler::equal, lock_done);
1592
1593 // Test if the oopMark is an obvious stack pointer, i.e.,
1594 // 1) (mark & 3) == 0, and
1595 // 2) rsp <= mark < mark + os::pagesize()
1596 // These 3 tests can be done by evaluating the following
1597 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1598 // assuming both stack pointer and pagesize have their
1599 // least significant 2 bits clear.
1600 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1601
1602 __ subptr(swap_reg, rsp);
1603 __ andptr(swap_reg, 3 - os::vm_page_size());
1604
1605 // Save the test result, for recursive case, the result is zero
1606 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1607 __ jcc(Assembler::notEqual, slow_path_lock);
1608 // Slow path will re-enter here
1609 __ bind(lock_done);
1610
1611 if (UseBiasedLocking) {
1612 // Re-fetch oop_handle_reg as we trashed it above
1613 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1614 }
1615 }
1616
1617
1618 // Finally just about ready to make the JNI call
1619
1620
1621 // get JNIEnv* which is first argument to native
1622
1623 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1624 __ movptr(Address(rsp, 0), rdx);
1625
1626 // Now set thread in native
1627 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1628
1629 __ call(RuntimeAddress(method->native_function()));
1630
1631 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1632 // arguments off of the stack. We could just re-adjust the stack pointer here
1633 // and continue to do SP relative addressing but we instead switch to FP
1634 // relative addressing.
1635
1636 // Unpack native results.
1637 switch (ret_type) {
1638 case T_BOOLEAN: __ c2bool(rax); break;
1639 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1640 case T_BYTE : __ sign_extend_byte (rax); break;
1641 case T_SHORT : __ sign_extend_short(rax); break;
1642 case T_INT : /* nothing to do */ break;
1643 case T_DOUBLE :
1644 case T_FLOAT :
1645 // Result is in st0 we'll save as needed
1646 break;
1647 case T_ARRAY: // Really a handle
1648 case T_OBJECT: // Really a handle
1649 break; // can't de-handlize until after safepoint check
1650 case T_VOID: break;
1651 case T_LONG: break;
1652 default : ShouldNotReachHere();
1653 }
1654
1655 // Switch thread to "native transition" state before reading the synchronization state.
1656 // This additional state is necessary because reading and testing the synchronization
1657 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1658 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1659 // VM thread changes sync state to synchronizing and suspends threads for GC.
1660 // Thread A is resumed to finish this native method, but doesn't block here since it
1661 // didn't see any synchronization is progress, and escapes.
1662 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1663
1664 if(os::is_MP()) {
1665 if (UseMembar) {
1666 // Force this write out before the read below
1667 __ membar(Assembler::Membar_mask_bits(
1668 Assembler::LoadLoad | Assembler::LoadStore |
1669 Assembler::StoreLoad | Assembler::StoreStore));
1670 } else {
1671 // Write serialization page so VM thread can do a pseudo remote membar.
1672 // We use the current thread pointer to calculate a thread specific
1673 // offset to write to within the page. This minimizes bus traffic
1674 // due to cache line collision.
1675 __ serialize_memory(thread, rcx);
1676 }
1677 }
1678
1679 if (AlwaysRestoreFPU) {
1680 // Make sure the control word is correct.
1681 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
1682 }
1683
1684 // check for safepoint operation in progress and/or pending suspend requests
1685 { Label Continue;
1686
1687 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1688 SafepointSynchronize::_not_synchronized);
1689
1690 Label L;
1691 __ jcc(Assembler::notEqual, L);
1692 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1693 __ jcc(Assembler::equal, Continue);
1694 __ bind(L);
1695
1696 // Don't use call_VM as it will see a possible pending exception and forward it
1697 // and never return here preventing us from clearing _last_native_pc down below.
1698 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1699 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1700 // by hand.
1701 //
1702 save_native_result(masm, ret_type, stack_slots);
1703 __ push(thread);
1704 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1705 JavaThread::check_special_condition_for_native_trans)));
1706 __ increment(rsp, wordSize);
1707 // Restore any method result value
1708 restore_native_result(masm, ret_type, stack_slots);
1709
1710 __ bind(Continue);
1711 }
1712
1713 // change thread state
1714 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1715
1716 Label reguard;
1717 Label reguard_done;
1718 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1719 __ jcc(Assembler::equal, reguard);
1720
1721 // slow path reguard re-enters here
1722 __ bind(reguard_done);
1723
1724 // Handle possible exception (will unlock if necessary)
1725
1726 // native result if any is live
1727
1728 // Unlock
1729 Label slow_path_unlock;
1730 Label unlock_done;
1731 if (method->is_synchronized()) {
1732
1733 Label done;
1734
1735 // Get locked oop from the handle we passed to jni
1736 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1737
1738 if (UseBiasedLocking) {
1739 __ biased_locking_exit(obj_reg, rbx, done);
1740 }
1741
1742 // Simple recursive lock?
1743
1744 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
1745 __ jcc(Assembler::equal, done);
1746
1747 // Must save rax, if if it is live now because cmpxchg must use it
1748 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1749 save_native_result(masm, ret_type, stack_slots);
1750 }
1751
1752 // get old displaced header
1753 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1754
1755 // get address of the stack lock
1756 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1757
1758 // Atomic swap old header if oop still contains the stack lock
1759 if (os::is_MP()) {
1760 __ lock();
1761 }
1762
1763 // src -> dest iff dest == rax, else rax, <- dest
1764 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1765 __ cmpxchgptr(rbx, Address(obj_reg, 0));
1766 __ jcc(Assembler::notEqual, slow_path_unlock);
1767
1768 // slow path re-enters here
1769 __ bind(unlock_done);
1770 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1771 restore_native_result(masm, ret_type, stack_slots);
1772 }
1773
1774 __ bind(done);
1775
1776 }
1777
1778 {
1779 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1780 // Tell dtrace about this method exit
1781 save_native_result(masm, ret_type, stack_slots);
1782 __ movoop(rax, JNIHandles::make_local(method()));
1783 __ call_VM_leaf(
1784 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1785 thread, rax);
1786 restore_native_result(masm, ret_type, stack_slots);
1787 }
1788
1789 // We can finally stop using that last_Java_frame we setup ages ago
1790
1791 __ reset_last_Java_frame(thread, false, true);
1792
1793 // Unpack oop result
1794 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1795 Label L;
1796 __ cmpptr(rax, (int32_t)NULL_WORD);
1797 __ jcc(Assembler::equal, L);
1798 __ movptr(rax, Address(rax, 0));
1799 __ bind(L);
1800 __ verify_oop(rax);
1801 }
1802
1803 // reset handle block
1804 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1805
1806 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
1807
1808 // Any exception pending?
1809 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1810 __ jcc(Assembler::notEqual, exception_pending);
1811
1812
1813 // no exception, we're almost done
1814
1815 // check that only result value is on FPU stack
1816 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1817
1818 // Fixup floating pointer results so that result looks like a return from a compiled method
1819 if (ret_type == T_FLOAT) {
1820 if (UseSSE >= 1) {
1821 // Pop st0 and store as float and reload into xmm register
1822 __ fstp_s(Address(rbp, -4));
1823 __ movflt(xmm0, Address(rbp, -4));
1824 }
1825 } else if (ret_type == T_DOUBLE) {
1826 if (UseSSE >= 2) {
1827 // Pop st0 and store as double and reload into xmm register
1828 __ fstp_d(Address(rbp, -8));
1829 __ movdbl(xmm0, Address(rbp, -8));
1830 }
1831 }
1832
1833 // Return
1834
1835 __ leave();
1836 __ ret(0);
1837
1838 // Unexpected paths are out of line and go here
1839
1840 // Slow path locking & unlocking
1841 if (method->is_synchronized()) {
1842
1843 // BEGIN Slow path lock
1844
1845 __ bind(slow_path_lock);
1846
1847 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1848 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1849 __ push(thread);
1850 __ push(lock_reg);
1851 __ push(obj_reg);
1852 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1853 __ addptr(rsp, 3*wordSize);
1854
1855 #ifdef ASSERT
1856 { Label L;
1857 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1858 __ jcc(Assembler::equal, L);
1859 __ stop("no pending exception allowed on exit from monitorenter");
1860 __ bind(L);
1861 }
1862 #endif
1863 __ jmp(lock_done);
1864
1865 // END Slow path lock
1866
1867 // BEGIN Slow path unlock
1868 __ bind(slow_path_unlock);
1869
1870 // Slow path unlock
1871
1872 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1873 save_native_result(masm, ret_type, stack_slots);
1874 }
1875 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1876
1877 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1878 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1879
1880
1881 // should be a peal
1882 // +wordSize because of the push above
1883 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1884 __ push(rax);
1885
1886 __ push(obj_reg);
1887 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1888 __ addptr(rsp, 2*wordSize);
1889 #ifdef ASSERT
1890 {
1891 Label L;
1892 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1893 __ jcc(Assembler::equal, L);
1894 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1895 __ bind(L);
1896 }
1897 #endif /* ASSERT */
1898
1899 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1900
1901 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1902 restore_native_result(masm, ret_type, stack_slots);
1903 }
1904 __ jmp(unlock_done);
1905 // END Slow path unlock
1906
1907 }
1908
1909 // SLOW PATH Reguard the stack if needed
1910
1911 __ bind(reguard);
1912 save_native_result(masm, ret_type, stack_slots);
1913 {
1914 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1915 }
1916 restore_native_result(masm, ret_type, stack_slots);
1917 __ jmp(reguard_done);
1918
1919
1920 // BEGIN EXCEPTION PROCESSING
1921
1922 // Forward the exception
1923 __ bind(exception_pending);
1924
1925 // remove possible return value from FPU register stack
1926 __ empty_FPU_stack();
1927
1928 // pop our frame
1929 __ leave();
1930 // and forward the exception
1931 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1932
1933 __ flush();
1934
1935 nmethod *nm = nmethod::new_native_nmethod(method,
1936 masm->code(),
1937 vep_offset,
1938 frame_complete,
1939 stack_slots / VMRegImpl::slots_per_word,
1940 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1941 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1942 oop_maps);
1943 return nm;
1944
1945 }
1946
1947 #ifdef HAVE_DTRACE_H
1948 // ---------------------------------------------------------------------------
1949 // Generate a dtrace nmethod for a given signature. The method takes arguments
1950 // in the Java compiled code convention, marshals them to the native
1951 // abi and then leaves nops at the position you would expect to call a native
1952 // function. When the probe is enabled the nops are replaced with a trap
1953 // instruction that dtrace inserts and the trace will cause a notification
1954 // to dtrace.
1955 //
1956 // The probes are only able to take primitive types and java/lang/String as
1957 // arguments. No other java types are allowed. Strings are converted to utf8
1958 // strings so that from dtrace point of view java strings are converted to C
1959 // strings. There is an arbitrary fixed limit on the total space that a method
1960 // can use for converting the strings. (256 chars per string in the signature).
1961 // So any java string larger then this is truncated.
1962
1963 nmethod *SharedRuntime::generate_dtrace_nmethod(
1964 MacroAssembler *masm, methodHandle method) {
1965
1966 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1967 // be single threaded in this method.
1968 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1969
1970 // Fill in the signature array, for the calling-convention call.
1971 int total_args_passed = method->size_of_parameters();
1972
1973 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1974 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1975
1976 // The signature we are going to use for the trap that dtrace will see
1977 // java/lang/String is converted. We drop "this" and any other object
1978 // is converted to NULL. (A one-slot java/lang/Long object reference
1979 // is converted to a two-slot long, which is why we double the allocation).
1980 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1981 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1982
1983 int i=0;
1984 int total_strings = 0;
1985 int first_arg_to_pass = 0;
1986 int total_c_args = 0;
1987
1988 if( !method->is_static() ) { // Pass in receiver first
1989 in_sig_bt[i++] = T_OBJECT;
1990 first_arg_to_pass = 1;
1991 }
1992
1993 // We need to convert the java args to where a native (non-jni) function
1994 // would expect them. To figure out where they go we convert the java
1995 // signature to a C signature.
1996
1997 SignatureStream ss(method->signature());
1998 for ( ; !ss.at_return_type(); ss.next()) {
1999 BasicType bt = ss.type();
2000 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2001 out_sig_bt[total_c_args++] = bt;
2002 if( bt == T_OBJECT) {
2003 symbolOop s = ss.as_symbol_or_null();
2004 if (s == vmSymbols::java_lang_String()) {
2005 total_strings++;
2006 out_sig_bt[total_c_args-1] = T_ADDRESS;
2007 } else if (s == vmSymbols::java_lang_Boolean() ||
2008 s == vmSymbols::java_lang_Character() ||
2009 s == vmSymbols::java_lang_Byte() ||
2010 s == vmSymbols::java_lang_Short() ||
2011 s == vmSymbols::java_lang_Integer() ||
2012 s == vmSymbols::java_lang_Float()) {
2013 out_sig_bt[total_c_args-1] = T_INT;
2014 } else if (s == vmSymbols::java_lang_Long() ||
2015 s == vmSymbols::java_lang_Double()) {
2016 out_sig_bt[total_c_args-1] = T_LONG;
2017 out_sig_bt[total_c_args++] = T_VOID;
2018 }
2019 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2020 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2021 out_sig_bt[total_c_args++] = T_VOID;
2022 }
2023 }
2024
2025 assert(i==total_args_passed, "validly parsed signature");
2026
2027 // Now get the compiled-Java layout as input arguments
2028 int comp_args_on_stack;
2029 comp_args_on_stack = SharedRuntime::java_calling_convention(
2030 in_sig_bt, in_regs, total_args_passed, false);
2031
2032 // Now figure out where the args must be stored and how much stack space
2033 // they require (neglecting out_preserve_stack_slots).
2034
2035 int out_arg_slots;
2036 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2037
2038 // Calculate the total number of stack slots we will need.
2039
2040 // First count the abi requirement plus all of the outgoing args
2041 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2042
2043 // Now space for the string(s) we must convert
2044
2045 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2046 for (i = 0; i < total_strings ; i++) {
2047 string_locs[i] = stack_slots;
2048 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2049 }
2050
2051 // + 2 for return address (which we own) and saved rbp,
2052
2053 stack_slots += 2;
2054
2055 // Ok The space we have allocated will look like:
2056 //
2057 //
2058 // FP-> | |
2059 // |---------------------|
2060 // | string[n] |
2061 // |---------------------| <- string_locs[n]
2062 // | string[n-1] |
2063 // |---------------------| <- string_locs[n-1]
2064 // | ... |
2065 // | ... |
2066 // |---------------------| <- string_locs[1]
2067 // | string[0] |
2068 // |---------------------| <- string_locs[0]
2069 // | outbound memory |
2070 // | based arguments |
2071 // | |
2072 // |---------------------|
2073 // | |
2074 // SP-> | out_preserved_slots |
2075 //
2076 //
2077
2078 // Now compute actual number of stack words we need rounding to make
2079 // stack properly aligned.
2080 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2081
2082 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2083
2084 intptr_t start = (intptr_t)__ pc();
2085
2086 // First thing make an ic check to see if we should even be here
2087
2088 // We are free to use all registers as temps without saving them and
2089 // restoring them except rbp. rbp, is the only callee save register
2090 // as far as the interpreter and the compiler(s) are concerned.
2091
2092 const Register ic_reg = rax;
2093 const Register receiver = rcx;
2094 Label hit;
2095 Label exception_pending;
2096
2097
2098 __ verify_oop(receiver);
2099 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2100 __ jcc(Assembler::equal, hit);
2101
2102 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2103
2104 // verified entry must be aligned for code patching.
2105 // and the first 5 bytes must be in the same cache line
2106 // if we align at 8 then we will be sure 5 bytes are in the same line
2107 __ align(8);
2108
2109 __ bind(hit);
2110
2111 int vep_offset = ((intptr_t)__ pc()) - start;
2112
2113
2114 // The instruction at the verified entry point must be 5 bytes or longer
2115 // because it can be patched on the fly by make_non_entrant. The stack bang
2116 // instruction fits that requirement.
2117
2118 // Generate stack overflow check
2119
2120
2121 if (UseStackBanging) {
2122 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2123 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2124 } else {
2125 __ movl(rax, stack_size);
2126 __ bang_stack_size(rax, rbx);
2127 }
2128 } else {
2129 // need a 5 byte instruction to allow MT safe patching to non-entrant
2130 __ fat_nop();
2131 }
2132
2133 assert(((int)__ pc() - start - vep_offset) >= 5,
2134 "valid size for make_non_entrant");
2135
2136 // Generate a new frame for the wrapper.
2137 __ enter();
2138
2139 // -2 because return address is already present and so is saved rbp,
2140 if (stack_size - 2*wordSize != 0) {
2141 __ subl(rsp, stack_size - 2*wordSize);
2142 }
2143
2144 // Frame is now completed as far a size and linkage.
2145
2146 int frame_complete = ((intptr_t)__ pc()) - start;
2147
2148 // First thing we do store all the args as if we are doing the call.
2149 // Since the C calling convention is stack based that ensures that
2150 // all the Java register args are stored before we need to convert any
2151 // string we might have.
2152
2153 int sid = 0;
2154 int c_arg, j_arg;
2155 int string_reg = 0;
2156
2157 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2158 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2159
2160 VMRegPair src = in_regs[j_arg];
2161 VMRegPair dst = out_regs[c_arg];
2162 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2163 "stack based abi assumed");
2164
2165 switch (in_sig_bt[j_arg]) {
2166
2167 case T_ARRAY:
2168 case T_OBJECT:
2169 if (out_sig_bt[c_arg] == T_ADDRESS) {
2170 // Any register based arg for a java string after the first
2171 // will be destroyed by the call to get_utf so we store
2172 // the original value in the location the utf string address
2173 // will eventually be stored.
2174 if (src.first()->is_reg()) {
2175 if (string_reg++ != 0) {
2176 simple_move32(masm, src, dst);
2177 }
2178 }
2179 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2180 // need to unbox a one-word value
2181 Register in_reg = rax;
2182 if ( src.first()->is_reg() ) {
2183 in_reg = src.first()->as_Register();
2184 } else {
2185 simple_move32(masm, src, in_reg->as_VMReg());
2186 }
2187 Label skipUnbox;
2188 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2189 if ( out_sig_bt[c_arg] == T_LONG ) {
2190 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2191 }
2192 __ testl(in_reg, in_reg);
2193 __ jcc(Assembler::zero, skipUnbox);
2194 assert(dst.first()->is_stack() &&
2195 (!dst.second()->is_valid() || dst.second()->is_stack()),
2196 "value(s) must go into stack slots");
2197
2198 BasicType bt = out_sig_bt[c_arg];
2199 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2200 if ( bt == T_LONG ) {
2201 __ movl(rbx, Address(in_reg,
2202 box_offset + VMRegImpl::stack_slot_size));
2203 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2204 }
2205 __ movl(in_reg, Address(in_reg, box_offset));
2206 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2207 __ bind(skipUnbox);
2208 } else {
2209 // Convert the arg to NULL
2210 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2211 }
2212 if (out_sig_bt[c_arg] == T_LONG) {
2213 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2214 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2215 }
2216 break;
2217
2218 case T_VOID:
2219 break;
2220
2221 case T_FLOAT:
2222 float_move(masm, src, dst);
2223 break;
2224
2225 case T_DOUBLE:
2226 assert( j_arg + 1 < total_args_passed &&
2227 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2228 double_move(masm, src, dst);
2229 break;
2230
2231 case T_LONG :
2232 long_move(masm, src, dst);
2233 break;
2234
2235 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2236
2237 default:
2238 simple_move32(masm, src, dst);
2239 }
2240 }
2241
2242 // Now we must convert any string we have to utf8
2243 //
2244
2245 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2246 sid < total_strings ; j_arg++, c_arg++ ) {
2247
2248 if (out_sig_bt[c_arg] == T_ADDRESS) {
2249
2250 Address utf8_addr = Address(
2251 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2252 __ leal(rax, utf8_addr);
2253
2254 // The first string we find might still be in the original java arg
2255 // register
2256 VMReg orig_loc = in_regs[j_arg].first();
2257 Register string_oop;
2258
2259 // This is where the argument will eventually reside
2260 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2261
2262 if (sid == 1 && orig_loc->is_reg()) {
2263 string_oop = orig_loc->as_Register();
2264 assert(string_oop != rax, "smashed arg");
2265 } else {
2266
2267 if (orig_loc->is_reg()) {
2268 // Get the copy of the jls object
2269 __ movl(rcx, dest);
2270 } else {
2271 // arg is still in the original location
2272 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2273 }
2274 string_oop = rcx;
2275
2276 }
2277 Label nullString;
2278 __ movl(dest, NULL_WORD);
2279 __ testl(string_oop, string_oop);
2280 __ jcc(Assembler::zero, nullString);
2281
2282 // Now we can store the address of the utf string as the argument
2283 __ movl(dest, rax);
2284
2285 // And do the conversion
2286 __ call_VM_leaf(CAST_FROM_FN_PTR(
2287 address, SharedRuntime::get_utf), string_oop, rax);
2288 __ bind(nullString);
2289 }
2290
2291 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2292 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2293 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2294 }
2295 }
2296
2297
2298 // Ok now we are done. Need to place the nop that dtrace wants in order to
2299 // patch in the trap
2300
2301 int patch_offset = ((intptr_t)__ pc()) - start;
2302
2303 __ nop();
2304
2305
2306 // Return
2307
2308 __ leave();
2309 __ ret(0);
2310
2311 __ flush();
2312
2313 nmethod *nm = nmethod::new_dtrace_nmethod(
2314 method, masm->code(), vep_offset, patch_offset, frame_complete,
2315 stack_slots / VMRegImpl::slots_per_word);
2316 return nm;
2317
2318 }
2319
2320 #endif // HAVE_DTRACE_H
2321
2322 // this function returns the adjust size (in number of words) to a c2i adapter
2323 // activation for use during deoptimization
2324 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2325 return (callee_locals - callee_parameters) * Interpreter::stackElementWords();
2326 }
2327
2328
2329 uint SharedRuntime::out_preserve_stack_slots() {
2330 return 0;
2331 }
2332
2333
2334 //------------------------------generate_deopt_blob----------------------------
2335 void SharedRuntime::generate_deopt_blob() {
2336 // allocate space for the code
2337 ResourceMark rm;
2338 // setup code generation tools
2339 CodeBuffer buffer("deopt_blob", 1024, 1024);
2340 MacroAssembler* masm = new MacroAssembler(&buffer);
2341 int frame_size_in_words;
2342 OopMap* map = NULL;
2343 // Account for the extra args we place on the stack
2344 // by the time we call fetch_unroll_info
2345 const int additional_words = 2; // deopt kind, thread
2346
2347 OopMapSet *oop_maps = new OopMapSet();
2348
2349 // -------------
2350 // This code enters when returning to a de-optimized nmethod. A return
2351 // address has been pushed on the the stack, and return values are in
2352 // registers.
2353 // If we are doing a normal deopt then we were called from the patched
2354 // nmethod from the point we returned to the nmethod. So the return
2355 // address on the stack is wrong by NativeCall::instruction_size
2356 // We will adjust the value to it looks like we have the original return
2357 // address on the stack (like when we eagerly deoptimized).
2358 // In the case of an exception pending with deoptimized then we enter
2359 // with a return address on the stack that points after the call we patched
2360 // into the exception handler. We have the following register state:
2361 // rax,: exception
2362 // rbx,: exception handler
2363 // rdx: throwing pc
2364 // So in this case we simply jam rdx into the useless return address and
2365 // the stack looks just like we want.
2366 //
2367 // At this point we need to de-opt. We save the argument return
2368 // registers. We call the first C routine, fetch_unroll_info(). This
2369 // routine captures the return values and returns a structure which
2370 // describes the current frame size and the sizes of all replacement frames.
2371 // The current frame is compiled code and may contain many inlined
2372 // functions, each with their own JVM state. We pop the current frame, then
2373 // push all the new frames. Then we call the C routine unpack_frames() to
2374 // populate these frames. Finally unpack_frames() returns us the new target
2375 // address. Notice that callee-save registers are BLOWN here; they have
2376 // already been captured in the vframeArray at the time the return PC was
2377 // patched.
2378 address start = __ pc();
2379 Label cont;
2380
2381 // Prolog for non exception case!
2382
2383 // Save everything in sight.
2384
2385 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2386 // Normal deoptimization
2387 __ push(Deoptimization::Unpack_deopt);
2388 __ jmp(cont);
2389
2390 int reexecute_offset = __ pc() - start;
2391
2392 // Reexecute case
2393 // return address is the pc describes what bci to do re-execute at
2394
2395 // No need to update map as each call to save_live_registers will produce identical oopmap
2396 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2397
2398 __ push(Deoptimization::Unpack_reexecute);
2399 __ jmp(cont);
2400
2401 int exception_offset = __ pc() - start;
2402
2403 // Prolog for exception case
2404
2405 // all registers are dead at this entry point, except for rax, and
2406 // rdx which contain the exception oop and exception pc
2407 // respectively. Set them in TLS and fall thru to the
2408 // unpack_with_exception_in_tls entry point.
2409
2410 __ get_thread(rdi);
2411 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2412 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2413
2414 int exception_in_tls_offset = __ pc() - start;
2415
2416 // new implementation because exception oop is now passed in JavaThread
2417
2418 // Prolog for exception case
2419 // All registers must be preserved because they might be used by LinearScan
2420 // Exceptiop oop and throwing PC are passed in JavaThread
2421 // tos: stack at point of call to method that threw the exception (i.e. only
2422 // args are on the stack, no return address)
2423
2424 // make room on stack for the return address
2425 // It will be patched later with the throwing pc. The correct value is not
2426 // available now because loading it from memory would destroy registers.
2427 __ push(0);
2428
2429 // Save everything in sight.
2430
2431 // No need to update map as each call to save_live_registers will produce identical oopmap
2432 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2433
2434 // Now it is safe to overwrite any register
2435
2436 // store the correct deoptimization type
2437 __ push(Deoptimization::Unpack_exception);
2438
2439 // load throwing pc from JavaThread and patch it as the return address
2440 // of the current frame. Then clear the field in JavaThread
2441 __ get_thread(rdi);
2442 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2443 __ movptr(Address(rbp, wordSize), rdx);
2444 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2445
2446 #ifdef ASSERT
2447 // verify that there is really an exception oop in JavaThread
2448 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2449 __ verify_oop(rax);
2450
2451 // verify that there is no pending exception
2452 Label no_pending_exception;
2453 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2454 __ testptr(rax, rax);
2455 __ jcc(Assembler::zero, no_pending_exception);
2456 __ stop("must not have pending exception here");
2457 __ bind(no_pending_exception);
2458 #endif
2459
2460 __ bind(cont);
2461
2462 // Compiled code leaves the floating point stack dirty, empty it.
2463 __ empty_FPU_stack();
2464
2465
2466 // Call C code. Need thread and this frame, but NOT official VM entry
2467 // crud. We cannot block on this call, no GC can happen.
2468 __ get_thread(rcx);
2469 __ push(rcx);
2470 // fetch_unroll_info needs to call last_java_frame()
2471 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2472
2473 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2474
2475 // Need to have an oopmap that tells fetch_unroll_info where to
2476 // find any register it might need.
2477
2478 oop_maps->add_gc_map( __ pc()-start, map);
2479
2480 // Discard arg to fetch_unroll_info
2481 __ pop(rcx);
2482
2483 __ get_thread(rcx);
2484 __ reset_last_Java_frame(rcx, false, false);
2485
2486 // Load UnrollBlock into EDI
2487 __ mov(rdi, rax);
2488
2489 // Move the unpack kind to a safe place in the UnrollBlock because
2490 // we are very short of registers
2491
2492 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2493 // retrieve the deopt kind from where we left it.
2494 __ pop(rax);
2495 __ movl(unpack_kind, rax); // save the unpack_kind value
2496
2497 Label noException;
2498 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2499 __ jcc(Assembler::notEqual, noException);
2500 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2501 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2502 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2503 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2504
2505 __ verify_oop(rax);
2506
2507 // Overwrite the result registers with the exception results.
2508 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2509 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2510
2511 __ bind(noException);
2512
2513 // Stack is back to only having register save data on the stack.
2514 // Now restore the result registers. Everything else is either dead or captured
2515 // in the vframeArray.
2516
2517 RegisterSaver::restore_result_registers(masm);
2518
2519 // Non standard control word may be leaked out through a safepoint blob, and we can
2520 // deopt at a poll point with the non standard control word. However, we should make
2521 // sure the control word is correct after restore_result_registers.
2522 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2523
2524 // All of the register save area has been popped of the stack. Only the
2525 // return address remains.
2526
2527 // Pop all the frames we must move/replace.
2528 //
2529 // Frame picture (youngest to oldest)
2530 // 1: self-frame (no frame link)
2531 // 2: deopting frame (no frame link)
2532 // 3: caller of deopting frame (could be compiled/interpreted).
2533 //
2534 // Note: by leaving the return address of self-frame on the stack
2535 // and using the size of frame 2 to adjust the stack
2536 // when we are done the return to frame 3 will still be on the stack.
2537
2538 // Pop deoptimized frame
2539 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2540
2541 // sp should be pointing at the return address to the caller (3)
2542
2543 // Stack bang to make sure there's enough room for these interpreter frames.
2544 if (UseStackBanging) {
2545 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2546 __ bang_stack_size(rbx, rcx);
2547 }
2548
2549 // Load array of frame pcs into ECX
2550 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2551
2552 __ pop(rsi); // trash the old pc
2553
2554 // Load array of frame sizes into ESI
2555 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2556
2557 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2558
2559 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2560 __ movl(counter, rbx);
2561
2562 // Pick up the initial fp we should save
2563 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2564
2565 // Now adjust the caller's stack to make up for the extra locals
2566 // but record the original sp so that we can save it in the skeletal interpreter
2567 // frame and the stack walking of interpreter_sender will get the unextended sp
2568 // value and not the "real" sp value.
2569
2570 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2571 __ movptr(sp_temp, rsp);
2572 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2573 __ subptr(rsp, rbx);
2574
2575 // Push interpreter frames in a loop
2576 Label loop;
2577 __ bind(loop);
2578 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2579 #ifdef CC_INTERP
2580 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2581 #ifdef ASSERT
2582 __ push(0xDEADDEAD); // Make a recognizable pattern
2583 __ push(0xDEADDEAD);
2584 #else /* ASSERT */
2585 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2586 #endif /* ASSERT */
2587 #else /* CC_INTERP */
2588 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2589 #endif /* CC_INTERP */
2590 __ pushptr(Address(rcx, 0)); // save return address
2591 __ enter(); // save old & set new rbp,
2592 __ subptr(rsp, rbx); // Prolog!
2593 __ movptr(rbx, sp_temp); // sender's sp
2594 #ifdef CC_INTERP
2595 __ movptr(Address(rbp,
2596 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2597 rbx); // Make it walkable
2598 #else /* CC_INTERP */
2599 // This value is corrected by layout_activation_impl
2600 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2601 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2602 #endif /* CC_INTERP */
2603 __ movptr(sp_temp, rsp); // pass to next frame
2604 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2605 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2606 __ decrementl(counter); // decrement counter
2607 __ jcc(Assembler::notZero, loop);
2608 __ pushptr(Address(rcx, 0)); // save final return address
2609
2610 // Re-push self-frame
2611 __ enter(); // save old & set new rbp,
2612
2613 // Return address and rbp, are in place
2614 // We'll push additional args later. Just allocate a full sized
2615 // register save area
2616 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2617
2618 // Restore frame locals after moving the frame
2619 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2620 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2621 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2622 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2623 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2624
2625 // Set up the args to unpack_frame
2626
2627 __ pushl(unpack_kind); // get the unpack_kind value
2628 __ get_thread(rcx);
2629 __ push(rcx);
2630
2631 // set last_Java_sp, last_Java_fp
2632 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2633
2634 // Call C code. Need thread but NOT official VM entry
2635 // crud. We cannot block on this call, no GC can happen. Call should
2636 // restore return values to their stack-slots with the new SP.
2637 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2638 // Set an oopmap for the call site
2639 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2640
2641 // rax, contains the return result type
2642 __ push(rax);
2643
2644 __ get_thread(rcx);
2645 __ reset_last_Java_frame(rcx, false, false);
2646
2647 // Collect return values
2648 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2649 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2650
2651 // Clear floating point stack before returning to interpreter
2652 __ empty_FPU_stack();
2653
2654 // Check if we should push the float or double return value.
2655 Label results_done, yes_double_value;
2656 __ cmpl(Address(rsp, 0), T_DOUBLE);
2657 __ jcc (Assembler::zero, yes_double_value);
2658 __ cmpl(Address(rsp, 0), T_FLOAT);
2659 __ jcc (Assembler::notZero, results_done);
2660
2661 // return float value as expected by interpreter
2662 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2663 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2664 __ jmp(results_done);
2665
2666 // return double value as expected by interpreter
2667 __ bind(yes_double_value);
2668 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2669 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2670
2671 __ bind(results_done);
2672
2673 // Pop self-frame.
2674 __ leave(); // Epilog!
2675
2676 // Jump to interpreter
2677 __ ret(0);
2678
2679 // -------------
2680 // make sure all code is generated
2681 masm->flush();
2682
2683 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2684 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2685 }
2686
2687
2688 #ifdef COMPILER2
2689 //------------------------------generate_uncommon_trap_blob--------------------
2690 void SharedRuntime::generate_uncommon_trap_blob() {
2691 // allocate space for the code
2692 ResourceMark rm;
2693 // setup code generation tools
2694 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2695 MacroAssembler* masm = new MacroAssembler(&buffer);
2696
2697 enum frame_layout {
2698 arg0_off, // thread sp + 0 // Arg location for
2699 arg1_off, // unloaded_class_index sp + 1 // calling C
2700 // The frame sender code expects that rbp will be in the "natural" place and
2701 // will override any oopMap setting for it. We must therefore force the layout
2702 // so that it agrees with the frame sender code.
2703 rbp_off, // callee saved register sp + 2
2704 return_off, // slot for return address sp + 3
2705 framesize
2706 };
2707
2708 address start = __ pc();
2709 // Push self-frame.
2710 __ subptr(rsp, return_off*wordSize); // Epilog!
2711
2712 // rbp, is an implicitly saved callee saved register (i.e. the calling
2713 // convention will save restore it in prolog/epilog) Other than that
2714 // there are no callee save registers no that adapter frames are gone.
2715 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2716
2717 // Clear the floating point exception stack
2718 __ empty_FPU_stack();
2719
2720 // set last_Java_sp
2721 __ get_thread(rdx);
2722 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2723
2724 // Call C code. Need thread but NOT official VM entry
2725 // crud. We cannot block on this call, no GC can happen. Call should
2726 // capture callee-saved registers as well as return values.
2727 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2728 // argument already in ECX
2729 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2730 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2731
2732 // Set an oopmap for the call site
2733 OopMapSet *oop_maps = new OopMapSet();
2734 OopMap* map = new OopMap( framesize, 0 );
2735 // No oopMap for rbp, it is known implicitly
2736
2737 oop_maps->add_gc_map( __ pc()-start, map);
2738
2739 __ get_thread(rcx);
2740
2741 __ reset_last_Java_frame(rcx, false, false);
2742
2743 // Load UnrollBlock into EDI
2744 __ movptr(rdi, rax);
2745
2746 // Pop all the frames we must move/replace.
2747 //
2748 // Frame picture (youngest to oldest)
2749 // 1: self-frame (no frame link)
2750 // 2: deopting frame (no frame link)
2751 // 3: caller of deopting frame (could be compiled/interpreted).
2752
2753 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2754 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2755
2756 // Pop deoptimized frame
2757 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2758 __ addptr(rsp, rcx);
2759
2760 // sp should be pointing at the return address to the caller (3)
2761
2762 // Stack bang to make sure there's enough room for these interpreter frames.
2763 if (UseStackBanging) {
2764 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2765 __ bang_stack_size(rbx, rcx);
2766 }
2767
2768
2769 // Load array of frame pcs into ECX
2770 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2771
2772 __ pop(rsi); // trash the pc
2773
2774 // Load array of frame sizes into ESI
2775 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2776
2777 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2778
2779 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2780 __ movl(counter, rbx);
2781
2782 // Pick up the initial fp we should save
2783 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2784
2785 // Now adjust the caller's stack to make up for the extra locals
2786 // but record the original sp so that we can save it in the skeletal interpreter
2787 // frame and the stack walking of interpreter_sender will get the unextended sp
2788 // value and not the "real" sp value.
2789
2790 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2791 __ movptr(sp_temp, rsp);
2792 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2793 __ subptr(rsp, rbx);
2794
2795 // Push interpreter frames in a loop
2796 Label loop;
2797 __ bind(loop);
2798 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2799 #ifdef CC_INTERP
2800 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2801 #ifdef ASSERT
2802 __ push(0xDEADDEAD); // Make a recognizable pattern
2803 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
2804 #else /* ASSERT */
2805 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2806 #endif /* ASSERT */
2807 #else /* CC_INTERP */
2808 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2809 #endif /* CC_INTERP */
2810 __ pushptr(Address(rcx, 0)); // save return address
2811 __ enter(); // save old & set new rbp,
2812 __ subptr(rsp, rbx); // Prolog!
2813 __ movptr(rbx, sp_temp); // sender's sp
2814 #ifdef CC_INTERP
2815 __ movptr(Address(rbp,
2816 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2817 rbx); // Make it walkable
2818 #else /* CC_INTERP */
2819 // This value is corrected by layout_activation_impl
2820 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2821 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2822 #endif /* CC_INTERP */
2823 __ movptr(sp_temp, rsp); // pass to next frame
2824 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2825 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2826 __ decrementl(counter); // decrement counter
2827 __ jcc(Assembler::notZero, loop);
2828 __ pushptr(Address(rcx, 0)); // save final return address
2829
2830 // Re-push self-frame
2831 __ enter(); // save old & set new rbp,
2832 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2833
2834
2835 // set last_Java_sp, last_Java_fp
2836 __ get_thread(rdi);
2837 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2838
2839 // Call C code. Need thread but NOT official VM entry
2840 // crud. We cannot block on this call, no GC can happen. Call should
2841 // restore return values to their stack-slots with the new SP.
2842 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2843 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2844 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2845 // Set an oopmap for the call site
2846 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2847
2848 __ get_thread(rdi);
2849 __ reset_last_Java_frame(rdi, true, false);
2850
2851 // Pop self-frame.
2852 __ leave(); // Epilog!
2853
2854 // Jump to interpreter
2855 __ ret(0);
2856
2857 // -------------
2858 // make sure all code is generated
2859 masm->flush();
2860
2861 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2862 }
2863 #endif // COMPILER2
2864
2865 //------------------------------generate_handler_blob------
2866 //
2867 // Generate a special Compile2Runtime blob that saves all registers,
2868 // setup oopmap, and calls safepoint code to stop the compiled code for
2869 // a safepoint.
2870 //
2871 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
2872
2873 // Account for thread arg in our frame
2874 const int additional_words = 1;
2875 int frame_size_in_words;
2876
2877 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2878
2879 ResourceMark rm;
2880 OopMapSet *oop_maps = new OopMapSet();
2881 OopMap* map;
2882
2883 // allocate space for the code
2884 // setup code generation tools
2885 CodeBuffer buffer("handler_blob", 1024, 512);
2886 MacroAssembler* masm = new MacroAssembler(&buffer);
2887
2888 const Register java_thread = rdi; // callee-saved for VC++
2889 address start = __ pc();
2890 address call_pc = NULL;
2891
2892 // If cause_return is true we are at a poll_return and there is
2893 // the return address on the stack to the caller on the nmethod
2894 // that is safepoint. We can leave this return on the stack and
2895 // effectively complete the return and safepoint in the caller.
2896 // Otherwise we push space for a return address that the safepoint
2897 // handler will install later to make the stack walking sensible.
2898 if( !cause_return )
2899 __ push(rbx); // Make room for return address (or push it again)
2900
2901 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2902
2903 // The following is basically a call_VM. However, we need the precise
2904 // address of the call in order to generate an oopmap. Hence, we do all the
2905 // work ourselves.
2906
2907 // Push thread argument and setup last_Java_sp
2908 __ get_thread(java_thread);
2909 __ push(java_thread);
2910 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2911
2912 // if this was not a poll_return then we need to correct the return address now.
2913 if( !cause_return ) {
2914 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2915 __ movptr(Address(rbp, wordSize), rax);
2916 }
2917
2918 // do the call
2919 __ call(RuntimeAddress(call_ptr));
2920
2921 // Set an oopmap for the call site. This oopmap will map all
2922 // oop-registers and debug-info registers as callee-saved. This
2923 // will allow deoptimization at this safepoint to find all possible
2924 // debug-info recordings, as well as let GC find all oops.
2925
2926 oop_maps->add_gc_map( __ pc() - start, map);
2927
2928 // Discard arg
2929 __ pop(rcx);
2930
2931 Label noException;
2932
2933 // Clear last_Java_sp again
2934 __ get_thread(java_thread);
2935 __ reset_last_Java_frame(java_thread, false, false);
2936
2937 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2938 __ jcc(Assembler::equal, noException);
2939
2940 // Exception pending
2941
2942 RegisterSaver::restore_live_registers(masm);
2943
2944 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2945
2946 __ bind(noException);
2947
2948 // Normal exit, register restoring and exit
2949 RegisterSaver::restore_live_registers(masm);
2950
2951 __ ret(0);
2952
2953 // make sure all code is generated
2954 masm->flush();
2955
2956 // Fill-out other meta info
2957 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2958 }
2959
2960 //
2961 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2962 //
2963 // Generate a stub that calls into vm to find out the proper destination
2964 // of a java call. All the argument registers are live at this point
2965 // but since this is generic code we don't know what they are and the caller
2966 // must do any gc of the args.
2967 //
2968 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
2969 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2970
2971 // allocate space for the code
2972 ResourceMark rm;
2973
2974 CodeBuffer buffer(name, 1000, 512);
2975 MacroAssembler* masm = new MacroAssembler(&buffer);
2976
2977 int frame_size_words;
2978 enum frame_layout {
2979 thread_off,
2980 extra_words };
2981
2982 OopMapSet *oop_maps = new OopMapSet();
2983 OopMap* map = NULL;
2984
2985 int start = __ offset();
2986
2987 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2988
2989 int frame_complete = __ offset();
2990
2991 const Register thread = rdi;
2992 __ get_thread(rdi);
2993
2994 __ push(thread);
2995 __ set_last_Java_frame(thread, noreg, rbp, NULL);
2996
2997 __ call(RuntimeAddress(destination));
2998
2999
3000 // Set an oopmap for the call site.
3001 // We need this not only for callee-saved registers, but also for volatile
3002 // registers that the compiler might be keeping live across a safepoint.
3003
3004 oop_maps->add_gc_map( __ offset() - start, map);
3005
3006 // rax, contains the address we are going to jump to assuming no exception got installed
3007
3008 __ addptr(rsp, wordSize);
3009
3010 // clear last_Java_sp
3011 __ reset_last_Java_frame(thread, true, false);
3012 // check for pending exceptions
3013 Label pending;
3014 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3015 __ jcc(Assembler::notEqual, pending);
3016
3017 // get the returned methodOop
3018 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
3019 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3020
3021 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3022
3023 RegisterSaver::restore_live_registers(masm);
3024
3025 // We are back the the original state on entry and ready to go.
3026
3027 __ jmp(rax);
3028
3029 // Pending exception after the safepoint
3030
3031 __ bind(pending);
3032
3033 RegisterSaver::restore_live_registers(masm);
3034
3035 // exception pending => remove activation and forward to exception handler
3036
3037 __ get_thread(thread);
3038 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3039 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3040 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3041
3042 // -------------
3043 // make sure all code is generated
3044 masm->flush();
3045
3046 // return the blob
3047 // frame_size_words or bytes??
3048 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3049 }
3050
3051 void SharedRuntime::generate_stubs() {
3052
3053 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
3054 "wrong_method_stub");
3055
3056 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
3057 "ic_miss_stub");
3058
3059 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
3060 "resolve_opt_virtual_call");
3061
3062 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
3063 "resolve_virtual_call");
3064
3065 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
3066 "resolve_static_call");
3067
3068 _polling_page_safepoint_handler_blob =
3069 generate_handler_blob(CAST_FROM_FN_PTR(address,
3070 SafepointSynchronize::handle_polling_page_exception), false);
3071
3072 _polling_page_return_handler_blob =
3073 generate_handler_blob(CAST_FROM_FN_PTR(address,
3074 SafepointSynchronize::handle_polling_page_exception), true);
3075
3076 generate_deopt_blob();
3077 #ifdef COMPILER2
3078 generate_uncommon_trap_blob();
3079 #endif // COMPILER2
3080 }