1 /*
2 * Copyright 1998-2010 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_output.cpp.incl"
27
28 extern uint size_java_to_interp();
29 extern uint reloc_java_to_interp();
30 extern uint size_exception_handler();
31 extern uint size_deopt_handler();
32
33 #ifndef PRODUCT
34 #define DEBUG_ARG(x) , x
35 #else
36 #define DEBUG_ARG(x)
37 #endif
38
39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 extern int emit_deopt_handler(CodeBuffer &cbuf);
41
42 //------------------------------Output-----------------------------------------
43 // Convert Nodes to instruction bits and pass off to the VM
44 void Compile::Output() {
45 // RootNode goes
46 assert( _cfg->_broot->_nodes.size() == 0, "" );
47
48 // Initialize the space for the BufferBlob used to find and verify
49 // instruction size in MachNode::emit_size()
50 init_scratch_buffer_blob();
51 if (failing()) return; // Out of memory
52
53 // The number of new nodes (mostly MachNop) is proportional to
54 // the number of java calls and inner loops which are aligned.
55 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
56 C->inner_loops()*(OptoLoopAlignment-1)),
57 "out of nodes before code generation" ) ) {
58 return;
59 }
60 // Make sure I can find the Start Node
61 Block_Array& bbs = _cfg->_bbs;
62 Block *entry = _cfg->_blocks[1];
63 Block *broot = _cfg->_broot;
64
65 const StartNode *start = entry->_nodes[0]->as_Start();
66
67 // Replace StartNode with prolog
68 MachPrologNode *prolog = new (this) MachPrologNode();
69 entry->_nodes.map( 0, prolog );
70 bbs.map( prolog->_idx, entry );
71 bbs.map( start->_idx, NULL ); // start is no longer in any block
72
73 // Virtual methods need an unverified entry point
74
75 if( is_osr_compilation() ) {
76 if( PoisonOSREntry ) {
77 // TODO: Should use a ShouldNotReachHereNode...
78 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
79 }
80 } else {
81 if( _method && !_method->flags().is_static() ) {
82 // Insert unvalidated entry point
83 _cfg->insert( broot, 0, new (this) MachUEPNode() );
84 }
85
86 }
87
88
89 // Break before main entry point
90 if( (_method && _method->break_at_execute())
91 #ifndef PRODUCT
92 ||(OptoBreakpoint && is_method_compilation())
93 ||(OptoBreakpointOSR && is_osr_compilation())
94 ||(OptoBreakpointC2R && !_method)
95 #endif
96 ) {
97 // checking for _method means that OptoBreakpoint does not apply to
98 // runtime stubs or frame converters
99 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
100 }
101
102 // Insert epilogs before every return
103 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
104 Block *b = _cfg->_blocks[i];
105 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
106 Node *m = b->end();
107 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
108 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
109 b->add_inst( epilog );
110 bbs.map(epilog->_idx, b);
111 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
112 }
113 }
114 }
115
116 # ifdef ENABLE_ZAP_DEAD_LOCALS
117 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
118 # endif
119
120 ScheduleAndBundle();
121
122 #ifndef PRODUCT
123 if (trace_opto_output()) {
124 tty->print("\n---- After ScheduleAndBundle ----\n");
125 for (uint i = 0; i < _cfg->_num_blocks; i++) {
126 tty->print("\nBB#%03d:\n", i);
127 Block *bb = _cfg->_blocks[i];
128 for (uint j = 0; j < bb->_nodes.size(); j++) {
129 Node *n = bb->_nodes[j];
130 OptoReg::Name reg = _regalloc->get_reg_first(n);
131 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
132 n->dump();
133 }
134 }
135 }
136 #endif
137
138 if (failing()) return;
139
140 BuildOopMaps();
141
142 if (failing()) return;
143
144 Fill_buffer();
145 }
146
147 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
148 // Determine if we need to generate a stack overflow check.
149 // Do it if the method is not a stub function and
150 // has java calls or has frame size > vm_page_size/8.
151 return (stub_function() == NULL &&
152 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
153 }
154
155 bool Compile::need_register_stack_bang() const {
156 // Determine if we need to generate a register stack overflow check.
157 // This is only used on architectures which have split register
158 // and memory stacks (ie. IA64).
159 // Bang if the method is not a stub function and has java calls
160 return (stub_function() == NULL && has_java_calls());
161 }
162
163 # ifdef ENABLE_ZAP_DEAD_LOCALS
164
165
166 // In order to catch compiler oop-map bugs, we have implemented
167 // a debugging mode called ZapDeadCompilerLocals.
168 // This mode causes the compiler to insert a call to a runtime routine,
169 // "zap_dead_locals", right before each place in compiled code
170 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
171 // The runtime routine checks that locations mapped as oops are really
172 // oops, that locations mapped as values do not look like oops,
173 // and that locations mapped as dead are not used later
174 // (by zapping them to an invalid address).
175
176 int Compile::_CompiledZap_count = 0;
177
178 void Compile::Insert_zap_nodes() {
179 bool skip = false;
180
181
182 // Dink with static counts because code code without the extra
183 // runtime calls is MUCH faster for debugging purposes
184
185 if ( CompileZapFirst == 0 ) ; // nothing special
186 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
187 else if ( CompileZapFirst == CompiledZap_count() )
188 warning("starting zap compilation after skipping");
189
190 if ( CompileZapLast == -1 ) ; // nothing special
191 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
192 else if ( CompileZapLast == CompiledZap_count() )
193 warning("about to compile last zap");
194
195 ++_CompiledZap_count; // counts skipped zaps, too
196
197 if ( skip ) return;
198
199
200 if ( _method == NULL )
201 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
202
203 // Insert call to zap runtime stub before every node with an oop map
204 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
205 Block *b = _cfg->_blocks[i];
206 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
207 Node *n = b->_nodes[j];
208
209 // Determining if we should insert a zap-a-lot node in output.
210 // We do that for all nodes that has oopmap info, except for calls
211 // to allocation. Calls to allocation passes in the old top-of-eden pointer
212 // and expect the C code to reset it. Hence, there can be no safepoints between
213 // the inlined-allocation and the call to new_Java, etc.
214 // We also cannot zap monitor calls, as they must hold the microlock
215 // during the call to Zap, which also wants to grab the microlock.
216 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
217 if ( insert ) { // it is MachSafePoint
218 if ( !n->is_MachCall() ) {
219 insert = false;
220 } else if ( n->is_MachCall() ) {
221 MachCallNode* call = n->as_MachCall();
222 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
223 call->entry_point() == OptoRuntime::new_array_Java() ||
224 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
225 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
226 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
227 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
228 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
229 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
230 ) {
231 insert = false;
232 }
233 }
234 if (insert) {
235 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
236 b->_nodes.insert( j, zap );
237 _cfg->_bbs.map( zap->_idx, b );
238 ++j;
239 }
240 }
241 }
242 }
243 }
244
245
246 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
247 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
248 CallStaticJavaNode* ideal_node =
249 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
250 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
251 "call zap dead locals stub", 0, TypePtr::BOTTOM);
252 // We need to copy the OopMap from the site we're zapping at.
253 // We have to make a copy, because the zap site might not be
254 // a call site, and zap_dead is a call site.
255 OopMap* clone = node_to_check->oop_map()->deep_copy();
256
257 // Add the cloned OopMap to the zap node
258 ideal_node->set_oop_map(clone);
259 return _matcher->match_sfpt(ideal_node);
260 }
261
262 //------------------------------is_node_getting_a_safepoint--------------------
263 bool Compile::is_node_getting_a_safepoint( Node* n) {
264 // This code duplicates the logic prior to the call of add_safepoint
265 // below in this file.
266 if( n->is_MachSafePoint() ) return true;
267 return false;
268 }
269
270 # endif // ENABLE_ZAP_DEAD_LOCALS
271
272 //------------------------------compute_loop_first_inst_sizes------------------
273 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top
274 // of a loop. When aligning a loop we need to provide enough instructions
275 // in cpu's fetch buffer to feed decoders. The loop alignment could be
276 // avoided if we have enough instructions in fetch buffer at the head of a loop.
277 // By default, the size is set to 999999 by Block's constructor so that
278 // a loop will be aligned if the size is not reset here.
279 //
280 // Note: Mach instructions could contain several HW instructions
281 // so the size is estimated only.
282 //
283 void Compile::compute_loop_first_inst_sizes() {
284 // The next condition is used to gate the loop alignment optimization.
285 // Don't aligned a loop if there are enough instructions at the head of a loop
286 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
287 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
288 // equal to 11 bytes which is the largest address NOP instruction.
289 if( MaxLoopPad < OptoLoopAlignment-1 ) {
290 uint last_block = _cfg->_num_blocks-1;
291 for( uint i=1; i <= last_block; i++ ) {
292 Block *b = _cfg->_blocks[i];
293 // Check the first loop's block which requires an alignment.
294 if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) {
295 uint sum_size = 0;
296 uint inst_cnt = NumberOfLoopInstrToAlign;
297 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
298
299 // Check subsequent fallthrough blocks if the loop's first
300 // block(s) does not have enough instructions.
301 Block *nb = b;
302 while( inst_cnt > 0 &&
303 i < last_block &&
304 !_cfg->_blocks[i+1]->has_loop_alignment() &&
305 !nb->has_successor(b) ) {
306 i++;
307 nb = _cfg->_blocks[i];
308 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
309 } // while( inst_cnt > 0 && i < last_block )
310
311 b->set_first_inst_size(sum_size);
312 } // f( b->head()->is_Loop() )
313 } // for( i <= last_block )
314 } // if( MaxLoopPad < OptoLoopAlignment-1 )
315 }
316
317 //----------------------Shorten_branches---------------------------------------
318 // The architecture description provides short branch variants for some long
319 // branch instructions. Replace eligible long branches with short branches.
320 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
321
322 // fill in the nop array for bundling computations
323 MachNode *_nop_list[Bundle::_nop_count];
324 Bundle::initialize_nops(_nop_list, this);
325
326 // ------------------
327 // Compute size of each block, method size, and relocation information size
328 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
329 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
330 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
331 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
332 blk_starts[0] = 0;
333
334 // Initialize the sizes to 0
335 code_size = 0; // Size in bytes of generated code
336 stub_size = 0; // Size in bytes of all stub entries
337 // Size in bytes of all relocation entries, including those in local stubs.
338 // Start with 2-bytes of reloc info for the unvalidated entry point
339 reloc_size = 1; // Number of relocation entries
340 const_size = 0; // size of fp constants in words
341
342 // Make three passes. The first computes pessimistic blk_starts,
343 // relative jmp_end, reloc_size and const_size information.
344 // The second performs short branch substitution using the pessimistic
345 // sizing. The third inserts nops where needed.
346
347 Node *nj; // tmp
348
349 // Step one, perform a pessimistic sizing pass.
350 uint i;
351 uint min_offset_from_last_call = 1; // init to a positive value
352 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
353 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
354 Block *b = _cfg->_blocks[i];
355
356 // Sum all instruction sizes to compute block size
357 uint last_inst = b->_nodes.size();
358 uint blk_size = 0;
359 for( uint j = 0; j<last_inst; j++ ) {
360 nj = b->_nodes[j];
361 uint inst_size = nj->size(_regalloc);
362 blk_size += inst_size;
363 // Handle machine instruction nodes
364 if( nj->is_Mach() ) {
365 MachNode *mach = nj->as_Mach();
366 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
367 reloc_size += mach->reloc();
368 const_size += mach->const_size();
369 if( mach->is_MachCall() ) {
370 MachCallNode *mcall = mach->as_MachCall();
371 // This destination address is NOT PC-relative
372
373 mcall->method_set((intptr_t)mcall->entry_point());
374
375 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
376 stub_size += size_java_to_interp();
377 reloc_size += reloc_java_to_interp();
378 }
379 } else if (mach->is_MachSafePoint()) {
380 // If call/safepoint are adjacent, account for possible
381 // nop to disambiguate the two safepoints.
382 if (min_offset_from_last_call == 0) {
383 blk_size += nop_size;
384 }
385 }
386 }
387 min_offset_from_last_call += inst_size;
388 // Remember end of call offset
389 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
390 min_offset_from_last_call = 0;
391 }
392 }
393
394 // During short branch replacement, we store the relative (to blk_starts)
395 // end of jump in jmp_end, rather than the absolute end of jump. This
396 // is so that we do not need to recompute sizes of all nodes when we compute
397 // correct blk_starts in our next sizing pass.
398 jmp_end[i] = blk_size;
399 DEBUG_ONLY( jmp_target[i] = 0; )
400
401 // When the next block starts a loop, we may insert pad NOP
402 // instructions. Since we cannot know our future alignment,
403 // assume the worst.
404 if( i<_cfg->_num_blocks-1 ) {
405 Block *nb = _cfg->_blocks[i+1];
406 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
407 if( max_loop_pad > 0 ) {
408 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
409 blk_size += max_loop_pad;
410 }
411 }
412
413 // Save block size; update total method size
414 blk_starts[i+1] = blk_starts[i]+blk_size;
415 }
416
417 // Step two, replace eligible long jumps.
418
419 // Note: this will only get the long branches within short branch
420 // range. Another pass might detect more branches that became
421 // candidates because the shortening in the first pass exposed
422 // more opportunities. Unfortunately, this would require
423 // recomputing the starting and ending positions for the blocks
424 for( i=0; i<_cfg->_num_blocks; i++ ) {
425 Block *b = _cfg->_blocks[i];
426
427 int j;
428 // Find the branch; ignore trailing NOPs.
429 for( j = b->_nodes.size()-1; j>=0; j-- ) {
430 nj = b->_nodes[j];
431 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
432 break;
433 }
434
435 if (j >= 0) {
436 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
437 MachNode *mach = nj->as_Mach();
438 // This requires the TRUE branch target be in succs[0]
439 uint bnum = b->non_connector_successor(0)->_pre_order;
440 uintptr_t target = blk_starts[bnum];
441 if( mach->is_pc_relative() ) {
442 int offset = target-(blk_starts[i] + jmp_end[i]);
443 if (_matcher->is_short_branch_offset(mach->rule(), offset)) {
444 // We've got a winner. Replace this branch.
445 MachNode* replacement = mach->short_branch_version(this);
446 b->_nodes.map(j, replacement);
447 mach->subsume_by(replacement);
448
449 // Update the jmp_end size to save time in our
450 // next pass.
451 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
452 DEBUG_ONLY( jmp_target[i] = bnum; );
453 DEBUG_ONLY( jmp_rule[i] = mach->rule(); );
454 }
455 } else {
456 #ifndef PRODUCT
457 mach->dump(3);
458 #endif
459 Unimplemented();
460 }
461 }
462 }
463 }
464
465 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
466 // of a loop. It is used to determine the padding for loop alignment.
467 compute_loop_first_inst_sizes();
468
469 // Step 3, compute the offsets of all the labels
470 uint last_call_adr = max_uint;
471 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
472 // copy the offset of the beginning to the corresponding label
473 assert(labels[i].is_unused(), "cannot patch at this point");
474 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
475
476 // insert padding for any instructions that need it
477 Block *b = _cfg->_blocks[i];
478 uint last_inst = b->_nodes.size();
479 uint adr = blk_starts[i];
480 for( uint j = 0; j<last_inst; j++ ) {
481 nj = b->_nodes[j];
482 if( nj->is_Mach() ) {
483 int padding = nj->as_Mach()->compute_padding(adr);
484 // If call/safepoint are adjacent insert a nop (5010568)
485 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
486 adr == last_call_adr ) {
487 padding = nop_size;
488 }
489 if(padding > 0) {
490 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
491 int nops_cnt = padding / nop_size;
492 MachNode *nop = new (this) MachNopNode(nops_cnt);
493 b->_nodes.insert(j++, nop);
494 _cfg->_bbs.map( nop->_idx, b );
495 adr += padding;
496 last_inst++;
497 }
498 }
499 adr += nj->size(_regalloc);
500
501 // Remember end of call offset
502 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
503 last_call_adr = adr;
504 }
505 }
506
507 if ( i != _cfg->_num_blocks-1) {
508 // Get the size of the block
509 uint blk_size = adr - blk_starts[i];
510
511 // When the next block is the top of a loop, we may insert pad NOP
512 // instructions.
513 Block *nb = _cfg->_blocks[i+1];
514 int current_offset = blk_starts[i] + blk_size;
515 current_offset += nb->alignment_padding(current_offset);
516 // Save block size; update total method size
517 blk_starts[i+1] = current_offset;
518 }
519 }
520
521 #ifdef ASSERT
522 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
523 if( jmp_target[i] != 0 ) {
524 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
525 if (!_matcher->is_short_branch_offset(jmp_rule[i], offset)) {
526 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
527 }
528 assert(_matcher->is_short_branch_offset(jmp_rule[i], offset), "Displacement too large for short jmp");
529 }
530 }
531 #endif
532
533 // ------------------
534 // Compute size for code buffer
535 code_size = blk_starts[i-1] + jmp_end[i-1];
536
537 // Relocation records
538 reloc_size += 1; // Relo entry for exception handler
539
540 // Adjust reloc_size to number of record of relocation info
541 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
542 // a relocation index.
543 // The CodeBuffer will expand the locs array if this estimate is too low.
544 reloc_size *= 10 / sizeof(relocInfo);
545
546 // Adjust const_size to number of bytes
547 const_size *= 2*jintSize; // both float and double take two words per entry
548
549 }
550
551 //------------------------------FillLocArray-----------------------------------
552 // Create a bit of debug info and append it to the array. The mapping is from
553 // Java local or expression stack to constant, register or stack-slot. For
554 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
555 // entry has been taken care of and caller should skip it).
556 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
557 // This should never have accepted Bad before
558 assert(OptoReg::is_valid(regnum), "location must be valid");
559 return (OptoReg::is_reg(regnum))
560 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
561 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
562 }
563
564
565 ObjectValue*
566 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
567 for (int i = 0; i < objs->length(); i++) {
568 assert(objs->at(i)->is_object(), "corrupt object cache");
569 ObjectValue* sv = (ObjectValue*) objs->at(i);
570 if (sv->id() == id) {
571 return sv;
572 }
573 }
574 // Otherwise..
575 return NULL;
576 }
577
578 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
579 ObjectValue* sv ) {
580 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
581 objs->append(sv);
582 }
583
584
585 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
586 GrowableArray<ScopeValue*> *array,
587 GrowableArray<ScopeValue*> *objs ) {
588 assert( local, "use _top instead of null" );
589 if (array->length() != idx) {
590 assert(array->length() == idx + 1, "Unexpected array count");
591 // Old functionality:
592 // return
593 // New functionality:
594 // Assert if the local is not top. In product mode let the new node
595 // override the old entry.
596 assert(local == top(), "LocArray collision");
597 if (local == top()) {
598 return;
599 }
600 array->pop();
601 }
602 const Type *t = local->bottom_type();
603
604 // Is it a safepoint scalar object node?
605 if (local->is_SafePointScalarObject()) {
606 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
607
608 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
609 if (sv == NULL) {
610 ciKlass* cik = t->is_oopptr()->klass();
611 assert(cik->is_instance_klass() ||
612 cik->is_array_klass(), "Not supported allocation.");
613 sv = new ObjectValue(spobj->_idx,
614 new ConstantOopWriteValue(cik->constant_encoding()));
615 Compile::set_sv_for_object_node(objs, sv);
616
617 uint first_ind = spobj->first_index();
618 for (uint i = 0; i < spobj->n_fields(); i++) {
619 Node* fld_node = sfpt->in(first_ind+i);
620 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
621 }
622 }
623 array->append(sv);
624 return;
625 }
626
627 // Grab the register number for the local
628 OptoReg::Name regnum = _regalloc->get_reg_first(local);
629 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
630 // Record the double as two float registers.
631 // The register mask for such a value always specifies two adjacent
632 // float registers, with the lower register number even.
633 // Normally, the allocation of high and low words to these registers
634 // is irrelevant, because nearly all operations on register pairs
635 // (e.g., StoreD) treat them as a single unit.
636 // Here, we assume in addition that the words in these two registers
637 // stored "naturally" (by operations like StoreD and double stores
638 // within the interpreter) such that the lower-numbered register
639 // is written to the lower memory address. This may seem like
640 // a machine dependency, but it is not--it is a requirement on
641 // the author of the <arch>.ad file to ensure that, for every
642 // even/odd double-register pair to which a double may be allocated,
643 // the word in the even single-register is stored to the first
644 // memory word. (Note that register numbers are completely
645 // arbitrary, and are not tied to any machine-level encodings.)
646 #ifdef _LP64
647 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
648 array->append(new ConstantIntValue(0));
649 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
650 } else if ( t->base() == Type::Long ) {
651 array->append(new ConstantIntValue(0));
652 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
653 } else if ( t->base() == Type::RawPtr ) {
654 // jsr/ret return address which must be restored into a the full
655 // width 64-bit stack slot.
656 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
657 }
658 #else //_LP64
659 #ifdef SPARC
660 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
661 // For SPARC we have to swap high and low words for
662 // long values stored in a single-register (g0-g7).
663 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
664 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
665 } else
666 #endif //SPARC
667 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
668 // Repack the double/long as two jints.
669 // The convention the interpreter uses is that the second local
670 // holds the first raw word of the native double representation.
671 // This is actually reasonable, since locals and stack arrays
672 // grow downwards in all implementations.
673 // (If, on some machine, the interpreter's Java locals or stack
674 // were to grow upwards, the embedded doubles would be word-swapped.)
675 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
676 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
677 }
678 #endif //_LP64
679 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
680 OptoReg::is_reg(regnum) ) {
681 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double()
682 ? Location::float_in_dbl : Location::normal ));
683 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
684 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
685 ? Location::int_in_long : Location::normal ));
686 } else if( t->base() == Type::NarrowOop ) {
687 array->append(new_loc_value( _regalloc, regnum, Location::narrowoop ));
688 } else {
689 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
690 }
691 return;
692 }
693
694 // No register. It must be constant data.
695 switch (t->base()) {
696 case Type::Half: // Second half of a double
697 ShouldNotReachHere(); // Caller should skip 2nd halves
698 break;
699 case Type::AnyPtr:
700 array->append(new ConstantOopWriteValue(NULL));
701 break;
702 case Type::AryPtr:
703 case Type::InstPtr:
704 case Type::KlassPtr: // fall through
705 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding()));
706 break;
707 case Type::NarrowOop:
708 if (t == TypeNarrowOop::NULL_PTR) {
709 array->append(new ConstantOopWriteValue(NULL));
710 } else {
711 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding()));
712 }
713 break;
714 case Type::Int:
715 array->append(new ConstantIntValue(t->is_int()->get_con()));
716 break;
717 case Type::RawPtr:
718 // A return address (T_ADDRESS).
719 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
720 #ifdef _LP64
721 // Must be restored to the full-width 64-bit stack slot.
722 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
723 #else
724 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
725 #endif
726 break;
727 case Type::FloatCon: {
728 float f = t->is_float_constant()->getf();
729 array->append(new ConstantIntValue(jint_cast(f)));
730 break;
731 }
732 case Type::DoubleCon: {
733 jdouble d = t->is_double_constant()->getd();
734 #ifdef _LP64
735 array->append(new ConstantIntValue(0));
736 array->append(new ConstantDoubleValue(d));
737 #else
738 // Repack the double as two jints.
739 // The convention the interpreter uses is that the second local
740 // holds the first raw word of the native double representation.
741 // This is actually reasonable, since locals and stack arrays
742 // grow downwards in all implementations.
743 // (If, on some machine, the interpreter's Java locals or stack
744 // were to grow upwards, the embedded doubles would be word-swapped.)
745 jint *dp = (jint*)&d;
746 array->append(new ConstantIntValue(dp[1]));
747 array->append(new ConstantIntValue(dp[0]));
748 #endif
749 break;
750 }
751 case Type::Long: {
752 jlong d = t->is_long()->get_con();
753 #ifdef _LP64
754 array->append(new ConstantIntValue(0));
755 array->append(new ConstantLongValue(d));
756 #else
757 // Repack the long as two jints.
758 // The convention the interpreter uses is that the second local
759 // holds the first raw word of the native double representation.
760 // This is actually reasonable, since locals and stack arrays
761 // grow downwards in all implementations.
762 // (If, on some machine, the interpreter's Java locals or stack
763 // were to grow upwards, the embedded doubles would be word-swapped.)
764 jint *dp = (jint*)&d;
765 array->append(new ConstantIntValue(dp[1]));
766 array->append(new ConstantIntValue(dp[0]));
767 #endif
768 break;
769 }
770 case Type::Top: // Add an illegal value here
771 array->append(new LocationValue(Location()));
772 break;
773 default:
774 ShouldNotReachHere();
775 break;
776 }
777 }
778
779 // Determine if this node starts a bundle
780 bool Compile::starts_bundle(const Node *n) const {
781 return (_node_bundling_limit > n->_idx &&
782 _node_bundling_base[n->_idx].starts_bundle());
783 }
784
785 //--------------------------Process_OopMap_Node--------------------------------
786 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
787
788 // Handle special safepoint nodes for synchronization
789 MachSafePointNode *sfn = mach->as_MachSafePoint();
790 MachCallNode *mcall;
791
792 #ifdef ENABLE_ZAP_DEAD_LOCALS
793 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
794 #endif
795
796 int safepoint_pc_offset = current_offset;
797 bool is_method_handle_invoke = false;
798 bool return_oop = false;
799
800 // Add the safepoint in the DebugInfoRecorder
801 if( !mach->is_MachCall() ) {
802 mcall = NULL;
803 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
804 } else {
805 mcall = mach->as_MachCall();
806
807 // Is the call a MethodHandle call?
808 if (mcall->is_MachCallJava()) {
809 if (mcall->as_MachCallJava()->_method_handle_invoke) {
810 assert(has_method_handle_invokes(), "must have been set during call generation");
811 is_method_handle_invoke = true;
812 }
813 }
814
815 // Check if a call returns an object.
816 if (mcall->return_value_is_used() &&
817 mcall->tf()->range()->field_at(TypeFunc::Parms)->isa_ptr()) {
818 return_oop = true;
819 }
820 safepoint_pc_offset += mcall->ret_addr_offset();
821 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
822 }
823
824 // Loop over the JVMState list to add scope information
825 // Do not skip safepoints with a NULL method, they need monitor info
826 JVMState* youngest_jvms = sfn->jvms();
827 int max_depth = youngest_jvms->depth();
828
829 // Allocate the object pool for scalar-replaced objects -- the map from
830 // small-integer keys (which can be recorded in the local and ostack
831 // arrays) to descriptions of the object state.
832 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
833
834 // Visit scopes from oldest to youngest.
835 for (int depth = 1; depth <= max_depth; depth++) {
836 JVMState* jvms = youngest_jvms->of_depth(depth);
837 int idx;
838 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
839 // Safepoints that do not have method() set only provide oop-map and monitor info
840 // to support GC; these do not support deoptimization.
841 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
842 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
843 int num_mon = jvms->nof_monitors();
844 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
845 "JVMS local count must match that of the method");
846
847 // Add Local and Expression Stack Information
848
849 // Insert locals into the locarray
850 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
851 for( idx = 0; idx < num_locs; idx++ ) {
852 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
853 }
854
855 // Insert expression stack entries into the exparray
856 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
857 for( idx = 0; idx < num_exps; idx++ ) {
858 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
859 }
860
861 // Add in mappings of the monitors
862 assert( !method ||
863 !method->is_synchronized() ||
864 method->is_native() ||
865 num_mon > 0 ||
866 !GenerateSynchronizationCode,
867 "monitors must always exist for synchronized methods");
868
869 // Build the growable array of ScopeValues for exp stack
870 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
871
872 // Loop over monitors and insert into array
873 for(idx = 0; idx < num_mon; idx++) {
874 // Grab the node that defines this monitor
875 Node* box_node = sfn->monitor_box(jvms, idx);
876 Node* obj_node = sfn->monitor_obj(jvms, idx);
877
878 // Create ScopeValue for object
879 ScopeValue *scval = NULL;
880
881 if( obj_node->is_SafePointScalarObject() ) {
882 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
883 scval = Compile::sv_for_node_id(objs, spobj->_idx);
884 if (scval == NULL) {
885 const Type *t = obj_node->bottom_type();
886 ciKlass* cik = t->is_oopptr()->klass();
887 assert(cik->is_instance_klass() ||
888 cik->is_array_klass(), "Not supported allocation.");
889 ObjectValue* sv = new ObjectValue(spobj->_idx,
890 new ConstantOopWriteValue(cik->constant_encoding()));
891 Compile::set_sv_for_object_node(objs, sv);
892
893 uint first_ind = spobj->first_index();
894 for (uint i = 0; i < spobj->n_fields(); i++) {
895 Node* fld_node = sfn->in(first_ind+i);
896 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
897 }
898 scval = sv;
899 }
900 } else if( !obj_node->is_Con() ) {
901 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
902 if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
903 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
904 } else {
905 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
906 }
907 } else {
908 const TypePtr *tp = obj_node->bottom_type()->make_ptr();
909 scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->constant_encoding());
910 }
911
912 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
913 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
914 while( !box_node->is_BoxLock() ) box_node = box_node->in(1);
915 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
916 }
917
918 // We dump the object pool first, since deoptimization reads it in first.
919 debug_info()->dump_object_pool(objs);
920
921 // Build first class objects to pass to scope
922 DebugToken *locvals = debug_info()->create_scope_values(locarray);
923 DebugToken *expvals = debug_info()->create_scope_values(exparray);
924 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
925
926 // Make method available for all Safepoints
927 ciMethod* scope_method = method ? method : _method;
928 // Describe the scope here
929 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
930 assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest");
931 // Now we can describe the scope.
932 debug_info()->describe_scope(safepoint_pc_offset, scope_method, jvms->bci(), jvms->should_reexecute(), is_method_handle_invoke, return_oop, locvals, expvals, monvals);
933 } // End jvms loop
934
935 // Mark the end of the scope set.
936 debug_info()->end_safepoint(safepoint_pc_offset);
937 }
938
939
940
941 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
942 class NonSafepointEmitter {
943 Compile* C;
944 JVMState* _pending_jvms;
945 int _pending_offset;
946
947 void emit_non_safepoint();
948
949 public:
950 NonSafepointEmitter(Compile* compile) {
951 this->C = compile;
952 _pending_jvms = NULL;
953 _pending_offset = 0;
954 }
955
956 void observe_instruction(Node* n, int pc_offset) {
957 if (!C->debug_info()->recording_non_safepoints()) return;
958
959 Node_Notes* nn = C->node_notes_at(n->_idx);
960 if (nn == NULL || nn->jvms() == NULL) return;
961 if (_pending_jvms != NULL &&
962 _pending_jvms->same_calls_as(nn->jvms())) {
963 // Repeated JVMS? Stretch it up here.
964 _pending_offset = pc_offset;
965 } else {
966 if (_pending_jvms != NULL &&
967 _pending_offset < pc_offset) {
968 emit_non_safepoint();
969 }
970 _pending_jvms = NULL;
971 if (pc_offset > C->debug_info()->last_pc_offset()) {
972 // This is the only way _pending_jvms can become non-NULL:
973 _pending_jvms = nn->jvms();
974 _pending_offset = pc_offset;
975 }
976 }
977 }
978
979 // Stay out of the way of real safepoints:
980 void observe_safepoint(JVMState* jvms, int pc_offset) {
981 if (_pending_jvms != NULL &&
982 !_pending_jvms->same_calls_as(jvms) &&
983 _pending_offset < pc_offset) {
984 emit_non_safepoint();
985 }
986 _pending_jvms = NULL;
987 }
988
989 void flush_at_end() {
990 if (_pending_jvms != NULL) {
991 emit_non_safepoint();
992 }
993 _pending_jvms = NULL;
994 }
995 };
996
997 void NonSafepointEmitter::emit_non_safepoint() {
998 JVMState* youngest_jvms = _pending_jvms;
999 int pc_offset = _pending_offset;
1000
1001 // Clear it now:
1002 _pending_jvms = NULL;
1003
1004 DebugInformationRecorder* debug_info = C->debug_info();
1005 assert(debug_info->recording_non_safepoints(), "sanity");
1006
1007 debug_info->add_non_safepoint(pc_offset);
1008 int max_depth = youngest_jvms->depth();
1009
1010 // Visit scopes from oldest to youngest.
1011 for (int depth = 1; depth <= max_depth; depth++) {
1012 JVMState* jvms = youngest_jvms->of_depth(depth);
1013 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
1014 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
1015 debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute());
1016 }
1017
1018 // Mark the end of the scope set.
1019 debug_info->end_non_safepoint(pc_offset);
1020 }
1021
1022
1023
1024 // helper for Fill_buffer bailout logic
1025 static void turn_off_compiler(Compile* C) {
1026 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
1027 // Do not turn off compilation if a single giant method has
1028 // blown the code cache size.
1029 C->record_failure("excessive request to CodeCache");
1030 } else {
1031 // Let CompilerBroker disable further compilations.
1032 C->record_failure("CodeCache is full");
1033 }
1034 }
1035
1036
1037 //------------------------------Fill_buffer------------------------------------
1038 void Compile::Fill_buffer() {
1039
1040 // Set the initially allocated size
1041 int code_req = initial_code_capacity;
1042 int locs_req = initial_locs_capacity;
1043 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1044 int const_req = initial_const_capacity;
1045 bool labels_not_set = true;
1046
1047 int pad_req = NativeCall::instruction_size;
1048 // The extra spacing after the code is necessary on some platforms.
1049 // Sometimes we need to patch in a jump after the last instruction,
1050 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1051
1052 uint i;
1053 // Compute the byte offset where we can store the deopt pc.
1054 if (fixed_slots() != 0) {
1055 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1056 }
1057
1058 // Compute prolog code size
1059 _method_size = 0;
1060 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1061 #ifdef IA64
1062 if (save_argument_registers()) {
1063 // 4815101: this is a stub with implicit and unknown precision fp args.
1064 // The usual spill mechanism can only generate stfd's in this case, which
1065 // doesn't work if the fp reg to spill contains a single-precision denorm.
1066 // Instead, we hack around the normal spill mechanism using stfspill's and
1067 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1068 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1069 //
1070 // If we ever implement 16-byte 'registers' == stack slots, we can
1071 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1072 // instead of stfd/stfs/ldfd/ldfs.
1073 _frame_slots += 8*(16/BytesPerInt);
1074 }
1075 #endif
1076 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1077
1078 // Create an array of unused labels, one for each basic block
1079 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1080
1081 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1082 blk_labels[i].init();
1083 }
1084
1085 // If this machine supports different size branch offsets, then pre-compute
1086 // the length of the blocks
1087 if( _matcher->is_short_branch_offset(-1, 0) ) {
1088 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1089 labels_not_set = false;
1090 }
1091
1092 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1093 int exception_handler_req = size_exception_handler();
1094 int deopt_handler_req = size_deopt_handler();
1095 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1096 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1097 stub_req += MAX_stubs_size; // ensure per-stub margin
1098 code_req += MAX_inst_size; // ensure per-instruction margin
1099
1100 if (StressCodeBuffers)
1101 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1102
1103 int total_req =
1104 code_req +
1105 pad_req +
1106 stub_req +
1107 exception_handler_req +
1108 deopt_handler_req + // deopt handler
1109 const_req;
1110
1111 if (has_method_handle_invokes())
1112 total_req += deopt_handler_req; // deopt MH handler
1113
1114 CodeBuffer* cb = code_buffer();
1115 cb->initialize(total_req, locs_req);
1116
1117 // Have we run out of code space?
1118 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) {
1119 turn_off_compiler(this);
1120 return;
1121 }
1122 // Configure the code buffer.
1123 cb->initialize_consts_size(const_req);
1124 cb->initialize_stubs_size(stub_req);
1125 cb->initialize_oop_recorder(env()->oop_recorder());
1126
1127 // fill in the nop array for bundling computations
1128 MachNode *_nop_list[Bundle::_nop_count];
1129 Bundle::initialize_nops(_nop_list, this);
1130
1131 // Create oopmap set.
1132 _oop_map_set = new OopMapSet();
1133
1134 // !!!!! This preserves old handling of oopmaps for now
1135 debug_info()->set_oopmaps(_oop_map_set);
1136
1137 // Count and start of implicit null check instructions
1138 uint inct_cnt = 0;
1139 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1140
1141 // Count and start of calls
1142 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1143
1144 uint return_offset = 0;
1145 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1146
1147 int previous_offset = 0;
1148 int current_offset = 0;
1149 int last_call_offset = -1;
1150
1151 // Create an array of unused labels, one for each basic block, if printing is enabled
1152 #ifndef PRODUCT
1153 int *node_offsets = NULL;
1154 uint node_offset_limit = unique();
1155
1156
1157 if ( print_assembly() )
1158 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1159 #endif
1160
1161 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1162
1163 // ------------------
1164 // Now fill in the code buffer
1165 Node *delay_slot = NULL;
1166
1167 for( i=0; i < _cfg->_num_blocks; i++ ) {
1168 Block *b = _cfg->_blocks[i];
1169
1170 Node *head = b->head();
1171
1172 // If this block needs to start aligned (i.e, can be reached other
1173 // than by falling-thru from the previous block), then force the
1174 // start of a new bundle.
1175 if( Pipeline::requires_bundling() && starts_bundle(head) )
1176 cb->flush_bundle(true);
1177
1178 // Define the label at the beginning of the basic block
1179 if( labels_not_set )
1180 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1181
1182 else
1183 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1184 "label position does not match code offset" );
1185
1186 uint last_inst = b->_nodes.size();
1187
1188 // Emit block normally, except for last instruction.
1189 // Emit means "dump code bits into code buffer".
1190 for( uint j = 0; j<last_inst; j++ ) {
1191
1192 // Get the node
1193 Node* n = b->_nodes[j];
1194
1195 // See if delay slots are supported
1196 if (valid_bundle_info(n) &&
1197 node_bundling(n)->used_in_unconditional_delay()) {
1198 assert(delay_slot == NULL, "no use of delay slot node");
1199 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1200
1201 delay_slot = n;
1202 continue;
1203 }
1204
1205 // If this starts a new instruction group, then flush the current one
1206 // (but allow split bundles)
1207 if( Pipeline::requires_bundling() && starts_bundle(n) )
1208 cb->flush_bundle(false);
1209
1210 // The following logic is duplicated in the code ifdeffed for
1211 // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It
1212 // should be factored out. Or maybe dispersed to the nodes?
1213
1214 // Special handling for SafePoint/Call Nodes
1215 bool is_mcall = false;
1216 if( n->is_Mach() ) {
1217 MachNode *mach = n->as_Mach();
1218 is_mcall = n->is_MachCall();
1219 bool is_sfn = n->is_MachSafePoint();
1220
1221 // If this requires all previous instructions be flushed, then do so
1222 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1223 cb->flush_bundle(true);
1224 current_offset = cb->code_size();
1225 }
1226
1227 // align the instruction if necessary
1228 int padding = mach->compute_padding(current_offset);
1229 // Make sure safepoint node for polling is distinct from a call's
1230 // return by adding a nop if needed.
1231 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1232 padding = nop_size;
1233 }
1234 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1235
1236 if(padding > 0) {
1237 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1238 int nops_cnt = padding / nop_size;
1239 MachNode *nop = new (this) MachNopNode(nops_cnt);
1240 b->_nodes.insert(j++, nop);
1241 last_inst++;
1242 _cfg->_bbs.map( nop->_idx, b );
1243 nop->emit(*cb, _regalloc);
1244 cb->flush_bundle(true);
1245 current_offset = cb->code_size();
1246 }
1247
1248 // Remember the start of the last call in a basic block
1249 if (is_mcall) {
1250 MachCallNode *mcall = mach->as_MachCall();
1251
1252 // This destination address is NOT PC-relative
1253 mcall->method_set((intptr_t)mcall->entry_point());
1254
1255 // Save the return address
1256 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1257
1258 if (!mcall->is_safepoint_node()) {
1259 is_mcall = false;
1260 is_sfn = false;
1261 }
1262 }
1263
1264 // sfn will be valid whenever mcall is valid now because of inheritance
1265 if( is_sfn || is_mcall ) {
1266
1267 // Handle special safepoint nodes for synchronization
1268 if( !is_mcall ) {
1269 MachSafePointNode *sfn = mach->as_MachSafePoint();
1270 // !!!!! Stubs only need an oopmap right now, so bail out
1271 if( sfn->jvms()->method() == NULL) {
1272 // Write the oopmap directly to the code blob??!!
1273 # ifdef ENABLE_ZAP_DEAD_LOCALS
1274 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1275 # endif
1276 continue;
1277 }
1278 } // End synchronization
1279
1280 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1281 current_offset);
1282 Process_OopMap_Node(mach, current_offset);
1283 } // End if safepoint
1284
1285 // If this is a null check, then add the start of the previous instruction to the list
1286 else if( mach->is_MachNullCheck() ) {
1287 inct_starts[inct_cnt++] = previous_offset;
1288 }
1289
1290 // If this is a branch, then fill in the label with the target BB's label
1291 else if ( mach->is_Branch() ) {
1292
1293 if ( mach->ideal_Opcode() == Op_Jump ) {
1294 for (uint h = 0; h < b->_num_succs; h++ ) {
1295 Block* succs_block = b->_succs[h];
1296 for (uint j = 1; j < succs_block->num_preds(); j++) {
1297 Node* jpn = succs_block->pred(j);
1298 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1299 uint block_num = succs_block->non_connector()->_pre_order;
1300 Label *blkLabel = &blk_labels[block_num];
1301 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1302 }
1303 }
1304 }
1305 } else {
1306 // For Branchs
1307 // This requires the TRUE branch target be in succs[0]
1308 uint block_num = b->non_connector_successor(0)->_pre_order;
1309 mach->label_set( blk_labels[block_num], block_num );
1310 }
1311 }
1312
1313 #ifdef ASSERT
1314 // Check that oop-store precedes the card-mark
1315 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1316 uint storeCM_idx = j;
1317 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1318 assert( oop_store != NULL, "storeCM expects a precedence edge");
1319 uint i4;
1320 for( i4 = 0; i4 < last_inst; ++i4 ) {
1321 if( b->_nodes[i4] == oop_store ) break;
1322 }
1323 // Note: This test can provide a false failure if other precedence
1324 // edges have been added to the storeCMNode.
1325 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1326 }
1327 #endif
1328
1329 else if( !n->is_Proj() ) {
1330 // Remember the beginning of the previous instruction, in case
1331 // it's followed by a flag-kill and a null-check. Happens on
1332 // Intel all the time, with add-to-memory kind of opcodes.
1333 previous_offset = current_offset;
1334 }
1335 }
1336
1337 // Verify that there is sufficient space remaining
1338 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1339 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) {
1340 turn_off_compiler(this);
1341 return;
1342 }
1343
1344 // Save the offset for the listing
1345 #ifndef PRODUCT
1346 if( node_offsets && n->_idx < node_offset_limit )
1347 node_offsets[n->_idx] = cb->code_size();
1348 #endif
1349
1350 // "Normal" instruction case
1351 n->emit(*cb, _regalloc);
1352 current_offset = cb->code_size();
1353 non_safepoints.observe_instruction(n, current_offset);
1354
1355 // mcall is last "call" that can be a safepoint
1356 // record it so we can see if a poll will directly follow it
1357 // in which case we'll need a pad to make the PcDesc sites unique
1358 // see 5010568. This can be slightly inaccurate but conservative
1359 // in the case that return address is not actually at current_offset.
1360 // This is a small price to pay.
1361
1362 if (is_mcall) {
1363 last_call_offset = current_offset;
1364 }
1365
1366 // See if this instruction has a delay slot
1367 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1368 assert(delay_slot != NULL, "expecting delay slot node");
1369
1370 // Back up 1 instruction
1371 cb->set_code_end(
1372 cb->code_end()-Pipeline::instr_unit_size());
1373
1374 // Save the offset for the listing
1375 #ifndef PRODUCT
1376 if( node_offsets && delay_slot->_idx < node_offset_limit )
1377 node_offsets[delay_slot->_idx] = cb->code_size();
1378 #endif
1379
1380 // Support a SafePoint in the delay slot
1381 if( delay_slot->is_MachSafePoint() ) {
1382 MachNode *mach = delay_slot->as_Mach();
1383 // !!!!! Stubs only need an oopmap right now, so bail out
1384 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1385 // Write the oopmap directly to the code blob??!!
1386 # ifdef ENABLE_ZAP_DEAD_LOCALS
1387 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1388 # endif
1389 delay_slot = NULL;
1390 continue;
1391 }
1392
1393 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1394 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1395 adjusted_offset);
1396 // Generate an OopMap entry
1397 Process_OopMap_Node(mach, adjusted_offset);
1398 }
1399
1400 // Insert the delay slot instruction
1401 delay_slot->emit(*cb, _regalloc);
1402
1403 // Don't reuse it
1404 delay_slot = NULL;
1405 }
1406
1407 } // End for all instructions in block
1408
1409 // If the next block is the top of a loop, pad this block out to align
1410 // the loop top a little. Helps prevent pipe stalls at loop back branches.
1411 if( i<_cfg->_num_blocks-1 ) {
1412 Block *nb = _cfg->_blocks[i+1];
1413 uint padding = nb->alignment_padding(current_offset);
1414 if( padding > 0 ) {
1415 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1416 b->_nodes.insert( b->_nodes.size(), nop );
1417 _cfg->_bbs.map( nop->_idx, b );
1418 nop->emit(*cb, _regalloc);
1419 current_offset = cb->code_size();
1420 }
1421 }
1422
1423 } // End of for all blocks
1424
1425 non_safepoints.flush_at_end();
1426
1427 // Offset too large?
1428 if (failing()) return;
1429
1430 // Define a pseudo-label at the end of the code
1431 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1432
1433 // Compute the size of the first block
1434 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1435
1436 assert(cb->code_size() < 500000, "method is unreasonably large");
1437
1438 // ------------------
1439
1440 #ifndef PRODUCT
1441 // Information on the size of the method, without the extraneous code
1442 Scheduling::increment_method_size(cb->code_size());
1443 #endif
1444
1445 // ------------------
1446 // Fill in exception table entries.
1447 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1448
1449 // Only java methods have exception handlers and deopt handlers
1450 if (_method) {
1451 // Emit the exception handler code.
1452 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1453 // Emit the deopt handler code.
1454 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1455
1456 // Emit the MethodHandle deopt handler code (if required).
1457 if (has_method_handle_invokes()) {
1458 // We can use the same code as for the normal deopt handler, we
1459 // just need a different entry point address.
1460 _code_offsets.set_value(CodeOffsets::DeoptMH, emit_deopt_handler(*cb));
1461 }
1462 }
1463
1464 // One last check for failed CodeBuffer::expand:
1465 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) {
1466 turn_off_compiler(this);
1467 return;
1468 }
1469
1470 #ifndef PRODUCT
1471 // Dump the assembly code, including basic-block numbers
1472 if (print_assembly()) {
1473 ttyLocker ttyl; // keep the following output all in one block
1474 if (!VMThread::should_terminate()) { // test this under the tty lock
1475 // This output goes directly to the tty, not the compiler log.
1476 // To enable tools to match it up with the compilation activity,
1477 // be sure to tag this tty output with the compile ID.
1478 if (xtty != NULL) {
1479 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1480 is_osr_compilation() ? " compile_kind='osr'" :
1481 "");
1482 }
1483 if (method() != NULL) {
1484 method()->print_oop();
1485 print_codes();
1486 }
1487 dump_asm(node_offsets, node_offset_limit);
1488 if (xtty != NULL) {
1489 xtty->tail("opto_assembly");
1490 }
1491 }
1492 }
1493 #endif
1494
1495 }
1496
1497 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1498 _inc_table.set_size(cnt);
1499
1500 uint inct_cnt = 0;
1501 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1502 Block *b = _cfg->_blocks[i];
1503 Node *n = NULL;
1504 int j;
1505
1506 // Find the branch; ignore trailing NOPs.
1507 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1508 n = b->_nodes[j];
1509 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1510 break;
1511 }
1512
1513 // If we didn't find anything, continue
1514 if( j < 0 ) continue;
1515
1516 // Compute ExceptionHandlerTable subtable entry and add it
1517 // (skip empty blocks)
1518 if( n->is_Catch() ) {
1519
1520 // Get the offset of the return from the call
1521 uint call_return = call_returns[b->_pre_order];
1522 #ifdef ASSERT
1523 assert( call_return > 0, "no call seen for this basic block" );
1524 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1525 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1526 #endif
1527 // last instruction is a CatchNode, find it's CatchProjNodes
1528 int nof_succs = b->_num_succs;
1529 // allocate space
1530 GrowableArray<intptr_t> handler_bcis(nof_succs);
1531 GrowableArray<intptr_t> handler_pcos(nof_succs);
1532 // iterate through all successors
1533 for (int j = 0; j < nof_succs; j++) {
1534 Block* s = b->_succs[j];
1535 bool found_p = false;
1536 for( uint k = 1; k < s->num_preds(); k++ ) {
1537 Node *pk = s->pred(k);
1538 if( pk->is_CatchProj() && pk->in(0) == n ) {
1539 const CatchProjNode* p = pk->as_CatchProj();
1540 found_p = true;
1541 // add the corresponding handler bci & pco information
1542 if( p->_con != CatchProjNode::fall_through_index ) {
1543 // p leads to an exception handler (and is not fall through)
1544 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1545 // no duplicates, please
1546 if( !handler_bcis.contains(p->handler_bci()) ) {
1547 uint block_num = s->non_connector()->_pre_order;
1548 handler_bcis.append(p->handler_bci());
1549 handler_pcos.append(blk_labels[block_num].loc_pos());
1550 }
1551 }
1552 }
1553 }
1554 assert(found_p, "no matching predecessor found");
1555 // Note: Due to empty block removal, one block may have
1556 // several CatchProj inputs, from the same Catch.
1557 }
1558
1559 // Set the offset of the return from the call
1560 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1561 continue;
1562 }
1563
1564 // Handle implicit null exception table updates
1565 if( n->is_MachNullCheck() ) {
1566 uint block_num = b->non_connector_successor(0)->_pre_order;
1567 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1568 continue;
1569 }
1570 } // End of for all blocks fill in exception table entries
1571 }
1572
1573 // Static Variables
1574 #ifndef PRODUCT
1575 uint Scheduling::_total_nop_size = 0;
1576 uint Scheduling::_total_method_size = 0;
1577 uint Scheduling::_total_branches = 0;
1578 uint Scheduling::_total_unconditional_delays = 0;
1579 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1580 #endif
1581
1582 // Initializer for class Scheduling
1583
1584 Scheduling::Scheduling(Arena *arena, Compile &compile)
1585 : _arena(arena),
1586 _cfg(compile.cfg()),
1587 _bbs(compile.cfg()->_bbs),
1588 _regalloc(compile.regalloc()),
1589 _reg_node(arena),
1590 _bundle_instr_count(0),
1591 _bundle_cycle_number(0),
1592 _scheduled(arena),
1593 _available(arena),
1594 _next_node(NULL),
1595 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1596 _pinch_free_list(arena)
1597 #ifndef PRODUCT
1598 , _branches(0)
1599 , _unconditional_delays(0)
1600 #endif
1601 {
1602 // Create a MachNopNode
1603 _nop = new (&compile) MachNopNode();
1604
1605 // Now that the nops are in the array, save the count
1606 // (but allow entries for the nops)
1607 _node_bundling_limit = compile.unique();
1608 uint node_max = _regalloc->node_regs_max_index();
1609
1610 compile.set_node_bundling_limit(_node_bundling_limit);
1611
1612 // This one is persistent within the Compile class
1613 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1614
1615 // Allocate space for fixed-size arrays
1616 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1617 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1618 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1619
1620 // Clear the arrays
1621 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1622 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1623 memset(_uses, 0, node_max * sizeof(short));
1624 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1625
1626 // Clear the bundling information
1627 memcpy(_bundle_use_elements,
1628 Pipeline_Use::elaborated_elements,
1629 sizeof(Pipeline_Use::elaborated_elements));
1630
1631 // Get the last node
1632 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1633
1634 _next_node = bb->_nodes[bb->_nodes.size()-1];
1635 }
1636
1637 #ifndef PRODUCT
1638 // Scheduling destructor
1639 Scheduling::~Scheduling() {
1640 _total_branches += _branches;
1641 _total_unconditional_delays += _unconditional_delays;
1642 }
1643 #endif
1644
1645 // Step ahead "i" cycles
1646 void Scheduling::step(uint i) {
1647
1648 Bundle *bundle = node_bundling(_next_node);
1649 bundle->set_starts_bundle();
1650
1651 // Update the bundle record, but leave the flags information alone
1652 if (_bundle_instr_count > 0) {
1653 bundle->set_instr_count(_bundle_instr_count);
1654 bundle->set_resources_used(_bundle_use.resourcesUsed());
1655 }
1656
1657 // Update the state information
1658 _bundle_instr_count = 0;
1659 _bundle_cycle_number += i;
1660 _bundle_use.step(i);
1661 }
1662
1663 void Scheduling::step_and_clear() {
1664 Bundle *bundle = node_bundling(_next_node);
1665 bundle->set_starts_bundle();
1666
1667 // Update the bundle record
1668 if (_bundle_instr_count > 0) {
1669 bundle->set_instr_count(_bundle_instr_count);
1670 bundle->set_resources_used(_bundle_use.resourcesUsed());
1671
1672 _bundle_cycle_number += 1;
1673 }
1674
1675 // Clear the bundling information
1676 _bundle_instr_count = 0;
1677 _bundle_use.reset();
1678
1679 memcpy(_bundle_use_elements,
1680 Pipeline_Use::elaborated_elements,
1681 sizeof(Pipeline_Use::elaborated_elements));
1682 }
1683
1684 //------------------------------ScheduleAndBundle------------------------------
1685 // Perform instruction scheduling and bundling over the sequence of
1686 // instructions in backwards order.
1687 void Compile::ScheduleAndBundle() {
1688
1689 // Don't optimize this if it isn't a method
1690 if (!_method)
1691 return;
1692
1693 // Don't optimize this if scheduling is disabled
1694 if (!do_scheduling())
1695 return;
1696
1697 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1698
1699 // Create a data structure for all the scheduling information
1700 Scheduling scheduling(Thread::current()->resource_area(), *this);
1701
1702 // Walk backwards over each basic block, computing the needed alignment
1703 // Walk over all the basic blocks
1704 scheduling.DoScheduling();
1705 }
1706
1707 //------------------------------ComputeLocalLatenciesForward-------------------
1708 // Compute the latency of all the instructions. This is fairly simple,
1709 // because we already have a legal ordering. Walk over the instructions
1710 // from first to last, and compute the latency of the instruction based
1711 // on the latency of the preceding instruction(s).
1712 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1713 #ifndef PRODUCT
1714 if (_cfg->C->trace_opto_output())
1715 tty->print("# -> ComputeLocalLatenciesForward\n");
1716 #endif
1717
1718 // Walk over all the schedulable instructions
1719 for( uint j=_bb_start; j < _bb_end; j++ ) {
1720
1721 // This is a kludge, forcing all latency calculations to start at 1.
1722 // Used to allow latency 0 to force an instruction to the beginning
1723 // of the bb
1724 uint latency = 1;
1725 Node *use = bb->_nodes[j];
1726 uint nlen = use->len();
1727
1728 // Walk over all the inputs
1729 for ( uint k=0; k < nlen; k++ ) {
1730 Node *def = use->in(k);
1731 if (!def)
1732 continue;
1733
1734 uint l = _node_latency[def->_idx] + use->latency(k);
1735 if (latency < l)
1736 latency = l;
1737 }
1738
1739 _node_latency[use->_idx] = latency;
1740
1741 #ifndef PRODUCT
1742 if (_cfg->C->trace_opto_output()) {
1743 tty->print("# latency %4d: ", latency);
1744 use->dump();
1745 }
1746 #endif
1747 }
1748
1749 #ifndef PRODUCT
1750 if (_cfg->C->trace_opto_output())
1751 tty->print("# <- ComputeLocalLatenciesForward\n");
1752 #endif
1753
1754 } // end ComputeLocalLatenciesForward
1755
1756 // See if this node fits into the present instruction bundle
1757 bool Scheduling::NodeFitsInBundle(Node *n) {
1758 uint n_idx = n->_idx;
1759
1760 // If this is the unconditional delay instruction, then it fits
1761 if (n == _unconditional_delay_slot) {
1762 #ifndef PRODUCT
1763 if (_cfg->C->trace_opto_output())
1764 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1765 #endif
1766 return (true);
1767 }
1768
1769 // If the node cannot be scheduled this cycle, skip it
1770 if (_current_latency[n_idx] > _bundle_cycle_number) {
1771 #ifndef PRODUCT
1772 if (_cfg->C->trace_opto_output())
1773 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1774 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1775 #endif
1776 return (false);
1777 }
1778
1779 const Pipeline *node_pipeline = n->pipeline();
1780
1781 uint instruction_count = node_pipeline->instructionCount();
1782 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1783 instruction_count = 0;
1784 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1785 instruction_count++;
1786
1787 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1788 #ifndef PRODUCT
1789 if (_cfg->C->trace_opto_output())
1790 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1791 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1792 #endif
1793 return (false);
1794 }
1795
1796 // Don't allow non-machine nodes to be handled this way
1797 if (!n->is_Mach() && instruction_count == 0)
1798 return (false);
1799
1800 // See if there is any overlap
1801 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1802
1803 if (delay > 0) {
1804 #ifndef PRODUCT
1805 if (_cfg->C->trace_opto_output())
1806 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1807 #endif
1808 return false;
1809 }
1810
1811 #ifndef PRODUCT
1812 if (_cfg->C->trace_opto_output())
1813 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1814 #endif
1815
1816 return true;
1817 }
1818
1819 Node * Scheduling::ChooseNodeToBundle() {
1820 uint siz = _available.size();
1821
1822 if (siz == 0) {
1823
1824 #ifndef PRODUCT
1825 if (_cfg->C->trace_opto_output())
1826 tty->print("# ChooseNodeToBundle: NULL\n");
1827 #endif
1828 return (NULL);
1829 }
1830
1831 // Fast path, if only 1 instruction in the bundle
1832 if (siz == 1) {
1833 #ifndef PRODUCT
1834 if (_cfg->C->trace_opto_output()) {
1835 tty->print("# ChooseNodeToBundle (only 1): ");
1836 _available[0]->dump();
1837 }
1838 #endif
1839 return (_available[0]);
1840 }
1841
1842 // Don't bother, if the bundle is already full
1843 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1844 for ( uint i = 0; i < siz; i++ ) {
1845 Node *n = _available[i];
1846
1847 // Skip projections, we'll handle them another way
1848 if (n->is_Proj())
1849 continue;
1850
1851 // This presupposed that instructions are inserted into the
1852 // available list in a legality order; i.e. instructions that
1853 // must be inserted first are at the head of the list
1854 if (NodeFitsInBundle(n)) {
1855 #ifndef PRODUCT
1856 if (_cfg->C->trace_opto_output()) {
1857 tty->print("# ChooseNodeToBundle: ");
1858 n->dump();
1859 }
1860 #endif
1861 return (n);
1862 }
1863 }
1864 }
1865
1866 // Nothing fits in this bundle, choose the highest priority
1867 #ifndef PRODUCT
1868 if (_cfg->C->trace_opto_output()) {
1869 tty->print("# ChooseNodeToBundle: ");
1870 _available[0]->dump();
1871 }
1872 #endif
1873
1874 return _available[0];
1875 }
1876
1877 //------------------------------AddNodeToAvailableList-------------------------
1878 void Scheduling::AddNodeToAvailableList(Node *n) {
1879 assert( !n->is_Proj(), "projections never directly made available" );
1880 #ifndef PRODUCT
1881 if (_cfg->C->trace_opto_output()) {
1882 tty->print("# AddNodeToAvailableList: ");
1883 n->dump();
1884 }
1885 #endif
1886
1887 int latency = _current_latency[n->_idx];
1888
1889 // Insert in latency order (insertion sort)
1890 uint i;
1891 for ( i=0; i < _available.size(); i++ )
1892 if (_current_latency[_available[i]->_idx] > latency)
1893 break;
1894
1895 // Special Check for compares following branches
1896 if( n->is_Mach() && _scheduled.size() > 0 ) {
1897 int op = n->as_Mach()->ideal_Opcode();
1898 Node *last = _scheduled[0];
1899 if( last->is_MachIf() && last->in(1) == n &&
1900 ( op == Op_CmpI ||
1901 op == Op_CmpU ||
1902 op == Op_CmpP ||
1903 op == Op_CmpF ||
1904 op == Op_CmpD ||
1905 op == Op_CmpL ) ) {
1906
1907 // Recalculate position, moving to front of same latency
1908 for ( i=0 ; i < _available.size(); i++ )
1909 if (_current_latency[_available[i]->_idx] >= latency)
1910 break;
1911 }
1912 }
1913
1914 // Insert the node in the available list
1915 _available.insert(i, n);
1916
1917 #ifndef PRODUCT
1918 if (_cfg->C->trace_opto_output())
1919 dump_available();
1920 #endif
1921 }
1922
1923 //------------------------------DecrementUseCounts-----------------------------
1924 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1925 for ( uint i=0; i < n->len(); i++ ) {
1926 Node *def = n->in(i);
1927 if (!def) continue;
1928 if( def->is_Proj() ) // If this is a machine projection, then
1929 def = def->in(0); // propagate usage thru to the base instruction
1930
1931 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1932 continue;
1933
1934 // Compute the latency
1935 uint l = _bundle_cycle_number + n->latency(i);
1936 if (_current_latency[def->_idx] < l)
1937 _current_latency[def->_idx] = l;
1938
1939 // If this does not have uses then schedule it
1940 if ((--_uses[def->_idx]) == 0)
1941 AddNodeToAvailableList(def);
1942 }
1943 }
1944
1945 //------------------------------AddNodeToBundle--------------------------------
1946 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1947 #ifndef PRODUCT
1948 if (_cfg->C->trace_opto_output()) {
1949 tty->print("# AddNodeToBundle: ");
1950 n->dump();
1951 }
1952 #endif
1953
1954 // Remove this from the available list
1955 uint i;
1956 for (i = 0; i < _available.size(); i++)
1957 if (_available[i] == n)
1958 break;
1959 assert(i < _available.size(), "entry in _available list not found");
1960 _available.remove(i);
1961
1962 // See if this fits in the current bundle
1963 const Pipeline *node_pipeline = n->pipeline();
1964 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1965
1966 // Check for instructions to be placed in the delay slot. We
1967 // do this before we actually schedule the current instruction,
1968 // because the delay slot follows the current instruction.
1969 if (Pipeline::_branch_has_delay_slot &&
1970 node_pipeline->hasBranchDelay() &&
1971 !_unconditional_delay_slot) {
1972
1973 uint siz = _available.size();
1974
1975 // Conditional branches can support an instruction that
1976 // is unconditionally executed and not dependent by the
1977 // branch, OR a conditionally executed instruction if
1978 // the branch is taken. In practice, this means that
1979 // the first instruction at the branch target is
1980 // copied to the delay slot, and the branch goes to
1981 // the instruction after that at the branch target
1982 if ( n->is_Mach() && n->is_Branch() ) {
1983
1984 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1985 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1986
1987 #ifndef PRODUCT
1988 _branches++;
1989 #endif
1990
1991 // At least 1 instruction is on the available list
1992 // that is not dependent on the branch
1993 for (uint i = 0; i < siz; i++) {
1994 Node *d = _available[i];
1995 const Pipeline *avail_pipeline = d->pipeline();
1996
1997 // Don't allow safepoints in the branch shadow, that will
1998 // cause a number of difficulties
1999 if ( avail_pipeline->instructionCount() == 1 &&
2000 !avail_pipeline->hasMultipleBundles() &&
2001 !avail_pipeline->hasBranchDelay() &&
2002 Pipeline::instr_has_unit_size() &&
2003 d->size(_regalloc) == Pipeline::instr_unit_size() &&
2004 NodeFitsInBundle(d) &&
2005 !node_bundling(d)->used_in_delay()) {
2006
2007 if (d->is_Mach() && !d->is_MachSafePoint()) {
2008 // A node that fits in the delay slot was found, so we need to
2009 // set the appropriate bits in the bundle pipeline information so
2010 // that it correctly indicates resource usage. Later, when we
2011 // attempt to add this instruction to the bundle, we will skip
2012 // setting the resource usage.
2013 _unconditional_delay_slot = d;
2014 node_bundling(n)->set_use_unconditional_delay();
2015 node_bundling(d)->set_used_in_unconditional_delay();
2016 _bundle_use.add_usage(avail_pipeline->resourceUse());
2017 _current_latency[d->_idx] = _bundle_cycle_number;
2018 _next_node = d;
2019 ++_bundle_instr_count;
2020 #ifndef PRODUCT
2021 _unconditional_delays++;
2022 #endif
2023 break;
2024 }
2025 }
2026 }
2027 }
2028
2029 // No delay slot, add a nop to the usage
2030 if (!_unconditional_delay_slot) {
2031 // See if adding an instruction in the delay slot will overflow
2032 // the bundle.
2033 if (!NodeFitsInBundle(_nop)) {
2034 #ifndef PRODUCT
2035 if (_cfg->C->trace_opto_output())
2036 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
2037 #endif
2038 step(1);
2039 }
2040
2041 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
2042 _next_node = _nop;
2043 ++_bundle_instr_count;
2044 }
2045
2046 // See if the instruction in the delay slot requires a
2047 // step of the bundles
2048 if (!NodeFitsInBundle(n)) {
2049 #ifndef PRODUCT
2050 if (_cfg->C->trace_opto_output())
2051 tty->print("# *** STEP(branch won't fit) ***\n");
2052 #endif
2053 // Update the state information
2054 _bundle_instr_count = 0;
2055 _bundle_cycle_number += 1;
2056 _bundle_use.step(1);
2057 }
2058 }
2059
2060 // Get the number of instructions
2061 uint instruction_count = node_pipeline->instructionCount();
2062 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2063 instruction_count = 0;
2064
2065 // Compute the latency information
2066 uint delay = 0;
2067
2068 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2069 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2070 if (relative_latency < 0)
2071 relative_latency = 0;
2072
2073 delay = _bundle_use.full_latency(relative_latency, node_usage);
2074
2075 // Does not fit in this bundle, start a new one
2076 if (delay > 0) {
2077 step(delay);
2078
2079 #ifndef PRODUCT
2080 if (_cfg->C->trace_opto_output())
2081 tty->print("# *** STEP(%d) ***\n", delay);
2082 #endif
2083 }
2084 }
2085
2086 // If this was placed in the delay slot, ignore it
2087 if (n != _unconditional_delay_slot) {
2088
2089 if (delay == 0) {
2090 if (node_pipeline->hasMultipleBundles()) {
2091 #ifndef PRODUCT
2092 if (_cfg->C->trace_opto_output())
2093 tty->print("# *** STEP(multiple instructions) ***\n");
2094 #endif
2095 step(1);
2096 }
2097
2098 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2099 #ifndef PRODUCT
2100 if (_cfg->C->trace_opto_output())
2101 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2102 instruction_count + _bundle_instr_count,
2103 Pipeline::_max_instrs_per_cycle);
2104 #endif
2105 step(1);
2106 }
2107 }
2108
2109 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2110 _bundle_instr_count++;
2111
2112 // Set the node's latency
2113 _current_latency[n->_idx] = _bundle_cycle_number;
2114
2115 // Now merge the functional unit information
2116 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2117 _bundle_use.add_usage(node_usage);
2118
2119 // Increment the number of instructions in this bundle
2120 _bundle_instr_count += instruction_count;
2121
2122 // Remember this node for later
2123 if (n->is_Mach())
2124 _next_node = n;
2125 }
2126
2127 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2128 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2129 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2130 // into the block. All other scheduled nodes get put in the schedule here.
2131 int op = n->Opcode();
2132 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2133 (op != Op_Node && // Not an unused antidepedence node and
2134 // not an unallocated boxlock
2135 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2136
2137 // Push any trailing projections
2138 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2139 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2140 Node *foi = n->fast_out(i);
2141 if( foi->is_Proj() )
2142 _scheduled.push(foi);
2143 }
2144 }
2145
2146 // Put the instruction in the schedule list
2147 _scheduled.push(n);
2148 }
2149
2150 #ifndef PRODUCT
2151 if (_cfg->C->trace_opto_output())
2152 dump_available();
2153 #endif
2154
2155 // Walk all the definitions, decrementing use counts, and
2156 // if a definition has a 0 use count, place it in the available list.
2157 DecrementUseCounts(n,bb);
2158 }
2159
2160 //------------------------------ComputeUseCount--------------------------------
2161 // This method sets the use count within a basic block. We will ignore all
2162 // uses outside the current basic block. As we are doing a backwards walk,
2163 // any node we reach that has a use count of 0 may be scheduled. This also
2164 // avoids the problem of cyclic references from phi nodes, as long as phi
2165 // nodes are at the front of the basic block. This method also initializes
2166 // the available list to the set of instructions that have no uses within this
2167 // basic block.
2168 void Scheduling::ComputeUseCount(const Block *bb) {
2169 #ifndef PRODUCT
2170 if (_cfg->C->trace_opto_output())
2171 tty->print("# -> ComputeUseCount\n");
2172 #endif
2173
2174 // Clear the list of available and scheduled instructions, just in case
2175 _available.clear();
2176 _scheduled.clear();
2177
2178 // No delay slot specified
2179 _unconditional_delay_slot = NULL;
2180
2181 #ifdef ASSERT
2182 for( uint i=0; i < bb->_nodes.size(); i++ )
2183 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2184 #endif
2185
2186 // Force the _uses count to never go to zero for unscheduable pieces
2187 // of the block
2188 for( uint k = 0; k < _bb_start; k++ )
2189 _uses[bb->_nodes[k]->_idx] = 1;
2190 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2191 _uses[bb->_nodes[l]->_idx] = 1;
2192
2193 // Iterate backwards over the instructions in the block. Don't count the
2194 // branch projections at end or the block header instructions.
2195 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2196 Node *n = bb->_nodes[j];
2197 if( n->is_Proj() ) continue; // Projections handled another way
2198
2199 // Account for all uses
2200 for ( uint k = 0; k < n->len(); k++ ) {
2201 Node *inp = n->in(k);
2202 if (!inp) continue;
2203 assert(inp != n, "no cycles allowed" );
2204 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2205 if( inp->is_Proj() ) // Skip through Proj's
2206 inp = inp->in(0);
2207 ++_uses[inp->_idx]; // Count 1 block-local use
2208 }
2209 }
2210
2211 // If this instruction has a 0 use count, then it is available
2212 if (!_uses[n->_idx]) {
2213 _current_latency[n->_idx] = _bundle_cycle_number;
2214 AddNodeToAvailableList(n);
2215 }
2216
2217 #ifndef PRODUCT
2218 if (_cfg->C->trace_opto_output()) {
2219 tty->print("# uses: %3d: ", _uses[n->_idx]);
2220 n->dump();
2221 }
2222 #endif
2223 }
2224
2225 #ifndef PRODUCT
2226 if (_cfg->C->trace_opto_output())
2227 tty->print("# <- ComputeUseCount\n");
2228 #endif
2229 }
2230
2231 // This routine performs scheduling on each basic block in reverse order,
2232 // using instruction latencies and taking into account function unit
2233 // availability.
2234 void Scheduling::DoScheduling() {
2235 #ifndef PRODUCT
2236 if (_cfg->C->trace_opto_output())
2237 tty->print("# -> DoScheduling\n");
2238 #endif
2239
2240 Block *succ_bb = NULL;
2241 Block *bb;
2242
2243 // Walk over all the basic blocks in reverse order
2244 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2245 bb = _cfg->_blocks[i];
2246
2247 #ifndef PRODUCT
2248 if (_cfg->C->trace_opto_output()) {
2249 tty->print("# Schedule BB#%03d (initial)\n", i);
2250 for (uint j = 0; j < bb->_nodes.size(); j++)
2251 bb->_nodes[j]->dump();
2252 }
2253 #endif
2254
2255 // On the head node, skip processing
2256 if( bb == _cfg->_broot )
2257 continue;
2258
2259 // Skip empty, connector blocks
2260 if (bb->is_connector())
2261 continue;
2262
2263 // If the following block is not the sole successor of
2264 // this one, then reset the pipeline information
2265 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2266 #ifndef PRODUCT
2267 if (_cfg->C->trace_opto_output()) {
2268 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2269 _next_node->_idx, _bundle_instr_count);
2270 }
2271 #endif
2272 step_and_clear();
2273 }
2274
2275 // Leave untouched the starting instruction, any Phis, a CreateEx node
2276 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2277 _bb_end = bb->_nodes.size()-1;
2278 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2279 Node *n = bb->_nodes[_bb_start];
2280 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2281 // Also, MachIdealNodes do not get scheduled
2282 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2283 MachNode *mach = n->as_Mach();
2284 int iop = mach->ideal_Opcode();
2285 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2286 if( iop == Op_Con ) continue; // Do not schedule Top
2287 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2288 mach->pipeline() == MachNode::pipeline_class() &&
2289 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2290 continue;
2291 break; // Funny loop structure to be sure...
2292 }
2293 // Compute last "interesting" instruction in block - last instruction we
2294 // might schedule. _bb_end points just after last schedulable inst. We
2295 // normally schedule conditional branches (despite them being forced last
2296 // in the block), because they have delay slots we can fill. Calls all
2297 // have their delay slots filled in the template expansions, so we don't
2298 // bother scheduling them.
2299 Node *last = bb->_nodes[_bb_end];
2300 if( last->is_Catch() ||
2301 // Exclude unreachable path case when Halt node is in a separate block.
2302 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2303 // There must be a prior call. Skip it.
2304 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2305 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2306 }
2307 } else if( last->is_MachNullCheck() ) {
2308 // Backup so the last null-checked memory instruction is
2309 // outside the schedulable range. Skip over the nullcheck,
2310 // projection, and the memory nodes.
2311 Node *mem = last->in(1);
2312 do {
2313 _bb_end--;
2314 } while (mem != bb->_nodes[_bb_end]);
2315 } else {
2316 // Set _bb_end to point after last schedulable inst.
2317 _bb_end++;
2318 }
2319
2320 assert( _bb_start <= _bb_end, "inverted block ends" );
2321
2322 // Compute the register antidependencies for the basic block
2323 ComputeRegisterAntidependencies(bb);
2324 if (_cfg->C->failing()) return; // too many D-U pinch points
2325
2326 // Compute intra-bb latencies for the nodes
2327 ComputeLocalLatenciesForward(bb);
2328
2329 // Compute the usage within the block, and set the list of all nodes
2330 // in the block that have no uses within the block.
2331 ComputeUseCount(bb);
2332
2333 // Schedule the remaining instructions in the block
2334 while ( _available.size() > 0 ) {
2335 Node *n = ChooseNodeToBundle();
2336 AddNodeToBundle(n,bb);
2337 }
2338
2339 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2340 #ifdef ASSERT
2341 for( uint l = _bb_start; l < _bb_end; l++ ) {
2342 Node *n = bb->_nodes[l];
2343 uint m;
2344 for( m = 0; m < _bb_end-_bb_start; m++ )
2345 if( _scheduled[m] == n )
2346 break;
2347 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2348 }
2349 #endif
2350
2351 // Now copy the instructions (in reverse order) back to the block
2352 for ( uint k = _bb_start; k < _bb_end; k++ )
2353 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2354
2355 #ifndef PRODUCT
2356 if (_cfg->C->trace_opto_output()) {
2357 tty->print("# Schedule BB#%03d (final)\n", i);
2358 uint current = 0;
2359 for (uint j = 0; j < bb->_nodes.size(); j++) {
2360 Node *n = bb->_nodes[j];
2361 if( valid_bundle_info(n) ) {
2362 Bundle *bundle = node_bundling(n);
2363 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2364 tty->print("*** Bundle: ");
2365 bundle->dump();
2366 }
2367 n->dump();
2368 }
2369 }
2370 }
2371 #endif
2372 #ifdef ASSERT
2373 verify_good_schedule(bb,"after block local scheduling");
2374 #endif
2375 }
2376
2377 #ifndef PRODUCT
2378 if (_cfg->C->trace_opto_output())
2379 tty->print("# <- DoScheduling\n");
2380 #endif
2381
2382 // Record final node-bundling array location
2383 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2384
2385 } // end DoScheduling
2386
2387 //------------------------------verify_good_schedule---------------------------
2388 // Verify that no live-range used in the block is killed in the block by a
2389 // wrong DEF. This doesn't verify live-ranges that span blocks.
2390
2391 // Check for edge existence. Used to avoid adding redundant precedence edges.
2392 static bool edge_from_to( Node *from, Node *to ) {
2393 for( uint i=0; i<from->len(); i++ )
2394 if( from->in(i) == to )
2395 return true;
2396 return false;
2397 }
2398
2399 #ifdef ASSERT
2400 //------------------------------verify_do_def----------------------------------
2401 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2402 // Check for bad kills
2403 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2404 Node *prior_use = _reg_node[def];
2405 if( prior_use && !edge_from_to(prior_use,n) ) {
2406 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2407 n->dump();
2408 tty->print_cr("...");
2409 prior_use->dump();
2410 assert_msg(edge_from_to(prior_use,n),msg);
2411 }
2412 _reg_node.map(def,NULL); // Kill live USEs
2413 }
2414 }
2415
2416 //------------------------------verify_good_schedule---------------------------
2417 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2418
2419 // Zap to something reasonable for the verify code
2420 _reg_node.clear();
2421
2422 // Walk over the block backwards. Check to make sure each DEF doesn't
2423 // kill a live value (other than the one it's supposed to). Add each
2424 // USE to the live set.
2425 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2426 Node *n = b->_nodes[i];
2427 int n_op = n->Opcode();
2428 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2429 // Fat-proj kills a slew of registers
2430 RegMask rm = n->out_RegMask();// Make local copy
2431 while( rm.is_NotEmpty() ) {
2432 OptoReg::Name kill = rm.find_first_elem();
2433 rm.Remove(kill);
2434 verify_do_def( n, kill, msg );
2435 }
2436 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2437 // Get DEF'd registers the normal way
2438 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2439 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2440 }
2441
2442 // Now make all USEs live
2443 for( uint i=1; i<n->req(); i++ ) {
2444 Node *def = n->in(i);
2445 assert(def != 0, "input edge required");
2446 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2447 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2448 if( OptoReg::is_valid(reg_lo) ) {
2449 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2450 _reg_node.map(reg_lo,n);
2451 }
2452 if( OptoReg::is_valid(reg_hi) ) {
2453 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2454 _reg_node.map(reg_hi,n);
2455 }
2456 }
2457
2458 }
2459
2460 // Zap to something reasonable for the Antidependence code
2461 _reg_node.clear();
2462 }
2463 #endif
2464
2465 // Conditionally add precedence edges. Avoid putting edges on Projs.
2466 static void add_prec_edge_from_to( Node *from, Node *to ) {
2467 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2468 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2469 from = from->in(0);
2470 }
2471 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2472 !edge_from_to( from, to ) ) // Avoid duplicate edge
2473 from->add_prec(to);
2474 }
2475
2476 //------------------------------anti_do_def------------------------------------
2477 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2478 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2479 return;
2480
2481 Node *pinch = _reg_node[def_reg]; // Get pinch point
2482 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2483 is_def ) { // Check for a true def (not a kill)
2484 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2485 return;
2486 }
2487
2488 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2489 debug_only( def = (Node*)0xdeadbeef; )
2490
2491 // After some number of kills there _may_ be a later def
2492 Node *later_def = NULL;
2493
2494 // Finding a kill requires a real pinch-point.
2495 // Check for not already having a pinch-point.
2496 // Pinch points are Op_Node's.
2497 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2498 later_def = pinch; // Must be def/kill as optimistic pinch-point
2499 if ( _pinch_free_list.size() > 0) {
2500 pinch = _pinch_free_list.pop();
2501 } else {
2502 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2503 }
2504 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2505 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2506 return;
2507 }
2508 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2509 _reg_node.map(def_reg,pinch); // Record pinch-point
2510 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2511 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2512 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2513 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2514 later_def = NULL; // and no later def
2515 }
2516 pinch->set_req(0,later_def); // Hook later def so we can find it
2517 } else { // Else have valid pinch point
2518 if( pinch->in(0) ) // If there is a later-def
2519 later_def = pinch->in(0); // Get it
2520 }
2521
2522 // Add output-dependence edge from later def to kill
2523 if( later_def ) // If there is some original def
2524 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2525
2526 // See if current kill is also a use, and so is forced to be the pinch-point.
2527 if( pinch->Opcode() == Op_Node ) {
2528 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2529 for( uint i=1; i<uses->req(); i++ ) {
2530 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2531 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2532 // Yes, found a use/kill pinch-point
2533 pinch->set_req(0,NULL); //
2534 pinch->replace_by(kill); // Move anti-dep edges up
2535 pinch = kill;
2536 _reg_node.map(def_reg,pinch);
2537 return;
2538 }
2539 }
2540 }
2541
2542 // Add edge from kill to pinch-point
2543 add_prec_edge_from_to(kill,pinch);
2544 }
2545
2546 //------------------------------anti_do_use------------------------------------
2547 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2548 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2549 return;
2550 Node *pinch = _reg_node[use_reg]; // Get pinch point
2551 // Check for no later def_reg/kill in block
2552 if( pinch && _bbs[pinch->_idx] == b &&
2553 // Use has to be block-local as well
2554 _bbs[use->_idx] == b ) {
2555 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2556 pinch->req() == 1 ) { // pinch not yet in block?
2557 pinch->del_req(0); // yank pointer to later-def, also set flag
2558 // Insert the pinch-point in the block just after the last use
2559 b->_nodes.insert(b->find_node(use)+1,pinch);
2560 _bb_end++; // Increase size scheduled region in block
2561 }
2562
2563 add_prec_edge_from_to(pinch,use);
2564 }
2565 }
2566
2567 //------------------------------ComputeRegisterAntidependences-----------------
2568 // We insert antidependences between the reads and following write of
2569 // allocated registers to prevent illegal code motion. Hopefully, the
2570 // number of added references should be fairly small, especially as we
2571 // are only adding references within the current basic block.
2572 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2573
2574 #ifdef ASSERT
2575 verify_good_schedule(b,"before block local scheduling");
2576 #endif
2577
2578 // A valid schedule, for each register independently, is an endless cycle
2579 // of: a def, then some uses (connected to the def by true dependencies),
2580 // then some kills (defs with no uses), finally the cycle repeats with a new
2581 // def. The uses are allowed to float relative to each other, as are the
2582 // kills. No use is allowed to slide past a kill (or def). This requires
2583 // antidependencies between all uses of a single def and all kills that
2584 // follow, up to the next def. More edges are redundant, because later defs
2585 // & kills are already serialized with true or antidependencies. To keep
2586 // the edge count down, we add a 'pinch point' node if there's more than
2587 // one use or more than one kill/def.
2588
2589 // We add dependencies in one bottom-up pass.
2590
2591 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2592
2593 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2594 // register. If not, we record the DEF/KILL in _reg_node, the
2595 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2596 // "pinch point", a new Node that's in the graph but not in the block.
2597 // We put edges from the prior and current DEF/KILLs to the pinch point.
2598 // We put the pinch point in _reg_node. If there's already a pinch point
2599 // we merely add an edge from the current DEF/KILL to the pinch point.
2600
2601 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2602 // put an edge from the pinch point to the USE.
2603
2604 // To be expedient, the _reg_node array is pre-allocated for the whole
2605 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2606 // or a valid def/kill/pinch-point, or a leftover node from some prior
2607 // block. Leftover node from some prior block is treated like a NULL (no
2608 // prior def, so no anti-dependence needed). Valid def is distinguished by
2609 // it being in the current block.
2610 bool fat_proj_seen = false;
2611 uint last_safept = _bb_end-1;
2612 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2613 Node* last_safept_node = end_node;
2614 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2615 Node *n = b->_nodes[i];
2616 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2617 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2618 // Fat-proj kills a slew of registers
2619 // This can add edges to 'n' and obscure whether or not it was a def,
2620 // hence the is_def flag.
2621 fat_proj_seen = true;
2622 RegMask rm = n->out_RegMask();// Make local copy
2623 while( rm.is_NotEmpty() ) {
2624 OptoReg::Name kill = rm.find_first_elem();
2625 rm.Remove(kill);
2626 anti_do_def( b, n, kill, is_def );
2627 }
2628 } else {
2629 // Get DEF'd registers the normal way
2630 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2631 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2632 }
2633
2634 // Check each register used by this instruction for a following DEF/KILL
2635 // that must occur afterward and requires an anti-dependence edge.
2636 for( uint j=0; j<n->req(); j++ ) {
2637 Node *def = n->in(j);
2638 if( def ) {
2639 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2640 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2641 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2642 }
2643 }
2644 // Do not allow defs of new derived values to float above GC
2645 // points unless the base is definitely available at the GC point.
2646
2647 Node *m = b->_nodes[i];
2648
2649 // Add precedence edge from following safepoint to use of derived pointer
2650 if( last_safept_node != end_node &&
2651 m != last_safept_node) {
2652 for (uint k = 1; k < m->req(); k++) {
2653 const Type *t = m->in(k)->bottom_type();
2654 if( t->isa_oop_ptr() &&
2655 t->is_ptr()->offset() != 0 ) {
2656 last_safept_node->add_prec( m );
2657 break;
2658 }
2659 }
2660 }
2661
2662 if( n->jvms() ) { // Precedence edge from derived to safept
2663 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2664 if( b->_nodes[last_safept] != last_safept_node ) {
2665 last_safept = b->find_node(last_safept_node);
2666 }
2667 for( uint j=last_safept; j > i; j-- ) {
2668 Node *mach = b->_nodes[j];
2669 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2670 mach->add_prec( n );
2671 }
2672 last_safept = i;
2673 last_safept_node = m;
2674 }
2675 }
2676
2677 if (fat_proj_seen) {
2678 // Garbage collect pinch nodes that were not consumed.
2679 // They are usually created by a fat kill MachProj for a call.
2680 garbage_collect_pinch_nodes();
2681 }
2682 }
2683
2684 //------------------------------garbage_collect_pinch_nodes-------------------------------
2685
2686 // Garbage collect pinch nodes for reuse by other blocks.
2687 //
2688 // The block scheduler's insertion of anti-dependence
2689 // edges creates many pinch nodes when the block contains
2690 // 2 or more Calls. A pinch node is used to prevent a
2691 // combinatorial explosion of edges. If a set of kills for a
2692 // register is anti-dependent on a set of uses (or defs), rather
2693 // than adding an edge in the graph between each pair of kill
2694 // and use (or def), a pinch is inserted between them:
2695 //
2696 // use1 use2 use3
2697 // \ | /
2698 // \ | /
2699 // pinch
2700 // / | \
2701 // / | \
2702 // kill1 kill2 kill3
2703 //
2704 // One pinch node is created per register killed when
2705 // the second call is encountered during a backwards pass
2706 // over the block. Most of these pinch nodes are never
2707 // wired into the graph because the register is never
2708 // used or def'ed in the block.
2709 //
2710 void Scheduling::garbage_collect_pinch_nodes() {
2711 #ifndef PRODUCT
2712 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2713 #endif
2714 int trace_cnt = 0;
2715 for (uint k = 0; k < _reg_node.Size(); k++) {
2716 Node* pinch = _reg_node[k];
2717 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2718 // no predecence input edges
2719 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2720 cleanup_pinch(pinch);
2721 _pinch_free_list.push(pinch);
2722 _reg_node.map(k, NULL);
2723 #ifndef PRODUCT
2724 if (_cfg->C->trace_opto_output()) {
2725 trace_cnt++;
2726 if (trace_cnt > 40) {
2727 tty->print("\n");
2728 trace_cnt = 0;
2729 }
2730 tty->print(" %d", pinch->_idx);
2731 }
2732 #endif
2733 }
2734 }
2735 #ifndef PRODUCT
2736 if (_cfg->C->trace_opto_output()) tty->print("\n");
2737 #endif
2738 }
2739
2740 // Clean up a pinch node for reuse.
2741 void Scheduling::cleanup_pinch( Node *pinch ) {
2742 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2743
2744 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2745 Node* use = pinch->last_out(i);
2746 uint uses_found = 0;
2747 for (uint j = use->req(); j < use->len(); j++) {
2748 if (use->in(j) == pinch) {
2749 use->rm_prec(j);
2750 uses_found++;
2751 }
2752 }
2753 assert(uses_found > 0, "must be a precedence edge");
2754 i -= uses_found; // we deleted 1 or more copies of this edge
2755 }
2756 // May have a later_def entry
2757 pinch->set_req(0, NULL);
2758 }
2759
2760 //------------------------------print_statistics-------------------------------
2761 #ifndef PRODUCT
2762
2763 void Scheduling::dump_available() const {
2764 tty->print("#Availist ");
2765 for (uint i = 0; i < _available.size(); i++)
2766 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2767 tty->cr();
2768 }
2769
2770 // Print Scheduling Statistics
2771 void Scheduling::print_statistics() {
2772 // Print the size added by nops for bundling
2773 tty->print("Nops added %d bytes to total of %d bytes",
2774 _total_nop_size, _total_method_size);
2775 if (_total_method_size > 0)
2776 tty->print(", for %.2f%%",
2777 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2778 tty->print("\n");
2779
2780 // Print the number of branch shadows filled
2781 if (Pipeline::_branch_has_delay_slot) {
2782 tty->print("Of %d branches, %d had unconditional delay slots filled",
2783 _total_branches, _total_unconditional_delays);
2784 if (_total_branches > 0)
2785 tty->print(", for %.2f%%",
2786 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2787 tty->print("\n");
2788 }
2789
2790 uint total_instructions = 0, total_bundles = 0;
2791
2792 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2793 uint bundle_count = _total_instructions_per_bundle[i];
2794 total_instructions += bundle_count * i;
2795 total_bundles += bundle_count;
2796 }
2797
2798 if (total_bundles > 0)
2799 tty->print("Average ILP (excluding nops) is %.2f\n",
2800 ((double)total_instructions) / ((double)total_bundles));
2801 }
2802 #endif