48     AllocatePrefetchLines = 3; // Optimistic value
  49   assert( AllocatePrefetchLines > 0, "invalid value");
  50   if( AllocatePrefetchLines < 1 ) // set valid value in product VM
  51     AllocatePrefetchLines = 1; // Conservative value
  52 
  53   AllocatePrefetchDistance = allocate_prefetch_distance();
  54   AllocatePrefetchStyle    = allocate_prefetch_style();
  55 
  56   assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");
  57 
  58   UseSSE = 0; // Only on x86 and x64
  59 
  60   _supports_cx8               = has_v9();
  61 
  62   if (is_niagara1()) {
  63     // Indirect branch is the same cost as direct
  64     if (FLAG_IS_DEFAULT(UseInlineCaches)) {
  65       FLAG_SET_DEFAULT(UseInlineCaches, false);
  66     }
  67 #ifdef _LP64
  68     // Single issue niagara1 is slower for CompressedOops
  69     // but niagaras after that it's fine.
  70     if (!is_niagara1_plus()) {
  71       if (FLAG_IS_DEFAULT(UseCompressedOops)) {
  72         FLAG_SET_ERGO(bool, UseCompressedOops, false);
  73       }
  74     }
  75     // 32-bit oops don't make sense for the 64-bit VM on sparc
  76     // since the 32-bit VM has the same registers and smaller objects.
  77     Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes);
  78 #endif // _LP64
  79 #ifdef COMPILER2
  80     // Indirect branch is the same cost as direct
  81     if (FLAG_IS_DEFAULT(UseJumpTables)) {
  82       FLAG_SET_DEFAULT(UseJumpTables, true);
  83     }
  84     // Single-issue, so entry and loop tops are
  85     // aligned on a single instruction boundary
  86     if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) {
  87       FLAG_SET_DEFAULT(InteriorEntryAlignment, 4);
  88     }
  89     if (is_niagara1_plus()) {
  90       if (AllocatePrefetchStyle > 0 && FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
  91         // Use BIS instruction for allocation prefetch.
  92         FLAG_SET_DEFAULT(AllocatePrefetchStyle, 3);
  93         if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
  94           // Use smaller prefetch distance on N2 with BIS

  48     AllocatePrefetchLines = 3; // Optimistic value
  49   assert( AllocatePrefetchLines > 0, "invalid value");
  50   if( AllocatePrefetchLines < 1 ) // set valid value in product VM
  51     AllocatePrefetchLines = 1; // Conservative value
  52 
  53   AllocatePrefetchDistance = allocate_prefetch_distance();
  54   AllocatePrefetchStyle    = allocate_prefetch_style();
  55 
  56   assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");
  57 
  58   UseSSE = 0; // Only on x86 and x64
  59 
  60   _supports_cx8               = has_v9();
  61 
  62   if (is_niagara1()) {
  63     // Indirect branch is the same cost as direct
  64     if (FLAG_IS_DEFAULT(UseInlineCaches)) {
  65       FLAG_SET_DEFAULT(UseInlineCaches, false);
  66     }
  67 #ifdef _LP64







  68     // 32-bit oops don't make sense for the 64-bit VM on sparc
  69     // since the 32-bit VM has the same registers and smaller objects.
  70     Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes);
  71 #endif // _LP64
  72 #ifdef COMPILER2
  73     // Indirect branch is the same cost as direct
  74     if (FLAG_IS_DEFAULT(UseJumpTables)) {
  75       FLAG_SET_DEFAULT(UseJumpTables, true);
  76     }
  77     // Single-issue, so entry and loop tops are
  78     // aligned on a single instruction boundary
  79     if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) {
  80       FLAG_SET_DEFAULT(InteriorEntryAlignment, 4);
  81     }
  82     if (is_niagara1_plus()) {
  83       if (AllocatePrefetchStyle > 0 && FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
  84         // Use BIS instruction for allocation prefetch.
  85         FLAG_SET_DEFAULT(AllocatePrefetchStyle, 3);
  86         if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
  87           // Use smaller prefetch distance on N2 with BIS