src/cpu/x86/vm/x86_64.ad

*** 3177,3231 ****
      emit_opcode(cbuf, 0x0F);
      emit_opcode(cbuf, 0x95);
      emit_rm(cbuf, 0x3, 0x0, dstenc);
    %}
  
-   enc_class enc_cmpLTP(no_rcx_RegI p, no_rcx_RegI q, no_rcx_RegI y,
-                        rcx_RegI tmp)
-   %{
-     // cadd_cmpLT
  
-     int tmpReg = $tmp$$reg;
- 
-     int penc = $p$$reg;
-     int qenc = $q$$reg;
-     int yenc = $y$$reg;
- 
-     // subl $p,$q
-     if (penc < 8) {
-       if (qenc >= 8) {
-         emit_opcode(cbuf, Assembler::REX_B);
-       }
-     } else {
-       if (qenc < 8) {
-         emit_opcode(cbuf, Assembler::REX_R);
-       } else {
-         emit_opcode(cbuf, Assembler::REX_RB);
-       }
-     }
-     emit_opcode(cbuf, 0x2B);
-     emit_rm(cbuf, 0x3, penc & 7, qenc & 7);
- 
-     // sbbl $tmp, $tmp
-     emit_opcode(cbuf, 0x1B);
-     emit_rm(cbuf, 0x3, tmpReg, tmpReg);
- 
-     // andl $tmp, $y
-     if (yenc >= 8) {
-       emit_opcode(cbuf, Assembler::REX_B);
-     }
-     emit_opcode(cbuf, 0x23);
-     emit_rm(cbuf, 0x3, tmpReg, yenc & 7);
- 
-     // addl $p,$tmp
-     if (penc >= 8) {
-         emit_opcode(cbuf, Assembler::REX_R);
-     }
-     emit_opcode(cbuf, 0x03);
-     emit_rm(cbuf, 0x3, penc & 7, tmpReg);
-   %}
- 
    // Compare the lonogs and set -1, 0, or 1 into dst
    enc_class cmpl3_flag(rRegL src1, rRegL src2, rRegI dst)
    %{
      int src1enc = $src1$$reg;
      int src2enc = $src2$$reg;
--- 3177,3187 ----
*** 10204,10244 ****
    ins_encode(reg_opc_imm(dst, 0x1F));
    ins_pipe(ialu_reg);
  %}
  
  
! instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y,
!                          rRegI tmp,
!                          rFlagsReg cr)
  %{
    match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
    effect(TEMP tmp, KILL cr);
  
    ins_cost(400); // XXX
    format %{ "subl    $p, $q\t# cadd_cmpLTMask1\n\t"
              "sbbl    $tmp, $tmp\n\t"
              "andl    $tmp, $y\n\t"
              "addl    $p, $tmp" %}
!   ins_encode(enc_cmpLTP(p, q, y, tmp));
    ins_pipe(pipe_cmplt);
  %}
  
- /* If I enable this, I encourage spilling in the inner loop of compress.
- instruct cadd_cmpLTMask_mem( rRegI p, rRegI q, memory y, rRegI tmp, rFlagsReg cr )
- %{
-   match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q)));
-   effect( TEMP tmp, KILL cr );
-   ins_cost(400);
- 
-   format %{ "SUB    $p,$q\n\t"
-             "SBB    RCX,RCX\n\t"
-             "AND    RCX,$y\n\t"
-             "ADD    $p,RCX" %}
-   ins_encode( enc_cmpLTP_mem(p,q,y,tmp) );
- %}
- */
- 
  //---------- FP Instructions------------------------------------------------
  
  instruct cmpF_cc_reg(rFlagsRegU cr, regF src1, regF src2)
  %{
    match(Set cr (CmpF src1 src2));
--- 10160,10192 ----
    ins_encode(reg_opc_imm(dst, 0x1F));
    ins_pipe(ialu_reg);
  %}
  
  
! instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, rRegI tmp, rFlagsReg cr)
  %{
    match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
    effect(TEMP tmp, KILL cr);
  
    ins_cost(400); // XXX
    format %{ "subl    $p, $q\t# cadd_cmpLTMask1\n\t"
              "sbbl    $tmp, $tmp\n\t"
              "andl    $tmp, $y\n\t"
              "addl    $p, $tmp" %}
!   ins_encode %{
!     Register Rp = $p$$Register;
!     Register Rq = $q$$Register;
!     Register Ry = $y$$Register;
!     Register Rt = $tmp$$Register;
!     __ subl(Rp, Rq);
!     __ sbbl(Rt, Rt);
!     __ andl(Rt, Ry);
!     __ addl(Rp, Rt);
!   %}
    ins_pipe(pipe_cmplt);
  %}
  
  //---------- FP Instructions------------------------------------------------
  
  instruct cmpF_cc_reg(rFlagsRegU cr, regF src1, regF src2)
  %{
    match(Set cr (CmpF src1 src2));