src/cpu/sparc/vm/sparc.ad
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*** old/src/cpu/sparc/vm/sparc.ad Tue Jul 26 19:26:35 2011
--- new/src/cpu/sparc/vm/sparc.ad Tue Jul 26 19:26:33 2011
*** 3313,3323 ****
--- 3313,3322 ----
op_attrib op_cost(1); // Required cost attribute
//----------Instruction Attributes---------------------------------------------
ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute
ins_attrib ins_size(32); // Required size attribute (in bits)
ins_attrib ins_pc_relative(0); // Required PC Relative flag
ins_attrib ins_short_branch(0); // Required flag: is this instruction a
// non-matching short branch variant of some
// long branch?
//----------OPERANDS-----------------------------------------------------------
*** 9180,9190 ****
--- 9179,9188 ----
// Jump to base address + switch value
__ ld_ptr(table_reg, $switch_val$$Register, label_reg);
__ jmp(label_reg, G0);
__ delayed()->nop();
%}
ins_pc_relative(1);
ins_pipe(ialu_reg_reg);
%}
// Direct Branch. Use V8 version with longer range.
instruct branch(label labl) %{
*** 9197,9207 ****
--- 9195,9204 ----
ins_encode %{
Label* L = $labl$$label;
__ ba(*L);
__ delayed()->nop();
%}
ins_pc_relative(1);
ins_pipe(br);
%}
// Conditional Direct Branch
instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{
*** 9211,9221 ****
--- 9208,9217 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BP$cmp $icc,$labl" %}
// Prim = bits 24-22, Secnd = bits 31-30
ins_encode( enc_bp( labl, cmp, icc ) );
ins_pc_relative(1);
ins_pipe(br_cc);
%}
// Branch-on-register tests all 64 bits. We assume that values
// in 64-bit registers always remains zero or sign extended
*** 9228,9238 ****
--- 9224,9233 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BR$cmp $op1,$labl" %}
ins_encode( enc_bpr( labl, cmp, op1 ) );
ins_pc_relative(1);
ins_pipe(br_reg);
%}
instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{
match(If cmp (CmpP op1 null));
*** 9241,9251 ****
--- 9236,9245 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BR$cmp $op1,$labl" %}
ins_encode( enc_bpr( labl, cmp, op1 ) );
ins_pc_relative(1);
ins_pipe(br_reg);
%}
instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{
match(If cmp (CmpL op1 zero));
*** 9254,9264 ****
--- 9248,9257 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BR$cmp $op1,$labl" %}
ins_encode( enc_bpr( labl, cmp, op1 ) );
ins_pc_relative(1);
ins_pipe(br_reg);
%}
instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{
match(If cmp icc);
*** 9265,9275 ****
--- 9258,9267 ----
effect(USE labl);
format %{ "BP$cmp $icc,$labl" %}
// Prim = bits 24-22, Secnd = bits 31-30
ins_encode( enc_bp( labl, cmp, icc ) );
ins_pc_relative(1);
ins_pipe(br_cc);
%}
instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{
match(If cmp pcc);
*** 9284,9294 ****
--- 9276,9285 ----
cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn;
__ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L);
__ delayed()->nop();
%}
ins_pc_relative(1);
ins_pipe(br_cc);
%}
instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{
match(If cmp fcc);
*** 9303,9313 ****
--- 9294,9303 ----
cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn;
__ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L);
__ delayed()->nop();
%}
ins_pc_relative(1);
ins_pipe(br_fcc);
%}
instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{
match(CountedLoopEnd cmp icc);
*** 9316,9326 ****
--- 9306,9315 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BP$cmp $icc,$labl\t! Loop end" %}
// Prim = bits 24-22, Secnd = bits 31-30
ins_encode( enc_bp( labl, cmp, icc ) );
ins_pc_relative(1);
ins_pipe(br_cc);
%}
instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{
match(CountedLoopEnd cmp icc);
*** 9329,9339 ****
--- 9318,9327 ----
size(8);
ins_cost(BRANCH_COST);
format %{ "BP$cmp $icc,$labl\t! Loop end" %}
// Prim = bits 24-22, Secnd = bits 31-30
ins_encode( enc_bp( labl, cmp, icc ) );
ins_pc_relative(1);
ins_pipe(br_cc);
%}
// ============================================================================
// Long Compare
*** 9369,9379 ****
--- 9357,9366 ----
cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn;
__ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L);
__ delayed()->nop();
%}
ins_pc_relative(1);
ins_pipe(br_cc);
%}
// Manifest a CmpL3 result in an integer register. Very painful.
// This is the test to avoid.
*** 9497,9507 ****
--- 9484,9493 ----
size(8);
ins_cost(CALL_COST);
format %{ "CALL,static ; NOP ==> " %}
ins_encode( Java_Static_Call( meth ), call_epilog );
ins_pc_relative(1);
ins_pipe(simple_call);
%}
// Call Java Static Instruction (method handle version)
instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{
*** 9511,9521 ****
--- 9497,9506 ----
size(8);
ins_cost(CALL_COST);
format %{ "CALL,static/MethodHandle" %}
ins_encode(preserve_SP, Java_Static_Call(meth), restore_SP, call_epilog);
ins_pc_relative(1);
ins_pipe(simple_call);
%}
// Call Java Dynamic Instruction
instruct CallDynamicJavaDirect( method meth ) %{
*** 9524,9534 ****
--- 9509,9518 ----
ins_cost(CALL_COST);
format %{ "SET (empty),R_G5\n\t"
"CALL,dynamic ; NOP ==> " %}
ins_encode( Java_Dynamic_Call( meth ), call_epilog );
ins_pc_relative(1);
ins_pipe(call);
%}
// Call Runtime Instruction
instruct CallRuntimeDirect(method meth, l7RegP l7) %{
*** 9536,9546 ****
--- 9520,9529 ----
effect(USE meth, KILL l7);
ins_cost(CALL_COST);
format %{ "CALL,runtime" %}
ins_encode( Java_To_Runtime( meth ),
call_epilog, adjust_long_from_native_call );
ins_pc_relative(1);
ins_pipe(simple_call);
%}
// Call runtime without safepoint - same as CallRuntime
instruct CallLeafDirect(method meth, l7RegP l7) %{
*** 9549,9559 ****
--- 9532,9541 ----
ins_cost(CALL_COST);
format %{ "CALL,runtime leaf" %}
ins_encode( Java_To_Runtime( meth ),
call_epilog,
adjust_long_from_native_call );
ins_pc_relative(1);
ins_pipe(simple_call);
%}
// Call runtime without safepoint - same as CallLeaf
instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{
*** 9562,9572 ****
--- 9544,9553 ----
ins_cost(CALL_COST);
format %{ "CALL,runtime leaf nofp" %}
ins_encode( Java_To_Runtime( meth ),
call_epilog,
adjust_long_from_native_call );
ins_pc_relative(1);
ins_pipe(simple_call);
%}
// Tail Call; Jump from runtime stub to Java code.
// Also known as an 'interprocedural jump'.
src/cpu/sparc/vm/sparc.ad
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