src/cpu/sparc/vm/vm_version_sparc.cpp
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src/cpu/sparc/vm/vm_version_sparc.cpp

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  27 #include "memory/resourceArea.hpp"
  28 #include "runtime/java.hpp"
  29 #include "runtime/stubCodeGenerator.hpp"
  30 #include "vm_version_sparc.hpp"
  31 #ifdef TARGET_OS_FAMILY_linux
  32 # include "os_linux.inline.hpp"
  33 #endif
  34 #ifdef TARGET_OS_FAMILY_solaris
  35 # include "os_solaris.inline.hpp"
  36 #endif
  37 
  38 int VM_Version::_features = VM_Version::unknown_m;
  39 const char* VM_Version::_features_str = "";
  40 
  41 void VM_Version::initialize() {
  42   _features = determine_features();
  43   PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
  44   PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
  45   PrefetchFieldsAhead         = prefetch_fields_ahead();
  46 




  47   // Allocation prefetch settings
  48   intx cache_line_size = L1_data_cache_line_size();
  49   if( cache_line_size > AllocatePrefetchStepSize )
  50     AllocatePrefetchStepSize = cache_line_size;
  51   if( FLAG_IS_DEFAULT(AllocatePrefetchLines) )
  52     AllocatePrefetchLines = 3; // Optimistic value
  53   assert( AllocatePrefetchLines > 0, "invalid value");
  54   if( AllocatePrefetchLines < 1 ) // set valid value in product VM
  55     AllocatePrefetchLines = 1; // Conservative value



  56 
  57   AllocatePrefetchDistance = allocate_prefetch_distance();
  58   AllocatePrefetchStyle    = allocate_prefetch_style();
  59 
  60   assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");





  61 
  62   if (AllocatePrefetchStyle == 3 && !has_blk_init()) {
  63     warning("BIS instructions are not available on this CPU");
  64     FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
  65   }
  66 
  67   UseSSE = 0; // Only on x86 and x64
  68 
  69   _supports_cx8               = has_v9();
  70 
  71   if (is_niagara()) {
  72     // Indirect branch is the same cost as direct
  73     if (FLAG_IS_DEFAULT(UseInlineCaches)) {
  74       FLAG_SET_DEFAULT(UseInlineCaches, false);
  75     }
  76     // Align loops on a single instruction boundary.
  77     if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
  78       FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
  79     }
  80     // When using CMS, we cannot use memset() in BOT updates because


  82     // "phantom zeros" to concurrent readers. See 6948537.
  83     if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) {
  84       FLAG_SET_DEFAULT(UseMemSetInBOT, false);
  85     }
  86 #ifdef _LP64
  87     // 32-bit oops don't make sense for the 64-bit VM on sparc
  88     // since the 32-bit VM has the same registers and smaller objects.
  89     Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes);
  90 #endif // _LP64
  91 #ifdef COMPILER2
  92     // Indirect branch is the same cost as direct
  93     if (FLAG_IS_DEFAULT(UseJumpTables)) {
  94       FLAG_SET_DEFAULT(UseJumpTables, true);
  95     }
  96     // Single-issue, so entry and loop tops are
  97     // aligned on a single instruction boundary
  98     if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) {
  99       FLAG_SET_DEFAULT(InteriorEntryAlignment, 4);
 100     }
 101     if (is_niagara_plus()) {
 102       if (has_blk_init() && AllocatePrefetchStyle > 0 &&
 103           FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
 104         // Use BIS instruction for allocation prefetch.
 105         FLAG_SET_DEFAULT(AllocatePrefetchStyle, 3);



 106         if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
 107           // Use smaller prefetch distance on N2 with BIS
 108           FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64);
 109         }
 110       }










 111       if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
 112         // Use different prefetch distance without BIS
 113         FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256);
 114       }









 115     }

 116 #endif
 117   }
 118 
 119   // Use hardware population count instruction if available.
 120   if (has_hardware_popc()) {
 121     if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
 122       FLAG_SET_DEFAULT(UsePopCountInstruction, true);
 123     }
 124   } else if (UsePopCountInstruction) {
 125     warning("POPC instruction is not available on this CPU");
 126     FLAG_SET_DEFAULT(UsePopCountInstruction, false);
 127   }
 128 
 129   // T4 and newer Sparc cpus have new compare and branch instruction.
 130   if (has_cbcond()) {
 131     if (FLAG_IS_DEFAULT(UseCBCond)) {
 132       FLAG_SET_DEFAULT(UseCBCond, true);
 133     }
 134   } else if (UseCBCond) {
 135     warning("CBCOND instruction is not available on this CPU");


 168                (!has_hardware_div32() ? ", no-div32" : ""),
 169                (!has_hardware_fsmuld() ? ", no-fsmuld" : ""));
 170 
 171   // buf is started with ", " or is empty
 172   _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf);
 173 
 174   // UseVIS is set to the smallest of what hardware supports and what
 175   // the command line requires.  I.e., you cannot set UseVIS to 3 on
 176   // older UltraSparc which do not support it.
 177   if (UseVIS > 3) UseVIS=3;
 178   if (UseVIS < 0) UseVIS=0;
 179   if (!has_vis3()) // Drop to 2 if no VIS3 support
 180     UseVIS = MIN2((intx)2,UseVIS);
 181   if (!has_vis2()) // Drop to 1 if no VIS2 support
 182     UseVIS = MIN2((intx)1,UseVIS);
 183   if (!has_vis1()) // Drop to 0 if no VIS1 support
 184     UseVIS = 0;
 185 
 186 #ifndef PRODUCT
 187   if (PrintMiscellaneous && Verbose) {
 188     tty->print("Allocation: ");
 189     if (AllocatePrefetchStyle <= 0) {
 190       tty->print_cr("no prefetching");
 191     } else {






 192       if (AllocatePrefetchLines > 1) {
 193         tty->print_cr("PREFETCH %d, %d lines of size %d bytes", AllocatePrefetchDistance, AllocatePrefetchLines, AllocatePrefetchStepSize);
 194       } else {
 195         tty->print_cr("PREFETCH %d, one line", AllocatePrefetchDistance);
 196       }
 197     }
 198     if (PrefetchCopyIntervalInBytes > 0) {
 199       tty->print_cr("PrefetchCopyIntervalInBytes %d", PrefetchCopyIntervalInBytes);
 200     }
 201     if (PrefetchScanIntervalInBytes > 0) {
 202       tty->print_cr("PrefetchScanIntervalInBytes %d", PrefetchScanIntervalInBytes);
 203     }
 204     if (PrefetchFieldsAhead > 0) {
 205       tty->print_cr("PrefetchFieldsAhead %d", PrefetchFieldsAhead);
 206     }
 207   }
 208 #endif // PRODUCT
 209 }
 210 
 211 void VM_Version::print_features() {
 212   tty->print_cr("Version:%s", cpu_features());
 213 }
 214 
 215 int VM_Version::determine_features() {




  27 #include "memory/resourceArea.hpp"
  28 #include "runtime/java.hpp"
  29 #include "runtime/stubCodeGenerator.hpp"
  30 #include "vm_version_sparc.hpp"
  31 #ifdef TARGET_OS_FAMILY_linux
  32 # include "os_linux.inline.hpp"
  33 #endif
  34 #ifdef TARGET_OS_FAMILY_solaris
  35 # include "os_solaris.inline.hpp"
  36 #endif
  37 
  38 int VM_Version::_features = VM_Version::unknown_m;
  39 const char* VM_Version::_features_str = "";
  40 
  41 void VM_Version::initialize() {
  42   _features = determine_features();
  43   PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
  44   PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
  45   PrefetchFieldsAhead         = prefetch_fields_ahead();
  46 
  47   assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 1, "invalid value");
  48   if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0;
  49   if( AllocatePrefetchInstr > 1 ) AllocatePrefetchInstr = 0;
  50 
  51   // Allocation prefetch settings
  52   intx cache_line_size = prefetch_data_size();
  53   if( cache_line_size > AllocatePrefetchStepSize )
  54     AllocatePrefetchStepSize = cache_line_size;
  55 
  56   assert(AllocatePrefetchLines > 0, "invalid value");

  57   if( AllocatePrefetchLines < 1 )     // set valid value in product VM
  58     AllocatePrefetchLines = 3;
  59   assert(AllocateInstancePrefetchLines > 0, "invalid value");
  60   if( AllocateInstancePrefetchLines < 1 ) // set valid value in product VM
  61     AllocateInstancePrefetchLines = 1;
  62 
  63   AllocatePrefetchDistance = allocate_prefetch_distance();
  64   AllocatePrefetchStyle    = allocate_prefetch_style();
  65 
  66   assert((AllocatePrefetchDistance % AllocatePrefetchStepSize) == 0 &&
  67          (AllocatePrefetchDistance > 0), "invalid value");
  68   if ((AllocatePrefetchDistance % AllocatePrefetchStepSize) != 0 ||
  69       (AllocatePrefetchDistance <= 0)) {
  70     AllocatePrefetchDistance = AllocatePrefetchStepSize;
  71   }
  72 
  73   if (AllocatePrefetchStyle == 3 && !has_blk_init()) {
  74     warning("BIS instructions are not available on this CPU");
  75     FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
  76   }
  77 
  78   UseSSE = 0; // Only on x86 and x64
  79 
  80   _supports_cx8               = has_v9();
  81 
  82   if (is_niagara()) {
  83     // Indirect branch is the same cost as direct
  84     if (FLAG_IS_DEFAULT(UseInlineCaches)) {
  85       FLAG_SET_DEFAULT(UseInlineCaches, false);
  86     }
  87     // Align loops on a single instruction boundary.
  88     if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
  89       FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
  90     }
  91     // When using CMS, we cannot use memset() in BOT updates because


  93     // "phantom zeros" to concurrent readers. See 6948537.
  94     if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) {
  95       FLAG_SET_DEFAULT(UseMemSetInBOT, false);
  96     }
  97 #ifdef _LP64
  98     // 32-bit oops don't make sense for the 64-bit VM on sparc
  99     // since the 32-bit VM has the same registers and smaller objects.
 100     Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes);
 101 #endif // _LP64
 102 #ifdef COMPILER2
 103     // Indirect branch is the same cost as direct
 104     if (FLAG_IS_DEFAULT(UseJumpTables)) {
 105       FLAG_SET_DEFAULT(UseJumpTables, true);
 106     }
 107     // Single-issue, so entry and loop tops are
 108     // aligned on a single instruction boundary
 109     if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) {
 110       FLAG_SET_DEFAULT(InteriorEntryAlignment, 4);
 111     }
 112     if (is_niagara_plus()) {
 113       if (has_blk_init() && UseTLAB &&
 114           FLAG_IS_DEFAULT(AllocatePrefetchInstr)) {
 115         // Use BIS instruction for TLAB allocation prefetch.
 116         FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1);
 117         if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
 118           FLAG_SET_ERGO(intx, AllocatePrefetchStyle, 3);
 119         }
 120         if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
 121           // Use smaller prefetch distance with BIS
 122           FLAG_SET_ERGO(intx, AllocatePrefetchDistance, 64);
 123         }
 124       }
 125       if (is_T4()) {
 126         // Double number of prefetched cache lines on T4
 127         // since L2 cache line size is smaller (32 bytes).
 128         if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) {
 129           FLAG_SET_ERGO(intx, AllocatePrefetchLines, AllocatePrefetchLines*2);
 130         }
 131         if (FLAG_IS_DEFAULT(AllocateInstancePrefetchLines)) {
 132           FLAG_SET_ERGO(intx, AllocateInstancePrefetchLines, AllocateInstancePrefetchLines*2);
 133         }
 134       }
 135       if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
 136         // Use different prefetch distance without BIS
 137         FLAG_SET_ERGO(intx, AllocatePrefetchDistance, 256);
 138       }
 139       if (AllocatePrefetchInstr == 1) {
 140         // Need a space at the end of TLAB for BIS since it
 141         // will fault when accessing memory outside of heap.
 142 
 143         // +1 for rounding up to next cache line, +1 to be safe
 144         int lines = AllocatePrefetchLines + 2;
 145         int step_size = AllocatePrefetchStepSize;
 146         int distance = AllocatePrefetchDistance;
 147         _reserve_for_allocation_prefetch = (distance + step_size*lines)/(int)HeapWordSize;
 148       }
 149     }
 150 #endif
 151   }
 152 
 153   // Use hardware population count instruction if available.
 154   if (has_hardware_popc()) {
 155     if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
 156       FLAG_SET_DEFAULT(UsePopCountInstruction, true);
 157     }
 158   } else if (UsePopCountInstruction) {
 159     warning("POPC instruction is not available on this CPU");
 160     FLAG_SET_DEFAULT(UsePopCountInstruction, false);
 161   }
 162 
 163   // T4 and newer Sparc cpus have new compare and branch instruction.
 164   if (has_cbcond()) {
 165     if (FLAG_IS_DEFAULT(UseCBCond)) {
 166       FLAG_SET_DEFAULT(UseCBCond, true);
 167     }
 168   } else if (UseCBCond) {
 169     warning("CBCOND instruction is not available on this CPU");


 202                (!has_hardware_div32() ? ", no-div32" : ""),
 203                (!has_hardware_fsmuld() ? ", no-fsmuld" : ""));
 204 
 205   // buf is started with ", " or is empty
 206   _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf);
 207 
 208   // UseVIS is set to the smallest of what hardware supports and what
 209   // the command line requires.  I.e., you cannot set UseVIS to 3 on
 210   // older UltraSparc which do not support it.
 211   if (UseVIS > 3) UseVIS=3;
 212   if (UseVIS < 0) UseVIS=0;
 213   if (!has_vis3()) // Drop to 2 if no VIS3 support
 214     UseVIS = MIN2((intx)2,UseVIS);
 215   if (!has_vis2()) // Drop to 1 if no VIS2 support
 216     UseVIS = MIN2((intx)1,UseVIS);
 217   if (!has_vis1()) // Drop to 0 if no VIS1 support
 218     UseVIS = 0;
 219 
 220 #ifndef PRODUCT
 221   if (PrintMiscellaneous && Verbose) {
 222     tty->print("Allocation");
 223     if (AllocatePrefetchStyle <= 0) {
 224       tty->print_cr(": no prefetching");
 225     } else {
 226       tty->print(" prefetching: ");
 227       if (AllocatePrefetchInstr == 0) {
 228           tty->print("PREFETCH");
 229       } else if (AllocatePrefetchInstr == 1) {
 230           tty->print("BIS");
 231       }
 232       if (AllocatePrefetchLines > 1) {
 233         tty->print_cr(" at distance %d, %d lines of %d bytes", AllocatePrefetchDistance, AllocatePrefetchLines, AllocatePrefetchStepSize);
 234       } else {
 235         tty->print_cr(" at distance %d, one line of %d bytes", AllocatePrefetchDistance, AllocatePrefetchStepSize);
 236       }
 237     }
 238     if (PrefetchCopyIntervalInBytes > 0) {
 239       tty->print_cr("PrefetchCopyIntervalInBytes %d", PrefetchCopyIntervalInBytes);
 240     }
 241     if (PrefetchScanIntervalInBytes > 0) {
 242       tty->print_cr("PrefetchScanIntervalInBytes %d", PrefetchScanIntervalInBytes);
 243     }
 244     if (PrefetchFieldsAhead > 0) {
 245       tty->print_cr("PrefetchFieldsAhead %d", PrefetchFieldsAhead);
 246     }
 247   }
 248 #endif // PRODUCT
 249 }
 250 
 251 void VM_Version::print_features() {
 252   tty->print_cr("Version:%s", cpu_features());
 253 }
 254 
 255 int VM_Version::determine_features() {


src/cpu/sparc/vm/vm_version_sparc.cpp
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