104
105 // Instruction support
106 static bool has_v8() { return (_features & v8_instructions_m) != 0; }
107 static bool has_v9() { return (_features & v9_instructions_m) != 0; }
108 static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; }
109 static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; }
110 static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; }
111 static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; }
112 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; }
113 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; }
114 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; }
115 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; }
116 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; }
117
118 static bool supports_compare_and_exchange()
119 { return has_v9(); }
120
121 // Returns true if the platform is in the niagara line (T series)
122 // and newer than the niagara1.
123 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); }
124
125 // Fujitsu SPARC64
126 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; }
127
128 static bool is_sun4v() { return (_features & sun4v_m) != 0; }
129 static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m && !is_sun4v() && !is_sparc64(); }
130
131 static bool has_fast_fxtof() { return is_niagara() || is_sparc64() || has_v9() && !is_ultra3(); }
132 static bool has_fast_idiv() { return is_niagara_plus() || is_sparc64(); }
133 // T4 and newer Sparc have fast RDPC instruction.
134 static bool has_fast_rdpc() { return is_niagara_plus() && has_cbcond(); }
135
136 static const char* cpu_features() { return _features_str; }
137
138 static intx L1_data_cache_line_size() {
139 return 64; // default prefetch block size on sparc
140 }
141
142 // Prefetch
143 static intx prefetch_copy_interval_in_bytes() {
144 intx interval = PrefetchCopyIntervalInBytes;
145 return interval >= 0 ? interval : (has_v9() ? 512 : 0);
146 }
147 static intx prefetch_scan_interval_in_bytes() {
148 intx interval = PrefetchScanIntervalInBytes;
149 return interval >= 0 ? interval : (has_v9() ? 512 : 0);
150 }
151 static intx prefetch_fields_ahead() {
152 intx count = PrefetchFieldsAhead;
153 return count >= 0 ? count : (is_ultra3() ? 1 : 0);
154 }
155
156 static intx allocate_prefetch_distance() {
157 // This method should be called before allocate_prefetch_style().
158 intx count = AllocatePrefetchDistance;
159 if (count < 0) { // default is not defined ?
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104
105 // Instruction support
106 static bool has_v8() { return (_features & v8_instructions_m) != 0; }
107 static bool has_v9() { return (_features & v9_instructions_m) != 0; }
108 static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; }
109 static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; }
110 static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; }
111 static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; }
112 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; }
113 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; }
114 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; }
115 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; }
116 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; }
117
118 static bool supports_compare_and_exchange()
119 { return has_v9(); }
120
121 // Returns true if the platform is in the niagara line (T series)
122 // and newer than the niagara1.
123 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); }
124 static bool is_T4() { return is_T_family(_features) && has_cbcond(); }
125
126 // Fujitsu SPARC64
127 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; }
128
129 static bool is_sun4v() { return (_features & sun4v_m) != 0; }
130 static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m && !is_sun4v() && !is_sparc64(); }
131
132 static bool has_fast_fxtof() { return is_niagara() || is_sparc64() || has_v9() && !is_ultra3(); }
133 static bool has_fast_idiv() { return is_niagara_plus() || is_sparc64(); }
134
135 // T4 and newer Sparc have fast RDPC instruction.
136 static bool has_fast_rdpc() { return is_T4(); }
137
138 // T4 and newer Sparc have Most-Recently-Used (MRU) BIS.
139 static bool has_mru_blk_init() { return has_blk_init() && is_T4(); }
140
141 static const char* cpu_features() { return _features_str; }
142
143 static intx prefetch_data_size() {
144 return is_T4() ? 32 : 64; // default prefetch block size on sparc
145 }
146
147 // Prefetch
148 static intx prefetch_copy_interval_in_bytes() {
149 intx interval = PrefetchCopyIntervalInBytes;
150 return interval >= 0 ? interval : (has_v9() ? 512 : 0);
151 }
152 static intx prefetch_scan_interval_in_bytes() {
153 intx interval = PrefetchScanIntervalInBytes;
154 return interval >= 0 ? interval : (has_v9() ? 512 : 0);
155 }
156 static intx prefetch_fields_ahead() {
157 intx count = PrefetchFieldsAhead;
158 return count >= 0 ? count : (is_ultra3() ? 1 : 0);
159 }
160
161 static intx allocate_prefetch_distance() {
162 // This method should be called before allocate_prefetch_style().
163 intx count = AllocatePrefetchDistance;
164 if (count < 0) { // default is not defined ?
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