src/share/vm/runtime/vm_version.hpp

*** 42,51 ****
--- 42,52 ----
    static int          _vm_minor_version;
    static int          _vm_build_number;
    static bool         _initialized;
    static int          _parallel_worker_threads;
    static bool         _parallel_worker_threads_initialized;
+   static int          _reserve_for_allocation_prefetch;
  
    static unsigned int nof_parallel_worker_threads(unsigned int num,
                                                    unsigned int dem,
                                                    unsigned int switch_pt);
   public:
*** 75,84 ****
--- 76,91 ----
    static bool supports_cx8()  {return _supports_cx8;}
    static unsigned int logical_processors_per_package() {
      return _logical_processors_per_package;
    }
  
+   // Need a space at the end of TLAB for prefetch instructions
+   // which may fault when accessing memory outside of heap.
+   static int reserve_for_allocation_prefetch() {
+     return _reserve_for_allocation_prefetch;
+   }
+ 
    // ARCH specific policy for the BiasedLocking
    static bool use_biased_locking()  { return true; }
  
    // Number of page sizes efficiently supported by the hardware.  Most chips now
    // support two sizes, thus this default implementation.  Processor-specific