1 /*
2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/chaitin.hpp"
28 #include "opto/machnode.hpp"
29
30 // see if this register kind does not requires two registers
31 static bool is_single_register(uint x) {
32 #ifdef _LP64
33 return (x != Op_RegD && x != Op_RegL && x != Op_RegP);
34 #else
35 return (x != Op_RegD && x != Op_RegL);
36 #endif
37 }
38
39 //---------------------------may_be_copy_of_callee-----------------------------
40 // Check to see if we can possibly be a copy of a callee-save value.
41 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
42 // Short circuit if there are no callee save registers
43 if (_matcher.number_of_saved_registers() == 0) return false;
44
45 // Expect only a spill-down and reload on exit for callee-save spills.
46 // Chains of copies cannot be deep.
47 // 5008997 - This is wishful thinking. Register allocator seems to
48 // be splitting live ranges for callee save registers to such
49 // an extent that in large methods the chains can be very long
50 // (50+). The conservative answer is to return true if we don't
51 // know as this prevents optimizations from occurring.
52
53 const int limit = 60;
54 int i;
55 for( i=0; i < limit; i++ ) {
56 if( def->is_Proj() && def->in(0)->is_Start() &&
57 _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
58 return true; // Direct use of callee-save proj
59 if( def->is_Copy() ) // Copies carry value through
60 def = def->in(def->is_Copy());
61 else if( def->is_Phi() ) // Phis can merge it from any direction
62 def = def->in(1);
63 else
64 break;
65 guarantee(def != NULL, "must not resurrect dead copy");
66 }
67 // If we reached the end and didn't find a callee save proj
68 // then this may be a callee save proj so we return true
69 // as the conservative answer. If we didn't reach then end
70 // we must have discovered that it was not a callee save
71 // else we would have returned.
72 return i == limit;
73 }
74
75 //------------------------------yank-----------------------------------
76 // Helper function for yank_if_dead
77 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
78 int blk_adjust=0;
79 Block *oldb = _cfg._bbs[old->_idx];
80 oldb->find_remove(old);
81 // Count 1 if deleting an instruction from the current block
82 if( oldb == current_block ) blk_adjust++;
83 _cfg._bbs.map(old->_idx,NULL);
84 OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
85 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
86 value->map(old_reg,NULL); // Yank from value/regnd maps
87 regnd->map(old_reg,NULL); // This register's value is now unknown
88 }
89 return blk_adjust;
90 }
91
92 //------------------------------yank_if_dead-----------------------------------
93 // Removed an edge from 'old'. Yank if dead. Return adjustment counts to
94 // iterators in the current block.
95 int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
96 int blk_adjust=0;
97 while (old->outcnt() == 0 && old != C->top()) {
98 blk_adjust += yank(old, current_block, value, regnd);
99
100 Node *tmp = NULL;
101 for (uint i = 1; i < old->req(); i++) {
102 if (old->in(i)->is_MachTemp()) {
103 Node* machtmp = old->in(i);
104 assert(machtmp->outcnt() == 1, "expected for a MachTemp");
105 blk_adjust += yank(machtmp, current_block, value, regnd);
106 machtmp->disconnect_inputs(NULL);
107 } else {
108 assert(tmp == NULL, "can't handle more non MachTemp inputs");
109 tmp = old->in(i);
110 }
111 }
112 old->disconnect_inputs(NULL);
113 if( !tmp ) break;
114 old = tmp;
115 }
116 return blk_adjust;
117 }
118
119 //------------------------------use_prior_register-----------------------------
120 // Use the prior value instead of the current value, in an effort to make
121 // the current value go dead. Return block iterator adjustment, in case
122 // we yank some instructions from this block.
123 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) {
124 // No effect?
125 if( def == n->in(idx) ) return 0;
126 // Def is currently dead and can be removed? Do not resurrect
127 if( def->outcnt() == 0 ) return 0;
128
129 // Not every pair of physical registers are assignment compatible,
130 // e.g. on sparc floating point registers are not assignable to integer
131 // registers.
132 const LRG &def_lrg = lrgs(n2lidx(def));
133 OptoReg::Name def_reg = def_lrg.reg();
134 const RegMask &use_mask = n->in_RegMask(idx);
135 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
136 : (use_mask.is_AllStack() != 0));
137 // Check for a copy to or from a misaligned pair.
138 can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair();
139
140 if (!can_use)
141 return 0;
142
143 // Capture the old def in case it goes dead...
144 Node *old = n->in(idx);
145
146 // Save-on-call copies can only be elided if the entire copy chain can go
147 // away, lest we get the same callee-save value alive in 2 locations at
148 // once. We check for the obvious trivial case here. Although it can
149 // sometimes be elided with cooperation outside our scope, here we will just
150 // miss the opportunity. :-(
151 if( may_be_copy_of_callee(def) ) {
152 if( old->outcnt() > 1 ) return 0; // We're the not last user
153 int idx = old->is_Copy();
154 assert( idx, "chain of copies being removed" );
155 Node *old2 = old->in(idx); // Chain of copies
156 if( old2->outcnt() > 1 ) return 0; // old is not the last user
157 int idx2 = old2->is_Copy();
158 if( !idx2 ) return 0; // Not a chain of 2 copies
159 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
160 }
161
162 // Use the new def
163 n->set_req(idx,def);
164 _post_alloc++;
165
166 // Is old def now dead? We successfully yanked a copy?
167 return yank_if_dead(old,current_block,&value,®nd);
168 }
169
170
171 //------------------------------skip_copies------------------------------------
172 // Skip through any number of copies (that don't mod oop-i-ness)
173 Node *PhaseChaitin::skip_copies( Node *c ) {
174 int idx = c->is_Copy();
175 uint is_oop = lrgs(n2lidx(c))._is_oop;
176 while (idx != 0) {
177 guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
178 if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
179 break; // casting copy, not the same value
180 c = c->in(idx);
181 idx = c->is_Copy();
182 }
183 return c;
184 }
185
186 //------------------------------elide_copy-------------------------------------
187 // Remove (bypass) copies along Node n, edge k.
188 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) {
189 int blk_adjust = 0;
190
191 uint nk_idx = n2lidx(n->in(k));
192 OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
193
194 // Remove obvious same-register copies
195 Node *x = n->in(k);
196 int idx;
197 while( (idx=x->is_Copy()) != 0 ) {
198 Node *copy = x->in(idx);
199 guarantee(copy != NULL, "must not resurrect dead copy");
200 if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
201 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
202 if( n->in(k) != copy ) break; // Failed for some cutout?
203 x = copy; // Progress, try again
204 }
205
206 // Phis and 2-address instructions cannot change registers so easily - their
207 // outputs must match their input.
208 if( !can_change_regs )
209 return blk_adjust; // Only check stupid copies!
210
211 // Loop backedges won't have a value-mapping yet
212 if( &value == NULL ) return blk_adjust;
213
214 // Skip through all copies to the _value_ being used. Do not change from
215 // int to pointer. This attempts to jump through a chain of copies, where
216 // intermediate copies might be illegal, i.e., value is stored down to stack
217 // then reloaded BUT survives in a register the whole way.
218 Node *val = skip_copies(n->in(k));
219
220 if (val == x && nk_idx != 0 &&
221 regnd[nk_reg] != NULL && regnd[nk_reg] != x &&
222 n2lidx(x) == n2lidx(regnd[nk_reg])) {
223 // When rematerialzing nodes and stretching lifetimes, the
224 // allocator will reuse the original def for multidef LRG instead
225 // of the current reaching def because it can't know it's safe to
226 // do so. After allocation completes if they are in the same LRG
227 // then it should use the current reaching def instead.
228 n->set_req(k, regnd[nk_reg]);
229 blk_adjust += yank_if_dead(val, current_block, &value, ®nd);
230 val = skip_copies(n->in(k));
231 }
232
233 if( val == x ) return blk_adjust; // No progress?
234
235 bool single = is_single_register(val->ideal_reg());
236 uint val_idx = n2lidx(val);
237 OptoReg::Name val_reg = lrgs(val_idx).reg();
238
239 // See if it happens to already be in the correct register!
240 // (either Phi's direct register, or the common case of the name
241 // never-clobbered original-def register)
242 if( value[val_reg] == val &&
243 // Doubles check both halves
244 ( single || value[val_reg-1] == val ) ) {
245 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
246 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
247 return blk_adjust;
248 }
249
250 // See if we can skip the copy by changing registers. Don't change from
251 // using a register to using the stack unless we know we can remove a
252 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill
253 // ops reading from memory instead of just loading once and using the
254 // register.
255
256 // Also handle duplicate copies here.
257 const Type *t = val->is_Con() ? val->bottom_type() : NULL;
258
259 // Scan all registers to see if this value is around already
260 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
261 if (reg == (uint)nk_reg) {
262 // Found ourselves so check if there is only one user of this
263 // copy and keep on searching for a better copy if so.
264 bool ignore_self = true;
265 x = n->in(k);
266 DUIterator_Fast imax, i = x->fast_outs(imax);
267 Node* first = x->fast_out(i); i++;
268 while (i < imax && ignore_self) {
269 Node* use = x->fast_out(i); i++;
270 if (use != first) ignore_self = false;
271 }
272 if (ignore_self) continue;
273 }
274
275 Node *vv = value[reg];
276 if( !single ) { // Doubles check for aligned-adjacent pair
277 if( (reg&1)==0 ) continue; // Wrong half of a pair
278 if( vv != value[reg-1] ) continue; // Not a complete pair
279 }
280 if( vv == val || // Got a direct hit?
281 (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
282 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
283 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
284 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
285 OptoReg::is_reg(reg) || // turning into a register use OR
286 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
287 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
288 if( n->in(k) == regnd[reg] ) // Success! Quit trying
289 return blk_adjust;
290 } // End of if not degrading to a stack
291 } // End of if found value in another register
292 } // End of scan all machine registers
293 return blk_adjust;
294 }
295
296
297 //
298 // Check if nreg already contains the constant value val. Normal copy
299 // elimination doesn't doesn't work on constants because multiple
300 // nodes can represent the same constant so the type and rule of the
301 // MachNode must be checked to ensure equivalence.
302 //
303 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
304 Block *current_block,
305 Node_List& value, Node_List& regnd,
306 OptoReg::Name nreg, OptoReg::Name nreg2) {
307 if (value[nreg] != val && val->is_Con() &&
308 value[nreg] != NULL && value[nreg]->is_Con() &&
309 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
310 value[nreg]->bottom_type() == val->bottom_type() &&
311 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
312 // This code assumes that two MachNodes representing constants
313 // which have the same rule and the same bottom type will produce
314 // identical effects into a register. This seems like it must be
315 // objectively true unless there are hidden inputs to the nodes
316 // but if that were to change this code would need to updated.
317 // Since they are equivalent the second one if redundant and can
318 // be removed.
319 //
320 // n will be replaced with the old value but n might have
321 // kills projections associated with it so remove them now so that
322 // yank_if_dead will be able to eliminate the copy once the uses
323 // have been transferred to the old[value].
324 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
325 Node* use = n->fast_out(i);
326 if (use->is_Proj() && use->outcnt() == 0) {
327 // Kill projections have no users and one input
328 use->set_req(0, C->top());
329 yank_if_dead(use, current_block, &value, ®nd);
330 --i; --imax;
331 }
332 }
333 _post_alloc++;
334 return true;
335 }
336 return false;
337 }
338
339
340 //------------------------------post_allocate_copy_removal---------------------
341 // Post-Allocation peephole copy removal. We do this in 1 pass over the
342 // basic blocks. We maintain a mapping of registers to Nodes (an array of
343 // Nodes indexed by machine register or stack slot number). NULL means that a
344 // register is not mapped to any Node. We can (want to have!) have several
345 // registers map to the same Node. We walk forward over the instructions
346 // updating the mapping as we go. At merge points we force a NULL if we have
347 // to merge 2 different Nodes into the same register. Phi functions will give
348 // us a new Node if there is a proper value merging. Since the blocks are
349 // arranged in some RPO, we will visit all parent blocks before visiting any
350 // successor blocks (except at loops).
351 //
352 // If we find a Copy we look to see if the Copy's source register is a stack
353 // slot and that value has already been loaded into some machine register; if
354 // so we use machine register directly. This turns a Load into a reg-reg
355 // Move. We also look for reloads of identical constants.
356 //
357 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
358 // source directly and make the copy go dead.
359 void PhaseChaitin::post_allocate_copy_removal() {
360 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
361 ResourceMark rm;
362
363 // Need a mapping from basic block Node_Lists. We need a Node_List to
364 // map from register number to value-producing Node.
365 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
366 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
367 // Need a mapping from basic block Node_Lists. We need a Node_List to
368 // map from register number to register-defining Node.
369 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
370 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
371
372 // We keep unused Node_Lists on a free_list to avoid wasting
373 // memory.
374 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
375
376 // For all blocks
377 for( uint i = 0; i < _cfg._num_blocks; i++ ) {
378 uint j;
379 Block *b = _cfg._blocks[i];
380
381 // Count of Phis in block
382 uint phi_dex;
383 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
384 Node *phi = b->_nodes[phi_dex];
385 if( !phi->is_Phi() )
386 break;
387 }
388
389 // If any predecessor has not been visited, we do not know the state
390 // of registers at the start. Check for this, while updating copies
391 // along Phi input edges
392 bool missing_some_inputs = false;
393 Block *freed = NULL;
394 for( j = 1; j < b->num_preds(); j++ ) {
395 Block *pb = _cfg._bbs[b->pred(j)->_idx];
396 // Remove copies along phi edges
397 for( uint k=1; k<phi_dex; k++ )
398 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
399 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
400 // See if this predecessor's mappings have been used by everybody
401 // who wants them. If so, free 'em.
402 uint k;
403 for( k=0; k<pb->_num_succs; k++ ) {
404 Block *pbsucc = pb->_succs[k];
405 if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
406 break; // Found a future user
407 }
408 if( k >= pb->_num_succs ) { // No more uses, free!
409 freed = pb; // Record last block freed
410 free_list.push(blk2value[pb->_pre_order]);
411 free_list.push(blk2regnd[pb->_pre_order]);
412 }
413 } else { // This block has unvisited (loopback) inputs
414 missing_some_inputs = true;
415 }
416 }
417
418
419 // Extract Node_List mappings. If 'freed' is non-zero, we just popped
420 // 'freed's blocks off the list
421 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
422 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
423 assert( !freed || blk2value[freed->_pre_order] == &value, "" );
424 value.map(_max_reg,NULL);
425 regnd.map(_max_reg,NULL);
426 // Set mappings as OUR mappings
427 blk2value[b->_pre_order] = &value;
428 blk2regnd[b->_pre_order] = ®nd;
429
430 // Initialize value & regnd for this block
431 if( missing_some_inputs ) {
432 // Some predecessor has not yet been visited; zap map to empty
433 for( uint k = 0; k < (uint)_max_reg; k++ ) {
434 value.map(k,NULL);
435 regnd.map(k,NULL);
436 }
437 } else {
438 if( !freed ) { // Didn't get a freebie prior block
439 // Must clone some data
440 freed = _cfg._bbs[b->pred(1)->_idx];
441 Node_List &f_value = *blk2value[freed->_pre_order];
442 Node_List &f_regnd = *blk2regnd[freed->_pre_order];
443 for( uint k = 0; k < (uint)_max_reg; k++ ) {
444 value.map(k,f_value[k]);
445 regnd.map(k,f_regnd[k]);
446 }
447 }
448 // Merge all inputs together, setting to NULL any conflicts.
449 for( j = 1; j < b->num_preds(); j++ ) {
450 Block *pb = _cfg._bbs[b->pred(j)->_idx];
451 if( pb == freed ) continue; // Did self already via freelist
452 Node_List &p_regnd = *blk2regnd[pb->_pre_order];
453 for( uint k = 0; k < (uint)_max_reg; k++ ) {
454 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
455 value.map(k,NULL); // Then no value handy
456 regnd.map(k,NULL);
457 }
458 }
459 }
460 }
461
462 // For all Phi's
463 for( j = 1; j < phi_dex; j++ ) {
464 uint k;
465 Node *phi = b->_nodes[j];
466 uint pidx = n2lidx(phi);
467 OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
468
469 // Remove copies remaining on edges. Check for junk phi.
470 Node *u = NULL;
471 for( k=1; k<phi->req(); k++ ) {
472 Node *x = phi->in(k);
473 if( phi != x && u != x ) // Found a different input
474 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
475 }
476 if( u != NodeSentinel ) { // Junk Phi. Remove
477 b->_nodes.remove(j--); phi_dex--;
478 _cfg._bbs.map(phi->_idx,NULL);
479 phi->replace_by(u);
480 phi->disconnect_inputs(NULL);
481 continue;
482 }
483 // Note that if value[pidx] exists, then we merged no new values here
484 // and the phi is useless. This can happen even with the above phi
485 // removal for complex flows. I cannot keep the better known value here
486 // because locally the phi appears to define a new merged value. If I
487 // keep the better value then a copy of the phi, being unable to use the
488 // global flow analysis, can't "peek through" the phi to the original
489 // reaching value and so will act like it's defining a new value. This
490 // can lead to situations where some uses are from the old and some from
491 // the new values. Not illegal by itself but throws the over-strong
492 // assert in scheduling.
493 if( pidx ) {
494 value.map(preg,phi);
495 regnd.map(preg,phi);
496 OptoReg::Name preg_lo = OptoReg::add(preg,-1);
497 if( !is_single_register(phi->ideal_reg()) ) {
498 value.map(preg_lo,phi);
499 regnd.map(preg_lo,phi);
500 }
501 }
502 }
503
504 // For all remaining instructions
505 for( j = phi_dex; j < b->_nodes.size(); j++ ) {
506 Node *n = b->_nodes[j];
507
508 if( n->outcnt() == 0 && // Dead?
509 n != C->top() && // (ignore TOP, it has no du info)
510 !n->is_Proj() ) { // fat-proj kills
511 j -= yank_if_dead(n,b,&value,®nd);
512 continue;
513 }
514
515 // Improve reaching-def info. Occasionally post-alloc's liveness gives
516 // up (at loop backedges, because we aren't doing a full flow pass).
517 // The presence of a live use essentially asserts that the use's def is
518 // alive and well at the use (or else the allocator fubar'd). Take
519 // advantage of this info to set a reaching def for the use-reg.
520 uint k;
521 for( k = 1; k < n->req(); k++ ) {
522 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
523 guarantee(def != NULL, "no disconnected nodes at this point");
524 uint useidx = n2lidx(def); // useidx is the live range index for this USE
525
526 if( useidx ) {
527 OptoReg::Name ureg = lrgs(useidx).reg();
528 if( !value[ureg] ) {
529 int idx; // Skip occasional useless copy
530 while( (idx=def->is_Copy()) != 0 &&
531 def->in(idx) != NULL && // NULL should not happen
532 ureg == lrgs(n2lidx(def->in(idx))).reg() )
533 def = def->in(idx);
534 Node *valdef = skip_copies(def); // tighten up val through non-useless copies
535 value.map(ureg,valdef); // record improved reaching-def info
536 regnd.map(ureg, def);
537 // Record other half of doubles
538 OptoReg::Name ureg_lo = OptoReg::add(ureg,-1);
539 if( !is_single_register(def->ideal_reg()) &&
540 ( !RegMask::can_represent(ureg_lo) ||
541 lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent
542 !value[ureg_lo] ) {
543 value.map(ureg_lo,valdef); // record improved reaching-def info
544 regnd.map(ureg_lo, def);
545 }
546 }
547 }
548 }
549
550 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
551
552 // Remove copies along input edges
553 for( k = 1; k < n->req(); k++ )
554 j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
555
556 // Unallocated Nodes define no registers
557 uint lidx = n2lidx(n);
558 if( !lidx ) continue;
559
560 // Update the register defined by this instruction
561 OptoReg::Name nreg = lrgs(lidx).reg();
562 // Skip through all copies to the _value_ being defined.
563 // Do not change from int to pointer
564 Node *val = skip_copies(n);
565
566 // Clear out a dead definition before starting so that the
567 // elimination code doesn't have to guard against it. The
568 // definition could in fact be a kill projection with a count of
569 // 0 which is safe but since those are uninteresting for copy
570 // elimination just delete them as well.
571 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
572 regnd.map(nreg, NULL);
573 value.map(nreg, NULL);
574 }
575
576 uint n_ideal_reg = n->ideal_reg();
577 if( is_single_register(n_ideal_reg) ) {
578 // If Node 'n' does not change the value mapped by the register,
579 // then 'n' is a useless copy. Do not update the register->node
580 // mapping so 'n' will go dead.
581 if( value[nreg] != val ) {
582 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
583 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
584 } else {
585 // Update the mapping: record new Node defined by the register
586 regnd.map(nreg,n);
587 // Update mapping for defined *value*, which is the defined
588 // Node after skipping all copies.
589 value.map(nreg,val);
590 }
591 } else if( !may_be_copy_of_callee(n) ) {
592 assert( n->is_Copy(), "" );
593 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
594 }
595 } else {
596 // If the value occupies a register pair, record same info
597 // in both registers.
598 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
599 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
600 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
601 // Sparc occasionally has non-adjacent pairs.
602 // Find the actual other value
603 RegMask tmp = lrgs(lidx).mask();
604 tmp.Remove(nreg);
605 nreg_lo = tmp.find_first_elem();
606 }
607 if( value[nreg] != val || value[nreg_lo] != val ) {
608 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
609 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
610 } else {
611 regnd.map(nreg , n );
612 regnd.map(nreg_lo, n );
613 value.map(nreg ,val);
614 value.map(nreg_lo,val);
615 }
616 } else if( !may_be_copy_of_callee(n) ) {
617 assert( n->is_Copy(), "" );
618 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
619 }
620 }
621
622 // Fat projections kill many registers
623 if( n_ideal_reg == MachProjNode::fat_proj ) {
624 RegMask rm = n->out_RegMask();
625 // wow, what an expensive iterator...
626 nreg = rm.find_first_elem();
627 while( OptoReg::is_valid(nreg)) {
628 rm.Remove(nreg);
629 value.map(nreg,n);
630 regnd.map(nreg,n);
631 nreg = rm.find_first_elem();
632 }
633 }
634
635 } // End of for all instructions in the block
636
637 } // End for all blocks
638 }