src/cpu/x86/vm/x86_32.ad

*** 1391,1400 ****
--- 1391,1406 ----
  const bool Matcher::init_array_count_is_in_bytes = false;
  
  // Threshold size for cleararray.
  const int Matcher::init_array_short_size = 8 * BytesPerLong;
  
+ // Needs 2 CMOV's for longs.
+ const int Matcher::long_cmove_cost() { return 1; }
+ 
+ // No CMOVF/CMOVD with SSE/SSE2
+ const int Matcher::float_cmove_cost() { return (UseSSE>=1) ? ConditionalMoveLimit : 0; }
+ 
  // Should the Matcher clone shifts on addressing modes, expecting them to
  // be subsumed into complex addressing expressions or compute them into
  // registers?  True for Intel but false for most RISCs
  const bool Matcher::clone_shift_expressions = true;
  
*** 7903,7912 ****
--- 7909,7952 ----
    ins_pipe( ialu_reg_reg );
  %}
  
  //----------Conditional Move---------------------------------------------------
  // Conditional move
+ instruct jmovI_reg(cmpOp cop, eFlagsReg cr, eRegI dst, eRegI src) %{
+   predicate(!VM_Version::supports_cmov() );
+   match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
+   ins_cost(200);
+   format %{ "J$cop,us skip\t# signed cmove\n\t"
+             "MOV    $dst,$src\n"
+       "skip:" %}
+   ins_encode %{
+     Label Lskip;
+     // Invert sense of branch from sense of CMOV
+     __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip);
+     __ movl($dst$$Register, $src$$Register);
+     __ bind(Lskip);
+   %}
+   ins_pipe( pipe_cmov_reg );
+ %}
+ 
+ instruct jmovI_regU(cmpOpU cop, eFlagsRegU cr, eRegI dst, eRegI src) %{
+   predicate(!VM_Version::supports_cmov() );
+   match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
+   ins_cost(200);
+   format %{ "J$cop,us skip\t# unsigned cmove\n\t"
+             "MOV    $dst,$src\n"
+       "skip:" %}
+   ins_encode %{
+     Label Lskip;
+     // Invert sense of branch from sense of CMOV
+     __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip);
+     __ movl($dst$$Register, $src$$Register);
+     __ bind(Lskip);
+   %}
+   ins_pipe( pipe_cmov_reg );
+ %}
+ 
  instruct cmovI_reg(eRegI dst, eRegI src, eFlagsReg cr, cmpOp cop ) %{
    predicate(VM_Version::supports_cmov() );
    match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
    ins_cost(200);
    format %{ "CMOV$cop $dst,$src" %}