src/cpu/x86/vm/x86_64.ad
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*** old/src/cpu/x86/vm/x86_64.ad Fri Oct 21 15:43:56 2011
--- new/src/cpu/x86/vm/x86_64.ad Fri Oct 21 15:43:56 2011
*** 1991,2000 ****
--- 1991,2006 ----
const bool Matcher::init_array_count_is_in_bytes = false;
// Threshold size for cleararray.
const int Matcher::init_array_short_size = 8 * BytesPerLong;
+ // No additional cost for CMOVL.
+ const int Matcher::long_cmove_cost() { return 0; }
+
+ // No CMOVF/CMOVD with SSE2
+ const int Matcher::float_cmove_cost() { return ConditionalMoveLimit; }
+
// Should the Matcher clone shifts on addressing modes, expecting them
// to be subsumed into complex addressing expressions or compute them
// into registers? True for Intel but false for most RISCs
const bool Matcher::clone_shift_expressions = true;
src/cpu/x86/vm/x86_64.ad
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