36 REGISTER_DEFINITION(Register, noreg);
37 REGISTER_DEFINITION(Register, rax);
38 REGISTER_DEFINITION(Register, rcx);
39 REGISTER_DEFINITION(Register, rdx);
40 REGISTER_DEFINITION(Register, rbx);
41 REGISTER_DEFINITION(Register, rsp);
42 REGISTER_DEFINITION(Register, rbp);
43 REGISTER_DEFINITION(Register, rsi);
44 REGISTER_DEFINITION(Register, rdi);
45 #ifdef AMD64
46 REGISTER_DEFINITION(Register, r8);
47 REGISTER_DEFINITION(Register, r9);
48 REGISTER_DEFINITION(Register, r10);
49 REGISTER_DEFINITION(Register, r11);
50 REGISTER_DEFINITION(Register, r12);
51 REGISTER_DEFINITION(Register, r13);
52 REGISTER_DEFINITION(Register, r14);
53 REGISTER_DEFINITION(Register, r15);
54 #endif // AMD64
55
56 REGISTER_DEFINITION(XMMRegister, xmm0 );
57 REGISTER_DEFINITION(XMMRegister, xmm1 );
58 REGISTER_DEFINITION(XMMRegister, xmm2 );
59 REGISTER_DEFINITION(XMMRegister, xmm3 );
60 REGISTER_DEFINITION(XMMRegister, xmm4 );
61 REGISTER_DEFINITION(XMMRegister, xmm5 );
62 REGISTER_DEFINITION(XMMRegister, xmm6 );
63 REGISTER_DEFINITION(XMMRegister, xmm7 );
64 #ifdef AMD64
65 REGISTER_DEFINITION(XMMRegister, xmm8);
66 REGISTER_DEFINITION(XMMRegister, xmm9);
67 REGISTER_DEFINITION(XMMRegister, xmm10);
68 REGISTER_DEFINITION(XMMRegister, xmm11);
69 REGISTER_DEFINITION(XMMRegister, xmm12);
70 REGISTER_DEFINITION(XMMRegister, xmm13);
71 REGISTER_DEFINITION(XMMRegister, xmm14);
72 REGISTER_DEFINITION(XMMRegister, xmm15);
73
74 REGISTER_DEFINITION(Register, c_rarg0);
75 REGISTER_DEFINITION(Register, c_rarg1);
98 REGISTER_DEFINITION(Register, j_rarg3);
99 REGISTER_DEFINITION(Register, j_rarg4);
100 REGISTER_DEFINITION(Register, j_rarg5);
101
102 REGISTER_DEFINITION(XMMRegister, j_farg0);
103 REGISTER_DEFINITION(XMMRegister, j_farg1);
104 REGISTER_DEFINITION(XMMRegister, j_farg2);
105 REGISTER_DEFINITION(XMMRegister, j_farg3);
106 REGISTER_DEFINITION(XMMRegister, j_farg4);
107 REGISTER_DEFINITION(XMMRegister, j_farg5);
108 REGISTER_DEFINITION(XMMRegister, j_farg6);
109 REGISTER_DEFINITION(XMMRegister, j_farg7);
110
111 REGISTER_DEFINITION(Register, rscratch1);
112 REGISTER_DEFINITION(Register, rscratch2);
113
114 REGISTER_DEFINITION(Register, r12_heapbase);
115 REGISTER_DEFINITION(Register, r15_thread);
116 #endif // AMD64
117
118 REGISTER_DEFINITION(MMXRegister, mmx0 );
119 REGISTER_DEFINITION(MMXRegister, mmx1 );
120 REGISTER_DEFINITION(MMXRegister, mmx2 );
121 REGISTER_DEFINITION(MMXRegister, mmx3 );
122 REGISTER_DEFINITION(MMXRegister, mmx4 );
123 REGISTER_DEFINITION(MMXRegister, mmx5 );
124 REGISTER_DEFINITION(MMXRegister, mmx6 );
125 REGISTER_DEFINITION(MMXRegister, mmx7 );
126
127 // JSR 292
128 REGISTER_DEFINITION(Register, rbp_mh_SP_save);
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36 REGISTER_DEFINITION(Register, noreg);
37 REGISTER_DEFINITION(Register, rax);
38 REGISTER_DEFINITION(Register, rcx);
39 REGISTER_DEFINITION(Register, rdx);
40 REGISTER_DEFINITION(Register, rbx);
41 REGISTER_DEFINITION(Register, rsp);
42 REGISTER_DEFINITION(Register, rbp);
43 REGISTER_DEFINITION(Register, rsi);
44 REGISTER_DEFINITION(Register, rdi);
45 #ifdef AMD64
46 REGISTER_DEFINITION(Register, r8);
47 REGISTER_DEFINITION(Register, r9);
48 REGISTER_DEFINITION(Register, r10);
49 REGISTER_DEFINITION(Register, r11);
50 REGISTER_DEFINITION(Register, r12);
51 REGISTER_DEFINITION(Register, r13);
52 REGISTER_DEFINITION(Register, r14);
53 REGISTER_DEFINITION(Register, r15);
54 #endif // AMD64
55
56 REGISTER_DEFINITION(XMMRegister, xnoreg);
57 REGISTER_DEFINITION(XMMRegister, xmm0 );
58 REGISTER_DEFINITION(XMMRegister, xmm1 );
59 REGISTER_DEFINITION(XMMRegister, xmm2 );
60 REGISTER_DEFINITION(XMMRegister, xmm3 );
61 REGISTER_DEFINITION(XMMRegister, xmm4 );
62 REGISTER_DEFINITION(XMMRegister, xmm5 );
63 REGISTER_DEFINITION(XMMRegister, xmm6 );
64 REGISTER_DEFINITION(XMMRegister, xmm7 );
65 #ifdef AMD64
66 REGISTER_DEFINITION(XMMRegister, xmm8);
67 REGISTER_DEFINITION(XMMRegister, xmm9);
68 REGISTER_DEFINITION(XMMRegister, xmm10);
69 REGISTER_DEFINITION(XMMRegister, xmm11);
70 REGISTER_DEFINITION(XMMRegister, xmm12);
71 REGISTER_DEFINITION(XMMRegister, xmm13);
72 REGISTER_DEFINITION(XMMRegister, xmm14);
73 REGISTER_DEFINITION(XMMRegister, xmm15);
74
75 REGISTER_DEFINITION(Register, c_rarg0);
76 REGISTER_DEFINITION(Register, c_rarg1);
99 REGISTER_DEFINITION(Register, j_rarg3);
100 REGISTER_DEFINITION(Register, j_rarg4);
101 REGISTER_DEFINITION(Register, j_rarg5);
102
103 REGISTER_DEFINITION(XMMRegister, j_farg0);
104 REGISTER_DEFINITION(XMMRegister, j_farg1);
105 REGISTER_DEFINITION(XMMRegister, j_farg2);
106 REGISTER_DEFINITION(XMMRegister, j_farg3);
107 REGISTER_DEFINITION(XMMRegister, j_farg4);
108 REGISTER_DEFINITION(XMMRegister, j_farg5);
109 REGISTER_DEFINITION(XMMRegister, j_farg6);
110 REGISTER_DEFINITION(XMMRegister, j_farg7);
111
112 REGISTER_DEFINITION(Register, rscratch1);
113 REGISTER_DEFINITION(Register, rscratch2);
114
115 REGISTER_DEFINITION(Register, r12_heapbase);
116 REGISTER_DEFINITION(Register, r15_thread);
117 #endif // AMD64
118
119 REGISTER_DEFINITION(MMXRegister, mnoreg );
120 REGISTER_DEFINITION(MMXRegister, mmx0 );
121 REGISTER_DEFINITION(MMXRegister, mmx1 );
122 REGISTER_DEFINITION(MMXRegister, mmx2 );
123 REGISTER_DEFINITION(MMXRegister, mmx3 );
124 REGISTER_DEFINITION(MMXRegister, mmx4 );
125 REGISTER_DEFINITION(MMXRegister, mmx5 );
126 REGISTER_DEFINITION(MMXRegister, mmx6 );
127 REGISTER_DEFINITION(MMXRegister, mmx7 );
128
129 // JSR 292
130 REGISTER_DEFINITION(Register, rbp_mh_SP_save);
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