src/cpu/x86/vm/vm_version_x86.hpp

*** 76,86 ****
                 dca      : 1,
                 sse4_1   : 1,
                 sse4_2   : 1,
                          : 2,
                 popcnt   : 1,
!                         : 8;
      } bits;
    };
  
    union StdCpuid1Edx {
      uint32_t value;
--- 76,89 ----
                 dca      : 1,
                 sse4_1   : 1,
                 sse4_2   : 1,
                          : 2,
                 popcnt   : 1,
!                         : 3,
!                osxsave  : 1,
!                avx      : 1,
!                         : 3;
      } bits;
    };
  
    union StdCpuid1Edx {
      uint32_t value;
*** 174,183 ****
--- 177,214 ----
        uint32_t cores_per_cpu : 8,
                               : 24;
      } bits;
    };
  
+   union SefCpuid7Eax {
+     uint32_t value;
+   };
+ 
+   union SefCpuid7Ebx {
+     uint32_t value;
+     struct {
+       uint32_t fsgsbase : 1,
+                         : 2,
+                    bmi1 : 1,
+                         : 1,
+                    avx2 : 1,
+                         : 2,
+                    bmi2 : 1,
+                         : 23;
+     } bits;
+   };
+ 
+   union XemXcr0Eax {
+     uint32_t value;
+     struct {
+       uint32_t x87 : 1,
+                sse : 1,
+                ymm : 1,
+                    : 29;
+     } bits;
+   };
+ 
  protected:
     static int _cpu;
     static int _model;
     static int _stepping;
     static int _cpuFeatures;     // features returned by the "cpuid" instruction
*** 198,208 ****
       CPU_SSSE3  = (1 << 9),
       CPU_SSE4A  = (1 << 10),
       CPU_SSE4_1 = (1 << 11),
       CPU_SSE4_2 = (1 << 12),
       CPU_POPCNT = (1 << 13),
!      CPU_LZCNT  = (1 << 14)
     } cpuFeatureFlags;
  
    // cpuid information block.  All info derived from executing cpuid with
    // various function numbers is stored here.  Intel and AMD info is
    // merged in this block: accessor methods disentangle it.
--- 229,241 ----
       CPU_SSSE3  = (1 << 9),
       CPU_SSE4A  = (1 << 10),
       CPU_SSE4_1 = (1 << 11),
       CPU_SSE4_2 = (1 << 12),
       CPU_POPCNT = (1 << 13),
!      CPU_LZCNT  = (1 << 14),
!      CPU_AVX    = (1 << 15),
!      CPU_AVX2   = (1 << 16)
     } cpuFeatureFlags;
  
    // cpuid information block.  All info derived from executing cpuid with
    // various function numbers is stored here.  Intel and AMD info is
    // merged in this block: accessor methods disentangle it.
*** 226,235 ****
--- 259,274 ----
      DcpCpuid4Eax dcp_cpuid4_eax;
      DcpCpuid4Ebx dcp_cpuid4_ebx;
      uint32_t     dcp_cpuid4_ecx; // unused currently
      uint32_t     dcp_cpuid4_edx; // unused currently
  
+     // cpuid function 7 (structured extended features)
+     SefCpuid7Eax sef_cpuid7_eax;
+     SefCpuid7Ebx sef_cpuid7_ebx;
+     uint32_t     sef_cpuid7_ecx; // unused currently
+     uint32_t     sef_cpuid7_edx; // unused currently
+ 
      // cpuid function 0xB (processor topology)
      // ecx = 0
      uint32_t     tpl_cpuidB0_eax;
      TplCpuidBEbx tpl_cpuidB0_ebx;
      uint32_t     tpl_cpuidB0_ecx; // unused currently
*** 273,282 ****
--- 312,325 ----
      // cpuid function 0x80000008
      uint32_t     ext_cpuid8_eax; // unused currently
      uint32_t     ext_cpuid8_ebx; // reserved
      ExtCpuid8Ecx ext_cpuid8_ecx;
      uint32_t     ext_cpuid8_edx; // reserved
+ 
+     // extended control register XCR0 (the XFEATURE_ENABLED_MASK register)
+     XemXcr0Eax   xem_xcr0_eax;
+     uint32_t     xem_xcr0_edx; // reserved
    };
  
    // The actual cpuid info block
    static CpuidInfo _cpuid_info;
  
*** 326,335 ****
--- 369,386 ----
        result |= CPU_SSE4_1;
      if (_cpuid_info.std_cpuid1_ecx.bits.sse4_2 != 0)
        result |= CPU_SSE4_2;
      if (_cpuid_info.std_cpuid1_ecx.bits.popcnt != 0)
        result |= CPU_POPCNT;
+     if (_cpuid_info.std_cpuid1_ecx.bits.avx != 0 &&
+         _cpuid_info.std_cpuid1_ecx.bits.osxsave != 0 &&
+         _cpuid_info.xem_xcr0_eax.bits.sse != 0 &&
+         _cpuid_info.xem_xcr0_eax.bits.ymm != 0) {
+       result |= CPU_AVX;
+       if (_cpuid_info.sef_cpuid7_ebx.bits.avx2 != 0)
+         result |= CPU_AVX2;
+     }
  
      // AMD features.
      if (is_amd()) {
        if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
            (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
*** 348,363 ****
--- 399,416 ----
  public:
    // Offsets for cpuid asm stub
    static ByteSize std_cpuid0_offset() { return byte_offset_of(CpuidInfo, std_max_function); }
    static ByteSize std_cpuid1_offset() { return byte_offset_of(CpuidInfo, std_cpuid1_eax); }
    static ByteSize dcp_cpuid4_offset() { return byte_offset_of(CpuidInfo, dcp_cpuid4_eax); }
+   static ByteSize sef_cpuid7_offset() { return byte_offset_of(CpuidInfo, sef_cpuid7_eax); }
    static ByteSize ext_cpuid1_offset() { return byte_offset_of(CpuidInfo, ext_cpuid1_eax); }
    static ByteSize ext_cpuid5_offset() { return byte_offset_of(CpuidInfo, ext_cpuid5_eax); }
    static ByteSize ext_cpuid8_offset() { return byte_offset_of(CpuidInfo, ext_cpuid8_eax); }
    static ByteSize tpl_cpuidB0_offset() { return byte_offset_of(CpuidInfo, tpl_cpuidB0_eax); }
    static ByteSize tpl_cpuidB1_offset() { return byte_offset_of(CpuidInfo, tpl_cpuidB1_eax); }
    static ByteSize tpl_cpuidB2_offset() { return byte_offset_of(CpuidInfo, tpl_cpuidB2_eax); }
+   static ByteSize xem_xcr0_offset() { return byte_offset_of(CpuidInfo, xem_xcr0_eax); }
  
    // Initialization
    static void initialize();
  
    // Asserts
*** 445,454 ****
--- 498,509 ----
    static bool supports_sse3()     { return (_cpuFeatures & CPU_SSE3) != 0; }
    static bool supports_ssse3()    { return (_cpuFeatures & CPU_SSSE3)!= 0; }
    static bool supports_sse4_1()   { return (_cpuFeatures & CPU_SSE4_1) != 0; }
    static bool supports_sse4_2()   { return (_cpuFeatures & CPU_SSE4_2) != 0; }
    static bool supports_popcnt()   { return (_cpuFeatures & CPU_POPCNT) != 0; }
+   static bool supports_avx()      { return (_cpuFeatures & CPU_AVX) != 0; }
+   static bool supports_avx2()     { return (_cpuFeatures & CPU_AVX2) != 0; }
    //
    // AMD features
    //
    static bool supports_3dnow_prefetch()    { return (_cpuFeatures & CPU_3DNOW_PREFETCH) != 0; }
    static bool supports_mmx_ext()  { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; }