*** old/src/share/vm/adlc/formssel.cpp	Sat Jun  2 20:04:07 2012
--- new/src/share/vm/adlc/formssel.cpp	Sat Jun  2 20:04:07 2012

*** 1,7 ****
--- 1,7 ----
  /*
!  * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
!  * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.

*** 430,439 ****
--- 430,447 ----
    if( _matrule == NULL ) return Form::none;
  
    return  _matrule->is_ideal_store();
  }
  
+ // Return 'true' if this instruction matches an ideal vector node
+ bool InstructForm::is_vector() const {
+   if( _matrule == NULL ) return false;
+ 
+   return _matrule->is_vector();
+ }
+ 
+ 
  // Return the input register that must match the output register
  // If this is not required, return 0
  uint InstructForm::two_address(FormDict &globals) {
    uint  matching_input = 0;
    if(_components.count() == 0) return 0;

*** 749,758 ****
--- 757,769 ----
    else if ( is_ideal_load() == Form::idealP )                return true;
    else if ( is_ideal_store() != Form::none  )                return true;
  
    if (needs_base_oop_edge(globals)) return true;
  
+   if (is_vector()) return true;
+   if (is_mach_constant()) return true;
+ 
    return  false;
  }
  
  
  // Access instr_cost attribute or return NULL.

*** 3380,3393 ****
--- 3391,3401 ----
    static const char *needs_ideal_memory_list[] = {
      "StoreI","StoreL","StoreP","StoreN","StoreD","StoreF" ,
      "StoreB","StoreC","Store" ,"StoreFP",
      "LoadI", "LoadUI2L", "LoadL", "LoadP" ,"LoadN", "LoadD" ,"LoadF"  ,
      "LoadB" , "LoadUB", "LoadUS" ,"LoadS" ,"Load" ,
!     "Store4I","Store2I","Store2L","Store2D","Store4F","Store2F","Store16B",
      "Store8B","Store4B","Store8C","Store4C","Store2C",
      "Load4I" ,"Load2I" ,"Load2L" ,"Load2D" ,"Load4F" ,"Load2F" ,"Load16B" ,
      "Load8B" ,"Load4B" ,"Load8C" ,"Load4C" ,"Load2C" ,"Load8S", "Load4S","Load2S",
!     "StoreVector", "LoadVector",
      "LoadRange", "LoadKlass", "LoadNKlass", "LoadL_unaligned", "LoadD_unaligned",
      "LoadPLocked", "LoadLLocked",
      "StorePConditional", "StoreIConditional", "StoreLConditional",
      "CompareAndSwapI", "CompareAndSwapL", "CompareAndSwapP", "CompareAndSwapN",
      "StoreCM",

*** 3820,3829 ****
--- 3828,3841 ----
           strcmp(opType,"RegP")==0 ||
           strcmp(opType,"RegN")==0 ||
           strcmp(opType,"RegL")==0 ||
           strcmp(opType,"RegF")==0 ||
           strcmp(opType,"RegD")==0 ||
+          strcmp(opType,"VecS")==0 ||
+          strcmp(opType,"VecD")==0 ||
+          strcmp(opType,"VecX")==0 ||
+          strcmp(opType,"VecY")==0 ||
           strcmp(opType,"Reg" )==0) ) {
        return 1;
      }
    }
    return 0;

*** 3936,3958 ****
--- 3948,3964 ----
          strcmp(opType,"RoundFloat")==0 ||
          strcmp(opType,"ReverseBytesI")==0 ||
          strcmp(opType,"ReverseBytesL")==0 ||
          strcmp(opType,"ReverseBytesUS")==0 ||
          strcmp(opType,"ReverseBytesS")==0 ||
!         strcmp(opType,"Replicate16B")==0 ||
!         strcmp(opType,"Replicate8B")==0 ||
!         strcmp(opType,"Replicate4B")==0 ||
!         strcmp(opType,"Replicate8C")==0 ||
!         strcmp(opType,"Replicate4C")==0 ||
!         strcmp(opType,"Replicate8S")==0 ||
!         strcmp(opType,"Replicate4S")==0 ||
          strcmp(opType,"Replicate4I")==0 ||
          strcmp(opType,"Replicate2I")==0 ||
          strcmp(opType,"Replicate2L")==0 ||
          strcmp(opType,"Replicate4F")==0 ||
          strcmp(opType,"Replicate2F")==0 ||
          strcmp(opType,"Replicate2D")==0 ||
!         strcmp(opType,"ReplicateB")==0 ||
!         strcmp(opType,"ReplicateC")==0 ||
!         strcmp(opType,"ReplicateS")==0 ||
!         strcmp(opType,"ReplicateI")==0 ||
!         strcmp(opType,"ReplicateL")==0 ||
!         strcmp(opType,"ReplicateF")==0 ||
!         strcmp(opType,"ReplicateD")==0 ||
          0 /* 0 to line up columns nicely */ )
        return 1;
    }
    return 0;
  }

*** 4032,4041 ****
--- 4038,4064 ----
    }
  
    return ideal_load;
  }
  
+ bool MatchRule::is_vector() const {
+   if( _rChild ) {
+     const char  *opType = _rChild->_opType;
+     if( strcmp(opType,"ReplicateB")==0 ||
+         strcmp(opType,"ReplicateC")==0 ||
+         strcmp(opType,"ReplicateS")==0 ||
+         strcmp(opType,"ReplicateI")==0 ||
+         strcmp(opType,"ReplicateL")==0 ||
+         strcmp(opType,"ReplicateF")==0 ||
+         strcmp(opType,"LoadVector")==0 ||
+         strcmp(opType,"StoreVector")==0 ||
+         0 /* 0 to line up columns nicely */ )
+       return true;
+   }
+   return false;
+ }
+ 
  
  bool MatchRule::skip_antidep_check() const {
    // Some loads operate on what is effectively immutable memory so we
    // should skip the anti dep computations.  For some of these nodes
    // the rewritable field keeps the anti dep logic from triggering but