1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
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23 */
24
25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
26 #define SHARE_VM_OPTO_CHAITIN_HPP
27
28 #include "code/vmreg.hpp"
29 #include "libadt/port.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "opto/connode.hpp"
32 #include "opto/live.hpp"
33 #include "opto/matcher.hpp"
34 #include "opto/phase.hpp"
35 #include "opto/regalloc.hpp"
36 #include "opto/regmask.hpp"
37
38 class LoopTree;
39 class MachCallNode;
40 class MachSafePointNode;
41 class Matcher;
42 class PhaseCFG;
43 class PhaseLive;
44 class PhaseRegAlloc;
45 class PhaseChaitin;
46
47 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)
48 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)
49
50 //------------------------------LRG--------------------------------------------
51 // Live-RanGe structure.
52 class LRG : public ResourceObj {
53 friend class VMStructs;
54 public:
55 enum { SPILL_REG=29999 }; // Register number of a spilled LRG
56
57 double _cost; // 2 for loads/1 for stores times block freq
58 double _area; // Sum of all simultaneously live values
59 double score() const; // Compute score from cost and area
60 double _maxfreq; // Maximum frequency of any def or use
61
62 Node *_def; // Check for multi-def live ranges
63 #ifndef PRODUCT
64 GrowableArray<Node*>* _defs;
65 #endif
66
67 uint _risk_bias; // Index of LRG which we want to avoid color
68 uint _copy_bias; // Index of LRG which we want to share color
69
70 uint _next; // Index of next LRG in linked list
71 uint _prev; // Index of prev LRG in linked list
72 private:
73 uint _reg; // Chosen register; undefined if mask is plural
74 public:
75 // Return chosen register for this LRG. Error if the LRG is not bound to
76 // a single register.
77 OptoReg::Name reg() const { return OptoReg::Name(_reg); }
78 void set_reg( OptoReg::Name r ) { _reg = r; }
79
80 private:
81 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs
82 public:
83 int degree() const { assert( _degree_valid, "" ); return _eff_degree; }
84 // Degree starts not valid and any change to the IFG neighbor
85 // set makes it not valid.
86 void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }
87 // Made a change that hammered degree
88 void invalid_degree() { debug_only(_degree_valid=0;) }
89 // Incrementally modify degree. If it was correct, it should remain correct
90 void inc_degree( uint mod ) { _eff_degree += mod; }
91 // Compute the degree between 2 live ranges
92 int compute_degree( LRG &l ) const;
93
94 private:
95 RegMask _mask; // Allowed registers for this LRG
96 uint _mask_size; // cache of _mask.Size();
97 public:
98 int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); }
99 void set_mask_size( int size ) {
100 assert((size == 65535) || (size == (int)_mask.Size()), "");
101 _mask_size = size;
102 #ifdef ASSERT
103 _msize_valid=1;
104 if (_is_vector) {
105 assert(!_fat_proj, "sanity");
106 _mask.verify_sets(_num_regs);
107 } else if (_num_regs == 2 && !_fat_proj) {
108 _mask.verify_pairs();
109 }
110 #endif
111 }
112 void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
113 int mask_size() const { assert( _msize_valid, "mask size not valid" );
114 return _mask_size; }
115 // Get the last mask size computed, even if it does not match the
116 // count of bits in the current mask.
117 int get_invalid_mask_size() const { return _mask_size; }
118 const RegMask &mask() const { return _mask; }
119 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
120 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
121 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
122 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }
123 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
124 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }
125 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }
126 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
127 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
128
129 // Number of registers this live range uses when it colors
130 private:
131 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else
132 // except _num_regs is kill count for fat_proj
133 public:
134 int num_regs() const { return _num_regs; }
135 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
136
137 private:
138 // Number of physical registers this live range uses when it colors
139 // Architecture and register-set dependent
140 uint8 _reg_pressure;
141 public:
142 void set_reg_pressure(int i) { _reg_pressure = i; }
143 int reg_pressure() const { return _reg_pressure; }
144
145 // How much 'wiggle room' does this live range have?
146 // How many color choices can it make (scaled by _num_regs)?
147 int degrees_of_freedom() const { return mask_size() - _num_regs; }
148 // Bound LRGs have ZERO degrees of freedom. We also count
149 // must_spill as bound.
150 bool is_bound () const { return _is_bound; }
151 // Negative degrees-of-freedom; even with no neighbors this
152 // live range must spill.
153 bool not_free() const { return degrees_of_freedom() < 0; }
154 // Is this live range of "low-degree"? Trivially colorable?
155 bool lo_degree () const { return degree() <= degrees_of_freedom(); }
156 // Is this live range just barely "low-degree"? Trivially colorable?
157 bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
158
159 uint _is_oop:1, // Live-range holds an oop
160 _is_float:1, // True if in float registers
161 _is_vector:1, // True if in vector registers
162 _was_spilled1:1, // True if prior spilling on def
163 _was_spilled2:1, // True if twice prior spilling on def
164 _is_bound:1, // live range starts life with no
165 // degrees of freedom.
166 _direct_conflict:1, // True if def and use registers in conflict
167 _must_spill:1, // live range has lost all degrees of freedom
168 // If _fat_proj is set, live range does NOT require aligned, adjacent
169 // registers and has NO interferences.
170 // If _fat_proj is clear, live range requires num_regs() to be a power of
171 // 2, and it requires registers to form an aligned, adjacent set.
172 _fat_proj:1, //
173 _was_lo:1, // Was lo-degree prior to coalesce
174 _msize_valid:1, // _mask_size cache valid
175 _degree_valid:1, // _degree cache valid
176 _has_copy:1, // Adjacent to some copy instruction
177 _at_risk:1; // Simplify says this guy is at risk to spill
178
179
180 // Alive if non-zero, dead if zero
181 bool alive() const { return _def != NULL; }
182 bool is_multidef() const { return _def == NodeSentinel; }
183 bool is_singledef() const { return _def != NodeSentinel; }
184
185 #ifndef PRODUCT
186 void dump( ) const;
187 #endif
188 };
189
190 //------------------------------LRG_List---------------------------------------
191 // Map Node indices to Live RanGe indices.
192 // Array lookup in the optimized case.
193 class LRG_List : public ResourceObj {
194 friend class VMStructs;
195 uint _cnt, _max;
196 uint* _lidxs;
197 ReallocMark _nesting; // assertion check for reallocations
198 public:
199 LRG_List( uint max );
200
201 uint lookup( uint nidx ) const {
202 return _lidxs[nidx];
203 }
204 uint operator[] (uint nidx) const { return lookup(nidx); }
205
206 void map( uint nidx, uint lidx ) {
207 assert( nidx < _cnt, "oob" );
208 _lidxs[nidx] = lidx;
209 }
210 void extend( uint nidx, uint lidx );
211
212 uint Size() const { return _cnt; }
213 };
214
215 //------------------------------IFG--------------------------------------------
216 // InterFerence Graph
217 // An undirected graph implementation. Created with a fixed number of
218 // vertices. Edges can be added & tested. Vertices can be removed, then
219 // added back later with all edges intact. Can add edges between one vertex
220 // and a list of other vertices. Can union vertices (and their edges)
221 // together. The IFG needs to be really really fast, and also fairly
222 // abstract! It needs abstraction so I can fiddle with the implementation to
223 // get even more speed.
224 class PhaseIFG : public Phase {
225 friend class VMStructs;
226 // Current implementation: a triangular adjacency list.
227
228 // Array of adjacency-lists, indexed by live-range number
229 IndexSet *_adjs;
230
231 // Assertion bit for proper use of Squaring
232 bool _is_square;
233
234 // Live range structure goes here
235 LRG *_lrgs; // Array of LRG structures
236
237 public:
238 // Largest live-range number
239 uint _maxlrg;
240
241 Arena *_arena;
242
243 // Keep track of inserted and deleted Nodes
244 VectorSet *_yanked;
245
246 PhaseIFG( Arena *arena );
247 void init( uint maxlrg );
248
249 // Add edge between a and b. Returns true if actually addded.
250 int add_edge( uint a, uint b );
251
252 // Add edge between a and everything in the vector
253 void add_vector( uint a, IndexSet *vec );
254
255 // Test for edge existance
256 int test_edge( uint a, uint b ) const;
257
258 // Square-up matrix for faster Union
259 void SquareUp();
260
261 // Return number of LRG neighbors
262 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
263 // Union edges of b into a on Squared-up matrix
264 void Union( uint a, uint b );
265 // Test for edge in Squared-up matrix
266 int test_edge_sq( uint a, uint b ) const;
267 // Yank a Node and all connected edges from the IFG. Be prepared to
268 // re-insert the yanked Node in reverse order of yanking. Return a
269 // list of neighbors (edges) yanked.
270 IndexSet *remove_node( uint a );
271 // Reinsert a yanked Node
272 void re_insert( uint a );
273 // Return set of neighbors
274 IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
275
276 #ifndef PRODUCT
277 // Dump the IFG
278 void dump() const;
279 void stats() const;
280 void verify( const PhaseChaitin * ) const;
281 #endif
282
283 //--------------- Live Range Accessors
284 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
285
286 // Compute and set effective degree. Might be folded into SquareUp().
287 void Compute_Effective_Degree();
288
289 // Compute effective degree as the sum of neighbors' _sizes.
290 int effective_degree( uint lidx ) const;
291 };
292
293 // TEMPORARILY REPLACED WITH COMMAND LINE FLAG
294
295 //// !!!!! Magic Constants need to move into ad file
296 #ifdef SPARC
297 //#define FLOAT_PRESSURE 30 /* SFLT_REG_mask.Size() - 1 */
298 //#define INT_PRESSURE 23 /* NOTEMP_I_REG_mask.Size() - 1 */
299 #define FLOAT_INCREMENT(regs) regs
300 #else
301 //#define FLOAT_PRESSURE 6
302 //#define INT_PRESSURE 6
303 #define FLOAT_INCREMENT(regs) 1
304 #endif
305
306 //------------------------------Chaitin----------------------------------------
307 // Briggs-Chaitin style allocation, mostly.
308 class PhaseChaitin : public PhaseRegAlloc {
309 friend class VMStructs;
310
311 int _trip_cnt;
312 int _alternate;
313
314 uint _maxlrg; // Max live range number
315 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
316 PhaseLive *_live; // Liveness, used in the interference graph
317 PhaseIFG *_ifg; // Interference graph (for original chunk)
318 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill
319 VectorSet _spilled_once; // Nodes that have been spilled
320 VectorSet _spilled_twice; // Nodes that have been spilled twice
321
322 LRG_List _names; // Map from Nodes to Live RanGes
323
324 // Union-find map. Declared as a short for speed.
325 // Indexed by live-range number, it returns the compacted live-range number
326 LRG_List _uf_map;
327 // Reset the Union-Find map to identity
328 void reset_uf_map( uint maxlrg );
329 // Remove the need for the Union-Find mapping
330 void compress_uf_map_for_nodes( );
331
332 // Combine the Live Range Indices for these 2 Nodes into a single live
333 // range. Future requests for any Node in either live range will
334 // return the live range index for the combined live range.
335 void Union( const Node *src, const Node *dst );
336
337 void new_lrg( const Node *x, uint lrg );
338
339 // Compact live ranges, removing unused ones. Return new maxlrg.
340 void compact();
341
342 uint _lo_degree; // Head of lo-degree LRGs list
343 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list
344 uint _hi_degree; // Head of hi-degree LRGs list
345 uint _simplified; // Linked list head of simplified LRGs
346
347 // Helper functions for Split()
348 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
349 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
350 int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg );
351 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
352 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
353 // True if lidx is used before any real register is def'd in the block
354 bool prompt_use( Block *b, uint lidx );
355 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );
356 // Insert the spill at chosen location. Skip over any intervening Proj's or
357 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block
358 // instead. Update high-pressure indices. Create a new live range.
359 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
360
361 bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
362
363 uint _oldphi; // Node index which separates pre-allocation nodes
364
365 Block **_blks; // Array of blocks sorted by frequency for coalescing
366
367 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
368
369 #ifndef PRODUCT
370 bool _trace_spilling;
371 #endif
372
373 public:
374 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
375 ~PhaseChaitin() {}
376
377 // Convert a Node into a Live Range Index - a lidx
378 uint Find( const Node *n ) {
379 uint lidx = n2lidx(n);
380 uint uf_lidx = _uf_map[lidx];
381 return (uf_lidx == lidx) ? uf_lidx : Find_compress(n);
382 }
383 uint Find_const( uint lrg ) const;
384 uint Find_const( const Node *n ) const;
385
386 // Do all the real work of allocate
387 void Register_Allocate();
388
389 uint n2lidx( const Node *n ) const { return _names[n->_idx]; }
390
391 float high_frequency_lrg() const { return _high_frequency_lrg; }
392
393 #ifndef PRODUCT
394 bool trace_spilling() const { return _trace_spilling; }
395 #endif
396
397 private:
398 // De-SSA the world. Assign registers to Nodes. Use the same register for
399 // all inputs to a PhiNode, effectively coalescing live ranges. Insert
400 // copies as needed.
401 void de_ssa();
402 uint Find_compress( const Node *n );
403 uint Find( uint lidx ) {
404 uint uf_lidx = _uf_map[lidx];
405 return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx);
406 }
407 uint Find_compress( uint lidx );
408
409 uint Find_id( const Node *n ) {
410 uint retval = n2lidx(n);
411 assert(retval == Find(n),"Invalid node to lidx mapping");
412 return retval;
413 }
414
415 // Add edge between reg and everything in the vector.
416 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
417 // information to trim the set of interferences. Return the
418 // count of edges added.
419 void interfere_with_live( uint reg, IndexSet *live );
420 // Count register pressure for asserts
421 uint count_int_pressure( IndexSet *liveout );
422 uint count_float_pressure( IndexSet *liveout );
423
424 // Build the interference graph using virtual registers only.
425 // Used for aggressive coalescing.
426 void build_ifg_virtual( );
427
428 // Build the interference graph using physical registers when available.
429 // That is, if 2 live ranges are simultaneously alive but in their
430 // acceptable register sets do not overlap, then they do not interfere.
431 uint build_ifg_physical( ResourceArea *a );
432
433 // Gather LiveRanGe information, including register masks and base pointer/
434 // derived pointer relationships.
435 void gather_lrg_masks( bool mod_cisc_masks );
436
437 // Force the bases of derived pointers to be alive at GC points.
438 bool stretch_base_pointer_live_ranges( ResourceArea *a );
439 // Helper to stretch above; recursively discover the base Node for
440 // a given derived Node. Easy for AddP-related machine nodes, but
441 // needs to be recursive for derived Phis.
442 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
443
444 // Set the was-lo-degree bit. Conservative coalescing should not change the
445 // colorability of the graph. If any live range was of low-degree before
446 // coalescing, it should Simplify. This call sets the was-lo-degree bit.
447 void set_was_low();
448
449 // Split live-ranges that must spill due to register conflicts (as opposed
450 // to capacity spills). Typically these are things def'd in a register
451 // and used on the stack or vice-versa.
452 void pre_spill();
453
454 // Init LRG caching of degree, numregs. Init lo_degree list.
455 void cache_lrg_info( );
456
457 // Simplify the IFG by removing LRGs of low degree with no copies
458 void Pre_Simplify();
459
460 // Simplify the IFG by removing LRGs of low degree
461 void Simplify();
462
463 // Select colors by re-inserting edges into the IFG.
464 // Return TRUE if any spills occurred.
465 uint Select( );
466 // Helper function for select which allows biased coloring
467 OptoReg::Name choose_color( LRG &lrg, int chunk );
468 // Helper function which implements biasing heuristic
469 OptoReg::Name bias_color( LRG &lrg, int chunk );
470
471 // Split uncolorable live ranges
472 // Return new number of live ranges
473 uint Split( uint maxlrg );
474
475 // Copy 'was_spilled'-edness from one Node to another.
476 void copy_was_spilled( Node *src, Node *dst );
477 // Set the 'spilled_once' or 'spilled_twice' flag on a node.
478 void set_was_spilled( Node *n );
479
480 // Convert ideal spill-nodes into machine loads & stores
481 // Set C->failing when fixup spills could not complete, node limit exceeded.
482 void fixup_spills();
483
484 // Post-Allocation peephole copy removal
485 void post_allocate_copy_removal();
486 Node *skip_copies( Node *c );
487 // Replace the old node with the current live version of that value
488 // and yank the old value if it's dead.
489 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
490 Block *current_block, Node_List& value, Node_List& regnd ) {
491 Node* v = regnd[nreg];
492 assert(v->outcnt() != 0, "no dead values");
493 old->replace_by(v);
494 return yank_if_dead(old, current_block, &value, ®nd);
495 }
496
497 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
498 return yank_if_dead_recurse(old, old, current_block, value, regnd);
499 }
500 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
501 Node_List *value, Node_List *regnd);
502 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
503 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs );
504 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd );
505 bool may_be_copy_of_callee( Node *def ) const;
506
507 // If nreg already contains the same constant as val then eliminate it
508 bool eliminate_copy_of_constant(Node* val, Node* n,
509 Block *current_block, Node_List& value, Node_List ®nd,
510 OptoReg::Name nreg, OptoReg::Name nreg2);
511 // Extend the node to LRG mapping
512 void add_reference( const Node *node, const Node *old_node);
513
514 private:
515
516 static int _final_loads, _final_stores, _final_copies, _final_memoves;
517 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
518 static int _conserv_coalesce, _conserv_coalesce_pair;
519 static int _conserv_coalesce_trie, _conserv_coalesce_quad;
520 static int _post_alloc;
521 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
522 static int _used_cisc_instructions, _unused_cisc_instructions;
523 static int _allocator_attempts, _allocator_successes;
524
525 #ifndef PRODUCT
526 static uint _high_pressure, _low_pressure;
527
528 void dump() const;
529 void dump( const Node *n ) const;
530 void dump( const Block * b ) const;
531 void dump_degree_lists() const;
532 void dump_simplified() const;
533 void dump_lrg( uint lidx, bool defs_only) const;
534 void dump_lrg( uint lidx) const {
535 // dump defs and uses by default
536 dump_lrg(lidx, false);
537 }
538 void dump_bb( uint pre_order ) const;
539
540 // Verify that base pointers and derived pointers are still sane
541 void verify_base_ptrs( ResourceArea *a ) const;
542
543 void verify( ResourceArea *a, bool verify_ifg = false ) const;
544
545 void dump_for_spill_split_recycle() const;
546
547 public:
548 void dump_frame() const;
549 char *dump_register( const Node *n, char *buf ) const;
550 private:
551 static void print_chaitin_statistics();
552 #endif
553 friend class PhaseCoalesce;
554 friend class PhaseAggressiveCoalesce;
555 friend class PhaseConservativeCoalesce;
556 };
557
558 #endif // SHARE_VM_OPTO_CHAITIN_HPP