1 /*
2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
399 uint lidx = n2lidx(n->in(idx));
400 for( uint k = 1; k < n->req(); k++ ) {
401 uint kidx = n2lidx(n->in(k));
402 if( kidx != lidx )
403 _ifg->add_edge( r, kidx );
404 }
405 }
406 } // End of forall instructions in block
407 } // End of forall blocks
408 }
409
410 //------------------------------count_int_pressure-----------------------------
411 uint PhaseChaitin::count_int_pressure( IndexSet *liveout ) {
412 IndexSetIterator elements(liveout);
413 uint lidx;
414 uint cnt = 0;
415 while ((lidx = elements.next()) != 0) {
416 if( lrgs(lidx).mask().is_UP() &&
417 lrgs(lidx).mask_size() &&
418 !lrgs(lidx)._is_float &&
419 lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) )
420 cnt += lrgs(lidx).reg_pressure();
421 }
422 return cnt;
423 }
424
425 //------------------------------count_float_pressure---------------------------
426 uint PhaseChaitin::count_float_pressure( IndexSet *liveout ) {
427 IndexSetIterator elements(liveout);
428 uint lidx;
429 uint cnt = 0;
430 while ((lidx = elements.next()) != 0) {
431 if( lrgs(lidx).mask().is_UP() &&
432 lrgs(lidx).mask_size() &&
433 lrgs(lidx)._is_float )
434 cnt += lrgs(lidx).reg_pressure();
435 }
436 return cnt;
437 }
438
439 //------------------------------lower_pressure---------------------------------
440 // Adjust register pressure down by 1. Capture last hi-to-low transition,
441 static void lower_pressure( LRG *lrg, uint where, Block *b, uint *pressure, uint *hrp_index ) {
442 if( lrg->mask().is_UP() && lrg->mask_size() ) {
443 if( lrg->_is_float ) {
444 pressure[1] -= lrg->reg_pressure();
445 if( pressure[1] == (uint)FLOATPRESSURE ) {
446 hrp_index[1] = where;
447 #ifdef EXACT_PRESSURE
448 if( pressure[1] > b->_freg_pressure )
449 b->_freg_pressure = pressure[1]+1;
450 #else
451 b->_freg_pressure = (uint)FLOATPRESSURE+1;
452 #endif
453 }
454 } else if( lrg->mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
455 pressure[0] -= lrg->reg_pressure();
456 if( pressure[0] == (uint)INTPRESSURE ) {
457 hrp_index[0] = where;
458 #ifdef EXACT_PRESSURE
459 if( pressure[0] > b->_reg_pressure )
460 b->_reg_pressure = pressure[0]+1;
461 #else
462 b->_reg_pressure = (uint)INTPRESSURE+1;
463 #endif
505 break;
506 }
507
508 // Reset block's register pressure values for each ifg construction
509 uint pressure[2], hrp_index[2];
510 pressure[0] = pressure[1] = 0;
511 hrp_index[0] = hrp_index[1] = last_inst+1;
512 b->_reg_pressure = b->_freg_pressure = 0;
513 // Liveout things are presumed live for the whole block. We accumulate
514 // 'area' accordingly. If they get killed in the block, we'll subtract
515 // the unused part of the block from the area.
516 int inst_count = last_inst - first_inst;
517 double cost = (inst_count <= 0) ? 0.0 : b->_freq * double(inst_count);
518 assert(!(cost < 0.0), "negative spill cost" );
519 IndexSetIterator elements(&liveout);
520 uint lidx;
521 while ((lidx = elements.next()) != 0) {
522 LRG &lrg = lrgs(lidx);
523 lrg._area += cost;
524 // Compute initial register pressure
525 if( lrg.mask().is_UP() && lrg.mask_size() ) {
526 if( lrg._is_float ) { // Count float pressure
527 pressure[1] += lrg.reg_pressure();
528 #ifdef EXACT_PRESSURE
529 if( pressure[1] > b->_freg_pressure )
530 b->_freg_pressure = pressure[1];
531 #endif
532 // Count int pressure, but do not count the SP, flags
533 } else if( lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
534 pressure[0] += lrg.reg_pressure();
535 #ifdef EXACT_PRESSURE
536 if( pressure[0] > b->_reg_pressure )
537 b->_reg_pressure = pressure[0];
538 #endif
539 }
540 }
541 }
542 assert( pressure[0] == count_int_pressure (&liveout), "" );
543 assert( pressure[1] == count_float_pressure(&liveout), "" );
544
545 // The IFG is built by a single reverse pass over each basic block.
546 // Starting with the known live-out set, we remove things that get
664 if( liveout.remove( x ) ) {
665 lrgs(x)._area -= cost;
666 // Adjust register pressure.
667 lower_pressure( &lrgs(x), j-1, b, pressure, hrp_index );
668 assert( pressure[0] == count_int_pressure (&liveout), "" );
669 assert( pressure[1] == count_float_pressure(&liveout), "" );
670 }
671 }
672 } // End of if live or not
673
674 // Interfere with everything live. If the defined value must
675 // go in a particular register, just remove that register from
676 // all conflicting parties and avoid the interference.
677
678 // Make exclusions for rematerializable defs. Since rematerializable
679 // DEFs are not bound but the live range is, some uses must be bound.
680 // If we spill live range 'r', it can rematerialize at each use site
681 // according to its bindings.
682 const RegMask &rmask = lrgs(r).mask();
683 if( lrgs(r).is_bound() && !(n->rematerialize()) && rmask.is_NotEmpty() ) {
684 // Smear odd bits; leave only aligned pairs of bits.
685 RegMask r2mask = rmask;
686 r2mask.SmearToPairs();
687 // Check for common case
688 int r_size = lrgs(r).num_regs();
689 OptoReg::Name r_reg = (r_size == 1) ? rmask.find_first_elem() : OptoReg::Physical;
690
691 IndexSetIterator elements(&liveout);
692 uint l;
693 while ((l = elements.next()) != 0) {
694 LRG &lrg = lrgs(l);
695 // If 'l' must spill already, do not further hack his bits.
696 // He'll get some interferences and be forced to spill later.
697 if( lrg._must_spill ) continue;
698 // Remove bound register(s) from 'l's choices
699 RegMask old = lrg.mask();
700 uint old_size = lrg.mask_size();
701 // Remove the bits from LRG 'r' from LRG 'l' so 'l' no
702 // longer interferes with 'r'. If 'l' requires aligned
703 // adjacent pairs, subtract out bit pairs.
704 if( lrg.num_regs() == 2 && !lrg._fat_proj ) {
705 lrg.SUBTRACT( r2mask );
706 lrg.compute_set_mask_size();
707 } else if( r_size != 1 ) {
708 lrg.SUBTRACT( rmask );
709 lrg.compute_set_mask_size();
710 } else { // Common case: size 1 bound removal
711 if( lrg.mask().Member(r_reg) ) {
712 lrg.Remove(r_reg);
713 lrg.set_mask_size(lrg.mask().is_AllStack() ? 65535:old_size-1);
714 }
715 }
716 // If 'l' goes completely dry, it must spill.
717 if( lrg.not_free() ) {
718 // Give 'l' some kind of reasonable mask, so he picks up
719 // interferences (and will spill later).
720 lrg.set_mask( old );
721 lrg.set_mask_size(old_size);
722 must_spill++;
723 lrg._must_spill = 1;
724 lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
725 }
726 }
727 } // End of if bound
746 // they also def flags; if that flag def is unused the
747 // allocator sees a flag-setting instruction with no use of
748 // the flags and assumes it's dead. This keeps the (useless)
749 // flag-setting behavior alive while also keeping the (useful)
750 // memory update effect.
751 for( uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++ ) {
752 Node *def = n->in(k);
753 uint x = n2lidx(def);
754 if( !x ) continue;
755 LRG &lrg = lrgs(x);
756 // No use-side cost for spilling debug info
757 if( k < debug_start )
758 // A USE costs twice block frequency (once for the Load, once
759 // for a Load-delay). Rematerialized uses only cost once.
760 lrg._cost += (def->rematerialize() ? b->_freq : (b->_freq + b->_freq));
761 // It is live now
762 if( liveout.insert( x ) ) {
763 // Newly live things assumed live from here to top of block
764 lrg._area += cost;
765 // Adjust register pressure
766 if( lrg.mask().is_UP() && lrg.mask_size() ) {
767 if( lrg._is_float ) {
768 pressure[1] += lrg.reg_pressure();
769 #ifdef EXACT_PRESSURE
770 if( pressure[1] > b->_freg_pressure )
771 b->_freg_pressure = pressure[1];
772 #endif
773 } else if( lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
774 pressure[0] += lrg.reg_pressure();
775 #ifdef EXACT_PRESSURE
776 if( pressure[0] > b->_reg_pressure )
777 b->_reg_pressure = pressure[0];
778 #endif
779 }
780 }
781 assert( pressure[0] == count_int_pressure (&liveout), "" );
782 assert( pressure[1] == count_float_pressure(&liveout), "" );
783 }
784 assert(!(lrg._area < 0.0), "negative spill area" );
785 }
786 }
787 } // End of reverse pass over all instructions in block
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1 /*
2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
399 uint lidx = n2lidx(n->in(idx));
400 for( uint k = 1; k < n->req(); k++ ) {
401 uint kidx = n2lidx(n->in(k));
402 if( kidx != lidx )
403 _ifg->add_edge( r, kidx );
404 }
405 }
406 } // End of forall instructions in block
407 } // End of forall blocks
408 }
409
410 //------------------------------count_int_pressure-----------------------------
411 uint PhaseChaitin::count_int_pressure( IndexSet *liveout ) {
412 IndexSetIterator elements(liveout);
413 uint lidx;
414 uint cnt = 0;
415 while ((lidx = elements.next()) != 0) {
416 if( lrgs(lidx).mask().is_UP() &&
417 lrgs(lidx).mask_size() &&
418 !lrgs(lidx)._is_float &&
419 !lrgs(lidx)._is_vector &&
420 lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) )
421 cnt += lrgs(lidx).reg_pressure();
422 }
423 return cnt;
424 }
425
426 //------------------------------count_float_pressure---------------------------
427 uint PhaseChaitin::count_float_pressure( IndexSet *liveout ) {
428 IndexSetIterator elements(liveout);
429 uint lidx;
430 uint cnt = 0;
431 while ((lidx = elements.next()) != 0) {
432 if( lrgs(lidx).mask().is_UP() &&
433 lrgs(lidx).mask_size() &&
434 (lrgs(lidx)._is_float || lrgs(lidx)._is_vector))
435 cnt += lrgs(lidx).reg_pressure();
436 }
437 return cnt;
438 }
439
440 //------------------------------lower_pressure---------------------------------
441 // Adjust register pressure down by 1. Capture last hi-to-low transition,
442 static void lower_pressure( LRG *lrg, uint where, Block *b, uint *pressure, uint *hrp_index ) {
443 if (lrg->mask().is_UP() && lrg->mask_size()) {
444 if (lrg->_is_float || lrg->_is_vector) {
445 pressure[1] -= lrg->reg_pressure();
446 if( pressure[1] == (uint)FLOATPRESSURE ) {
447 hrp_index[1] = where;
448 #ifdef EXACT_PRESSURE
449 if( pressure[1] > b->_freg_pressure )
450 b->_freg_pressure = pressure[1]+1;
451 #else
452 b->_freg_pressure = (uint)FLOATPRESSURE+1;
453 #endif
454 }
455 } else if( lrg->mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
456 pressure[0] -= lrg->reg_pressure();
457 if( pressure[0] == (uint)INTPRESSURE ) {
458 hrp_index[0] = where;
459 #ifdef EXACT_PRESSURE
460 if( pressure[0] > b->_reg_pressure )
461 b->_reg_pressure = pressure[0]+1;
462 #else
463 b->_reg_pressure = (uint)INTPRESSURE+1;
464 #endif
506 break;
507 }
508
509 // Reset block's register pressure values for each ifg construction
510 uint pressure[2], hrp_index[2];
511 pressure[0] = pressure[1] = 0;
512 hrp_index[0] = hrp_index[1] = last_inst+1;
513 b->_reg_pressure = b->_freg_pressure = 0;
514 // Liveout things are presumed live for the whole block. We accumulate
515 // 'area' accordingly. If they get killed in the block, we'll subtract
516 // the unused part of the block from the area.
517 int inst_count = last_inst - first_inst;
518 double cost = (inst_count <= 0) ? 0.0 : b->_freq * double(inst_count);
519 assert(!(cost < 0.0), "negative spill cost" );
520 IndexSetIterator elements(&liveout);
521 uint lidx;
522 while ((lidx = elements.next()) != 0) {
523 LRG &lrg = lrgs(lidx);
524 lrg._area += cost;
525 // Compute initial register pressure
526 if (lrg.mask().is_UP() && lrg.mask_size()) {
527 if (lrg._is_float || lrg._is_vector) { // Count float pressure
528 pressure[1] += lrg.reg_pressure();
529 #ifdef EXACT_PRESSURE
530 if( pressure[1] > b->_freg_pressure )
531 b->_freg_pressure = pressure[1];
532 #endif
533 // Count int pressure, but do not count the SP, flags
534 } else if( lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
535 pressure[0] += lrg.reg_pressure();
536 #ifdef EXACT_PRESSURE
537 if( pressure[0] > b->_reg_pressure )
538 b->_reg_pressure = pressure[0];
539 #endif
540 }
541 }
542 }
543 assert( pressure[0] == count_int_pressure (&liveout), "" );
544 assert( pressure[1] == count_float_pressure(&liveout), "" );
545
546 // The IFG is built by a single reverse pass over each basic block.
547 // Starting with the known live-out set, we remove things that get
665 if( liveout.remove( x ) ) {
666 lrgs(x)._area -= cost;
667 // Adjust register pressure.
668 lower_pressure( &lrgs(x), j-1, b, pressure, hrp_index );
669 assert( pressure[0] == count_int_pressure (&liveout), "" );
670 assert( pressure[1] == count_float_pressure(&liveout), "" );
671 }
672 }
673 } // End of if live or not
674
675 // Interfere with everything live. If the defined value must
676 // go in a particular register, just remove that register from
677 // all conflicting parties and avoid the interference.
678
679 // Make exclusions for rematerializable defs. Since rematerializable
680 // DEFs are not bound but the live range is, some uses must be bound.
681 // If we spill live range 'r', it can rematerialize at each use site
682 // according to its bindings.
683 const RegMask &rmask = lrgs(r).mask();
684 if( lrgs(r).is_bound() && !(n->rematerialize()) && rmask.is_NotEmpty() ) {
685 // Check for common case
686 int r_size = lrgs(r).num_regs();
687 OptoReg::Name r_reg = (r_size == 1) ? rmask.find_first_elem() : OptoReg::Physical;
688 // Smear odd bits
689 IndexSetIterator elements(&liveout);
690 uint l;
691 while ((l = elements.next()) != 0) {
692 LRG &lrg = lrgs(l);
693 // If 'l' must spill already, do not further hack his bits.
694 // He'll get some interferences and be forced to spill later.
695 if( lrg._must_spill ) continue;
696 // Remove bound register(s) from 'l's choices
697 RegMask old = lrg.mask();
698 uint old_size = lrg.mask_size();
699 // Remove the bits from LRG 'r' from LRG 'l' so 'l' no
700 // longer interferes with 'r'. If 'l' requires aligned
701 // adjacent pairs, subtract out bit pairs.
702 assert(!lrg._is_vector || !lrg._fat_proj, "sanity");
703 if (lrg.num_regs() > 1 && !lrg._fat_proj) {
704 RegMask r2mask = rmask;
705 // Leave only aligned set of bits.
706 r2mask.smear_to_sets(lrg.num_regs());
707 // It includes vector case.
708 lrg.SUBTRACT( r2mask );
709 lrg.compute_set_mask_size();
710 } else if( r_size != 1 ) { // fat proj
711 lrg.SUBTRACT( rmask );
712 lrg.compute_set_mask_size();
713 } else { // Common case: size 1 bound removal
714 if( lrg.mask().Member(r_reg) ) {
715 lrg.Remove(r_reg);
716 lrg.set_mask_size(lrg.mask().is_AllStack() ? 65535:old_size-1);
717 }
718 }
719 // If 'l' goes completely dry, it must spill.
720 if( lrg.not_free() ) {
721 // Give 'l' some kind of reasonable mask, so he picks up
722 // interferences (and will spill later).
723 lrg.set_mask( old );
724 lrg.set_mask_size(old_size);
725 must_spill++;
726 lrg._must_spill = 1;
727 lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
728 }
729 }
730 } // End of if bound
749 // they also def flags; if that flag def is unused the
750 // allocator sees a flag-setting instruction with no use of
751 // the flags and assumes it's dead. This keeps the (useless)
752 // flag-setting behavior alive while also keeping the (useful)
753 // memory update effect.
754 for( uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++ ) {
755 Node *def = n->in(k);
756 uint x = n2lidx(def);
757 if( !x ) continue;
758 LRG &lrg = lrgs(x);
759 // No use-side cost for spilling debug info
760 if( k < debug_start )
761 // A USE costs twice block frequency (once for the Load, once
762 // for a Load-delay). Rematerialized uses only cost once.
763 lrg._cost += (def->rematerialize() ? b->_freq : (b->_freq + b->_freq));
764 // It is live now
765 if( liveout.insert( x ) ) {
766 // Newly live things assumed live from here to top of block
767 lrg._area += cost;
768 // Adjust register pressure
769 if (lrg.mask().is_UP() && lrg.mask_size()) {
770 if (lrg._is_float || lrg._is_vector) {
771 pressure[1] += lrg.reg_pressure();
772 #ifdef EXACT_PRESSURE
773 if( pressure[1] > b->_freg_pressure )
774 b->_freg_pressure = pressure[1];
775 #endif
776 } else if( lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
777 pressure[0] += lrg.reg_pressure();
778 #ifdef EXACT_PRESSURE
779 if( pressure[0] > b->_reg_pressure )
780 b->_reg_pressure = pressure[0];
781 #endif
782 }
783 }
784 assert( pressure[0] == count_int_pressure (&liveout), "" );
785 assert( pressure[1] == count_float_pressure(&liveout), "" );
786 }
787 assert(!(lrg._area < 0.0), "negative spill area" );
788 }
789 }
790 } // End of reverse pass over all instructions in block
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