1 /*
2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/chaitin.hpp"
28 #include "opto/machnode.hpp"
29
30 // see if this register kind does not requires two registers
31 static bool is_single_register(uint x) {
32 #ifdef _LP64
33 return (x != Op_RegD && x != Op_RegL && x != Op_RegP);
34 #else
35 return (x != Op_RegD && x != Op_RegL);
36 #endif
37 }
38
39 //---------------------------may_be_copy_of_callee-----------------------------
40 // Check to see if we can possibly be a copy of a callee-save value.
41 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
42 // Short circuit if there are no callee save registers
43 if (_matcher.number_of_saved_registers() == 0) return false;
44
45 // Expect only a spill-down and reload on exit for callee-save spills.
46 // Chains of copies cannot be deep.
47 // 5008997 - This is wishful thinking. Register allocator seems to
48 // be splitting live ranges for callee save registers to such
49 // an extent that in large methods the chains can be very long
50 // (50+). The conservative answer is to return true if we don't
51 // know as this prevents optimizations from occurring.
52
53 const int limit = 60;
54 int i;
55 for( i=0; i < limit; i++ ) {
56 if( def->is_Proj() && def->in(0)->is_Start() &&
57 _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
58 return true; // Direct use of callee-save proj
59 if( def->is_Copy() ) // Copies carry value through
60 def = def->in(def->is_Copy());
61 else if( def->is_Phi() ) // Phis can merge it from any direction
62 def = def->in(1);
63 else
64 break;
65 guarantee(def != NULL, "must not resurrect dead copy");
66 }
67 // If we reached the end and didn't find a callee save proj
68 // then this may be a callee save proj so we return true
69 // as the conservative answer. If we didn't reach then end
70 // we must have discovered that it was not a callee save
71 // else we would have returned.
72 return i == limit;
73 }
74
75 //------------------------------yank-----------------------------------
76 // Helper function for yank_if_dead
77 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
78 int blk_adjust=0;
79 Block *oldb = _cfg._bbs[old->_idx];
80 oldb->find_remove(old);
81 // Count 1 if deleting an instruction from the current block
82 if( oldb == current_block ) blk_adjust++;
83 _cfg._bbs.map(old->_idx,NULL);
84 OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
85 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
86 value->map(old_reg,NULL); // Yank from value/regnd maps
87 regnd->map(old_reg,NULL); // This register's value is now unknown
88 }
89 return blk_adjust;
90 }
91
92 #ifdef ASSERT
93 static bool expected_yanked_node(Node *old, Node *orig_old) {
94 // This code is expected only next original nodes:
95 // - load from constant table node which may have next data input nodes:
96 // MachConstantBase, Phi, MachTemp, MachSpillCopy
97 // - load constant node which may have next data input nodes:
98 // MachTemp, MachSpillCopy
99 // - MachSpillCopy
100 // - MachProj and Copy dead nodes
101 if (old->is_MachSpillCopy()) {
102 return true;
103 } else if (old->is_Con()) {
104 return true;
105 } else if (old->is_MachProj()) { // Dead kills projection of Con node
106 return (old == orig_old);
107 } else if (old->is_Copy()) { // Dead copy of a callee-save value
108 return (old == orig_old);
109 } else if (old->is_MachTemp()) {
110 return orig_old->is_Con();
111 } else if (old->is_Phi() || old->is_MachConstantBase()) {
112 return (orig_old->is_Con() && orig_old->is_MachConstant());
113 }
114 return false;
115 }
116 #endif
117
118 //------------------------------yank_if_dead-----------------------------------
119 // Removed edges from 'old'. Yank if dead. Return adjustment counts to
120 // iterators in the current block.
121 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
122 Node_List *value, Node_List *regnd) {
123 int blk_adjust=0;
124 if (old->outcnt() == 0 && old != C->top()) {
125 #ifdef ASSERT
126 if (!expected_yanked_node(old, orig_old)) {
127 tty->print_cr("==============================================");
128 tty->print_cr("orig_old:");
129 orig_old->dump();
130 tty->print_cr("old:");
131 old->dump();
132 assert(false, "unexpected yanked node");
133 }
134 if (old->is_Con())
135 orig_old = old; // Reset to satisfy expected nodes checks.
136 #endif
137 blk_adjust += yank(old, current_block, value, regnd);
138
139 for (uint i = 1; i < old->req(); i++) {
140 Node* n = old->in(i);
141 if (n != NULL) {
142 old->set_req(i, NULL);
143 blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd);
144 }
145 }
146 // Disconnect control and remove precedence edges if any exist
147 old->disconnect_inputs(NULL);
148 }
149 return blk_adjust;
150 }
151
152 //------------------------------use_prior_register-----------------------------
153 // Use the prior value instead of the current value, in an effort to make
154 // the current value go dead. Return block iterator adjustment, in case
155 // we yank some instructions from this block.
156 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) {
157 // No effect?
158 if( def == n->in(idx) ) return 0;
159 // Def is currently dead and can be removed? Do not resurrect
160 if( def->outcnt() == 0 ) return 0;
161
162 // Not every pair of physical registers are assignment compatible,
163 // e.g. on sparc floating point registers are not assignable to integer
164 // registers.
165 const LRG &def_lrg = lrgs(n2lidx(def));
166 OptoReg::Name def_reg = def_lrg.reg();
167 const RegMask &use_mask = n->in_RegMask(idx);
168 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
169 : (use_mask.is_AllStack() != 0));
170 // Check for a copy to or from a misaligned pair.
171 can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair();
172
173 if (!can_use)
174 return 0;
175
176 // Capture the old def in case it goes dead...
177 Node *old = n->in(idx);
178
179 // Save-on-call copies can only be elided if the entire copy chain can go
180 // away, lest we get the same callee-save value alive in 2 locations at
181 // once. We check for the obvious trivial case here. Although it can
182 // sometimes be elided with cooperation outside our scope, here we will just
183 // miss the opportunity. :-(
184 if( may_be_copy_of_callee(def) ) {
185 if( old->outcnt() > 1 ) return 0; // We're the not last user
186 int idx = old->is_Copy();
187 assert( idx, "chain of copies being removed" );
188 Node *old2 = old->in(idx); // Chain of copies
189 if( old2->outcnt() > 1 ) return 0; // old is not the last user
190 int idx2 = old2->is_Copy();
191 if( !idx2 ) return 0; // Not a chain of 2 copies
192 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
193 }
194
195 // Use the new def
196 n->set_req(idx,def);
197 _post_alloc++;
198
199 // Is old def now dead? We successfully yanked a copy?
200 return yank_if_dead(old,current_block,&value,®nd);
201 }
202
203
204 //------------------------------skip_copies------------------------------------
205 // Skip through any number of copies (that don't mod oop-i-ness)
206 Node *PhaseChaitin::skip_copies( Node *c ) {
207 int idx = c->is_Copy();
208 uint is_oop = lrgs(n2lidx(c))._is_oop;
209 while (idx != 0) {
210 guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
211 if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
212 break; // casting copy, not the same value
213 c = c->in(idx);
214 idx = c->is_Copy();
215 }
216 return c;
217 }
218
219 //------------------------------elide_copy-------------------------------------
220 // Remove (bypass) copies along Node n, edge k.
221 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) {
222 int blk_adjust = 0;
223
224 uint nk_idx = n2lidx(n->in(k));
225 OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
226
227 // Remove obvious same-register copies
228 Node *x = n->in(k);
229 int idx;
230 while( (idx=x->is_Copy()) != 0 ) {
231 Node *copy = x->in(idx);
232 guarantee(copy != NULL, "must not resurrect dead copy");
233 if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
234 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
235 if( n->in(k) != copy ) break; // Failed for some cutout?
236 x = copy; // Progress, try again
237 }
238
239 // Phis and 2-address instructions cannot change registers so easily - their
240 // outputs must match their input.
241 if( !can_change_regs )
242 return blk_adjust; // Only check stupid copies!
243
244 // Loop backedges won't have a value-mapping yet
245 if( &value == NULL ) return blk_adjust;
246
247 // Skip through all copies to the _value_ being used. Do not change from
248 // int to pointer. This attempts to jump through a chain of copies, where
249 // intermediate copies might be illegal, i.e., value is stored down to stack
250 // then reloaded BUT survives in a register the whole way.
251 Node *val = skip_copies(n->in(k));
252
253 if (val == x && nk_idx != 0 &&
254 regnd[nk_reg] != NULL && regnd[nk_reg] != x &&
255 n2lidx(x) == n2lidx(regnd[nk_reg])) {
256 // When rematerialzing nodes and stretching lifetimes, the
257 // allocator will reuse the original def for multidef LRG instead
258 // of the current reaching def because it can't know it's safe to
259 // do so. After allocation completes if they are in the same LRG
260 // then it should use the current reaching def instead.
261 n->set_req(k, regnd[nk_reg]);
262 blk_adjust += yank_if_dead(val, current_block, &value, ®nd);
263 val = skip_copies(n->in(k));
264 }
265
266 if( val == x ) return blk_adjust; // No progress?
267
268 bool single = is_single_register(val->ideal_reg());
269 uint val_idx = n2lidx(val);
270 OptoReg::Name val_reg = lrgs(val_idx).reg();
271
272 // See if it happens to already be in the correct register!
273 // (either Phi's direct register, or the common case of the name
274 // never-clobbered original-def register)
275 if( value[val_reg] == val &&
276 // Doubles check both halves
277 ( single || value[val_reg-1] == val ) ) {
278 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
279 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
280 return blk_adjust;
281 }
282
283 // See if we can skip the copy by changing registers. Don't change from
284 // using a register to using the stack unless we know we can remove a
285 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill
286 // ops reading from memory instead of just loading once and using the
287 // register.
288
289 // Also handle duplicate copies here.
290 const Type *t = val->is_Con() ? val->bottom_type() : NULL;
291
292 // Scan all registers to see if this value is around already
293 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
294 if (reg == (uint)nk_reg) {
295 // Found ourselves so check if there is only one user of this
296 // copy and keep on searching for a better copy if so.
297 bool ignore_self = true;
298 x = n->in(k);
299 DUIterator_Fast imax, i = x->fast_outs(imax);
300 Node* first = x->fast_out(i); i++;
301 while (i < imax && ignore_self) {
302 Node* use = x->fast_out(i); i++;
303 if (use != first) ignore_self = false;
304 }
305 if (ignore_self) continue;
306 }
307
308 Node *vv = value[reg];
309 if( !single ) { // Doubles check for aligned-adjacent pair
310 if( (reg&1)==0 ) continue; // Wrong half of a pair
311 if( vv != value[reg-1] ) continue; // Not a complete pair
312 }
313 if( vv == val || // Got a direct hit?
314 (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
315 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
316 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
317 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
318 OptoReg::is_reg(reg) || // turning into a register use OR
319 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
320 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
321 if( n->in(k) == regnd[reg] ) // Success! Quit trying
322 return blk_adjust;
323 } // End of if not degrading to a stack
324 } // End of if found value in another register
325 } // End of scan all machine registers
326 return blk_adjust;
327 }
328
329
330 //
331 // Check if nreg already contains the constant value val. Normal copy
332 // elimination doesn't doesn't work on constants because multiple
333 // nodes can represent the same constant so the type and rule of the
334 // MachNode must be checked to ensure equivalence.
335 //
336 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
337 Block *current_block,
338 Node_List& value, Node_List& regnd,
339 OptoReg::Name nreg, OptoReg::Name nreg2) {
340 if (value[nreg] != val && val->is_Con() &&
341 value[nreg] != NULL && value[nreg]->is_Con() &&
342 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
343 value[nreg]->bottom_type() == val->bottom_type() &&
344 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
345 // This code assumes that two MachNodes representing constants
346 // which have the same rule and the same bottom type will produce
347 // identical effects into a register. This seems like it must be
348 // objectively true unless there are hidden inputs to the nodes
349 // but if that were to change this code would need to updated.
350 // Since they are equivalent the second one if redundant and can
351 // be removed.
352 //
353 // n will be replaced with the old value but n might have
354 // kills projections associated with it so remove them now so that
355 // yank_if_dead will be able to eliminate the copy once the uses
356 // have been transferred to the old[value].
357 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
358 Node* use = n->fast_out(i);
359 if (use->is_Proj() && use->outcnt() == 0) {
360 // Kill projections have no users and one input
361 use->set_req(0, C->top());
362 yank_if_dead(use, current_block, &value, ®nd);
363 --i; --imax;
364 }
365 }
366 _post_alloc++;
367 return true;
368 }
369 return false;
370 }
371
372
373 //------------------------------post_allocate_copy_removal---------------------
374 // Post-Allocation peephole copy removal. We do this in 1 pass over the
375 // basic blocks. We maintain a mapping of registers to Nodes (an array of
376 // Nodes indexed by machine register or stack slot number). NULL means that a
377 // register is not mapped to any Node. We can (want to have!) have several
378 // registers map to the same Node. We walk forward over the instructions
379 // updating the mapping as we go. At merge points we force a NULL if we have
380 // to merge 2 different Nodes into the same register. Phi functions will give
381 // us a new Node if there is a proper value merging. Since the blocks are
382 // arranged in some RPO, we will visit all parent blocks before visiting any
383 // successor blocks (except at loops).
384 //
385 // If we find a Copy we look to see if the Copy's source register is a stack
386 // slot and that value has already been loaded into some machine register; if
387 // so we use machine register directly. This turns a Load into a reg-reg
388 // Move. We also look for reloads of identical constants.
389 //
390 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
391 // source directly and make the copy go dead.
392 void PhaseChaitin::post_allocate_copy_removal() {
393 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
394 ResourceMark rm;
395
396 // Need a mapping from basic block Node_Lists. We need a Node_List to
397 // map from register number to value-producing Node.
398 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
399 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
400 // Need a mapping from basic block Node_Lists. We need a Node_List to
401 // map from register number to register-defining Node.
402 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
403 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
404
405 // We keep unused Node_Lists on a free_list to avoid wasting
406 // memory.
407 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
408
409 // For all blocks
410 for( uint i = 0; i < _cfg._num_blocks; i++ ) {
411 uint j;
412 Block *b = _cfg._blocks[i];
413
414 // Count of Phis in block
415 uint phi_dex;
416 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
417 Node *phi = b->_nodes[phi_dex];
418 if( !phi->is_Phi() )
419 break;
420 }
421
422 // If any predecessor has not been visited, we do not know the state
423 // of registers at the start. Check for this, while updating copies
424 // along Phi input edges
425 bool missing_some_inputs = false;
426 Block *freed = NULL;
427 for( j = 1; j < b->num_preds(); j++ ) {
428 Block *pb = _cfg._bbs[b->pred(j)->_idx];
429 // Remove copies along phi edges
430 for( uint k=1; k<phi_dex; k++ )
431 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
432 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
433 // See if this predecessor's mappings have been used by everybody
434 // who wants them. If so, free 'em.
435 uint k;
436 for( k=0; k<pb->_num_succs; k++ ) {
437 Block *pbsucc = pb->_succs[k];
438 if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
439 break; // Found a future user
440 }
441 if( k >= pb->_num_succs ) { // No more uses, free!
442 freed = pb; // Record last block freed
443 free_list.push(blk2value[pb->_pre_order]);
444 free_list.push(blk2regnd[pb->_pre_order]);
445 }
446 } else { // This block has unvisited (loopback) inputs
447 missing_some_inputs = true;
448 }
449 }
450
451
452 // Extract Node_List mappings. If 'freed' is non-zero, we just popped
453 // 'freed's blocks off the list
454 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
455 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
456 assert( !freed || blk2value[freed->_pre_order] == &value, "" );
457 value.map(_max_reg,NULL);
458 regnd.map(_max_reg,NULL);
459 // Set mappings as OUR mappings
460 blk2value[b->_pre_order] = &value;
461 blk2regnd[b->_pre_order] = ®nd;
462
463 // Initialize value & regnd for this block
464 if( missing_some_inputs ) {
465 // Some predecessor has not yet been visited; zap map to empty
466 for( uint k = 0; k < (uint)_max_reg; k++ ) {
467 value.map(k,NULL);
468 regnd.map(k,NULL);
469 }
470 } else {
471 if( !freed ) { // Didn't get a freebie prior block
472 // Must clone some data
473 freed = _cfg._bbs[b->pred(1)->_idx];
474 Node_List &f_value = *blk2value[freed->_pre_order];
475 Node_List &f_regnd = *blk2regnd[freed->_pre_order];
476 for( uint k = 0; k < (uint)_max_reg; k++ ) {
477 value.map(k,f_value[k]);
478 regnd.map(k,f_regnd[k]);
479 }
480 }
481 // Merge all inputs together, setting to NULL any conflicts.
482 for( j = 1; j < b->num_preds(); j++ ) {
483 Block *pb = _cfg._bbs[b->pred(j)->_idx];
484 if( pb == freed ) continue; // Did self already via freelist
485 Node_List &p_regnd = *blk2regnd[pb->_pre_order];
486 for( uint k = 0; k < (uint)_max_reg; k++ ) {
487 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
488 value.map(k,NULL); // Then no value handy
489 regnd.map(k,NULL);
490 }
491 }
492 }
493 }
494
495 // For all Phi's
496 for( j = 1; j < phi_dex; j++ ) {
497 uint k;
498 Node *phi = b->_nodes[j];
499 uint pidx = n2lidx(phi);
500 OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
501
502 // Remove copies remaining on edges. Check for junk phi.
503 Node *u = NULL;
504 for( k=1; k<phi->req(); k++ ) {
505 Node *x = phi->in(k);
506 if( phi != x && u != x ) // Found a different input
507 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
508 }
509 if( u != NodeSentinel ) { // Junk Phi. Remove
510 b->_nodes.remove(j--); phi_dex--;
511 _cfg._bbs.map(phi->_idx,NULL);
512 phi->replace_by(u);
513 phi->disconnect_inputs(NULL);
514 continue;
515 }
516 // Note that if value[pidx] exists, then we merged no new values here
517 // and the phi is useless. This can happen even with the above phi
518 // removal for complex flows. I cannot keep the better known value here
519 // because locally the phi appears to define a new merged value. If I
520 // keep the better value then a copy of the phi, being unable to use the
521 // global flow analysis, can't "peek through" the phi to the original
522 // reaching value and so will act like it's defining a new value. This
523 // can lead to situations where some uses are from the old and some from
524 // the new values. Not illegal by itself but throws the over-strong
525 // assert in scheduling.
526 if( pidx ) {
527 value.map(preg,phi);
528 regnd.map(preg,phi);
529 OptoReg::Name preg_lo = OptoReg::add(preg,-1);
530 if( !is_single_register(phi->ideal_reg()) ) {
531 value.map(preg_lo,phi);
532 regnd.map(preg_lo,phi);
533 }
534 }
535 }
536
537 // For all remaining instructions
538 for( j = phi_dex; j < b->_nodes.size(); j++ ) {
539 Node *n = b->_nodes[j];
540
541 if( n->outcnt() == 0 && // Dead?
542 n != C->top() && // (ignore TOP, it has no du info)
543 !n->is_Proj() ) { // fat-proj kills
544 j -= yank_if_dead(n,b,&value,®nd);
545 continue;
546 }
547
548 // Improve reaching-def info. Occasionally post-alloc's liveness gives
549 // up (at loop backedges, because we aren't doing a full flow pass).
550 // The presence of a live use essentially asserts that the use's def is
551 // alive and well at the use (or else the allocator fubar'd). Take
552 // advantage of this info to set a reaching def for the use-reg.
553 uint k;
554 for( k = 1; k < n->req(); k++ ) {
555 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
556 guarantee(def != NULL, "no disconnected nodes at this point");
557 uint useidx = n2lidx(def); // useidx is the live range index for this USE
558
559 if( useidx ) {
560 OptoReg::Name ureg = lrgs(useidx).reg();
561 if( !value[ureg] ) {
562 int idx; // Skip occasional useless copy
563 while( (idx=def->is_Copy()) != 0 &&
564 def->in(idx) != NULL && // NULL should not happen
565 ureg == lrgs(n2lidx(def->in(idx))).reg() )
566 def = def->in(idx);
567 Node *valdef = skip_copies(def); // tighten up val through non-useless copies
568 value.map(ureg,valdef); // record improved reaching-def info
569 regnd.map(ureg, def);
570 // Record other half of doubles
571 OptoReg::Name ureg_lo = OptoReg::add(ureg,-1);
572 if( !is_single_register(def->ideal_reg()) &&
573 ( !RegMask::can_represent(ureg_lo) ||
574 lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent
575 !value[ureg_lo] ) {
576 value.map(ureg_lo,valdef); // record improved reaching-def info
577 regnd.map(ureg_lo, def);
578 }
579 }
580 }
581 }
582
583 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
584
585 // Remove copies along input edges
586 for( k = 1; k < n->req(); k++ )
587 j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
588
589 // Unallocated Nodes define no registers
590 uint lidx = n2lidx(n);
591 if( !lidx ) continue;
592
593 // Update the register defined by this instruction
594 OptoReg::Name nreg = lrgs(lidx).reg();
595 // Skip through all copies to the _value_ being defined.
596 // Do not change from int to pointer
597 Node *val = skip_copies(n);
598
599 // Clear out a dead definition before starting so that the
600 // elimination code doesn't have to guard against it. The
601 // definition could in fact be a kill projection with a count of
602 // 0 which is safe but since those are uninteresting for copy
603 // elimination just delete them as well.
604 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
605 regnd.map(nreg, NULL);
606 value.map(nreg, NULL);
607 }
608
609 uint n_ideal_reg = n->ideal_reg();
610 if( is_single_register(n_ideal_reg) ) {
611 // If Node 'n' does not change the value mapped by the register,
612 // then 'n' is a useless copy. Do not update the register->node
613 // mapping so 'n' will go dead.
614 if( value[nreg] != val ) {
615 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
616 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
617 } else {
618 // Update the mapping: record new Node defined by the register
619 regnd.map(nreg,n);
620 // Update mapping for defined *value*, which is the defined
621 // Node after skipping all copies.
622 value.map(nreg,val);
623 }
624 } else if( !may_be_copy_of_callee(n) ) {
625 assert( n->is_Copy(), "" );
626 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
627 }
628 } else {
629 // If the value occupies a register pair, record same info
630 // in both registers.
631 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
632 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
633 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
634 // Sparc occasionally has non-adjacent pairs.
635 // Find the actual other value
636 RegMask tmp = lrgs(lidx).mask();
637 tmp.Remove(nreg);
638 nreg_lo = tmp.find_first_elem();
639 }
640 if( value[nreg] != val || value[nreg_lo] != val ) {
641 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
642 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
643 } else {
644 regnd.map(nreg , n );
645 regnd.map(nreg_lo, n );
646 value.map(nreg ,val);
647 value.map(nreg_lo,val);
648 }
649 } else if( !may_be_copy_of_callee(n) ) {
650 assert( n->is_Copy(), "" );
651 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd);
652 }
653 }
654
655 // Fat projections kill many registers
656 if( n_ideal_reg == MachProjNode::fat_proj ) {
657 RegMask rm = n->out_RegMask();
658 // wow, what an expensive iterator...
659 nreg = rm.find_first_elem();
660 while( OptoReg::is_valid(nreg)) {
661 rm.Remove(nreg);
662 value.map(nreg,n);
663 regnd.map(nreg,n);
664 nreg = rm.find_first_elem();
665 }
666 }
667
668 } // End of for all instructions in the block
669
670 } // End for all blocks
671 }