1 /*
2 * Copyright (c) 1998, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_CODE_VMREG_HPP
26 #define SHARE_VM_CODE_VMREG_HPP
27
28 #include "memory/allocation.hpp"
29 #include "utilities/globalDefinitions.hpp"
30 #ifdef TARGET_ARCH_x86
31 # include "register_x86.hpp"
32 #endif
33 #ifdef TARGET_ARCH_sparc
34 # include "register_sparc.hpp"
35 #endif
36 #ifdef TARGET_ARCH_zero
37 # include "register_zero.hpp"
38 #endif
39 #ifdef TARGET_ARCH_arm
40 # include "register_arm.hpp"
41 #endif
42 #ifdef TARGET_ARCH_ppc
43 # include "register_ppc.hpp"
44 #endif
45 #ifdef COMPILER2
46 #include "opto/adlcVMDeps.hpp"
47 #include "utilities/ostream.hpp"
48 #ifdef TARGET_ARCH_MODEL_x86_32
49 # include "adfiles/adGlobals_x86_32.hpp"
50 #endif
51 #ifdef TARGET_ARCH_MODEL_x86_64
52 # include "adfiles/adGlobals_x86_64.hpp"
53 #endif
54 #ifdef TARGET_ARCH_MODEL_sparc
55 # include "adfiles/adGlobals_sparc.hpp"
56 #endif
57 #ifdef TARGET_ARCH_MODEL_zero
58 # include "adfiles/adGlobals_zero.hpp"
59 #endif
60 #ifdef TARGET_ARCH_MODEL_arm
61 # include "adfiles/adGlobals_arm.hpp"
62 #endif
63 #ifdef TARGET_ARCH_MODEL_ppc
64 # include "adfiles/adGlobals_ppc.hpp"
65 #endif
66 #endif
67
68 //------------------------------VMReg------------------------------------------
69 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
70 // Register numbers below VMRegImpl::stack0 are the same for both. Register
71 // numbers above stack0 are either warped (in the compiler) or unwarped
72 // (in the VM). Unwarped numbers represent stack indices, offsets from
73 // the current stack pointer. Warped numbers are required during compilation
74 // when we do not yet know how big the frame will be.
75
76 class VMRegImpl;
77 typedef VMRegImpl* VMReg;
78
79 class VMRegImpl {
80 // friend class OopMap;
81 friend class VMStructs;
82 friend class OptoReg;
83 // friend class Location;
84 private:
85 enum {
86 BAD = -1
87 };
88
89
90
91 static VMReg stack0;
92 // Names for registers
93 static const char *regName[];
94 static const int register_count;
95
96
97 public:
98
99 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
100
101 const char* name() {
102 if (is_reg()) {
103 return regName[value()];
104 } else if (!is_valid()) {
105 return "BAD";
106 } else {
107 // shouldn't really be called with stack
108 return "STACKED REG";
109 }
110 }
111 static VMReg Bad() { return (VMReg) (intptr_t) BAD; }
112 bool is_valid() const { return ((intptr_t) this) != BAD; }
113 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
114 bool is_reg() const { return is_valid() && !is_stack(); }
115
116 // A concrete register is a value that returns true for is_reg() and is
117 // also a register you could use in the assembler. On machines with
118 // 64bit registers only one half of the VMReg (and OptoReg) is considered
119 // concrete.
120 bool is_concrete();
121
122 // VMRegs are 4 bytes wide on all platforms
123 static const int stack_slot_size;
124 static const int slots_per_word;
125
126
127 // This really ought to check that the register is "real" in the sense that
128 // we don't try and get the VMReg number of a physical register that doesn't
129 // have an expressible part. That would be pd specific code
130 VMReg next() {
131 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
132 return (VMReg)(intptr_t)(value() + 1);
133 }
134 VMReg prev() {
135 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
136 return (VMReg)(intptr_t)(value() - 1);
137 }
138
139
140 intptr_t value() const {return (intptr_t) this; }
141
142 void print_on(outputStream* st) const;
143 void print() const { print_on(tty); }
144
145 // bias a stack slot.
146 // Typically used to adjust a virtual frame slots by amounts that are offset by
147 // amounts that are part of the native abi. The VMReg must be a stack slot
148 // and the result must be also.
149
150 VMReg bias(int offset) {
151 assert(is_stack(), "must be");
152 // VMReg res = VMRegImpl::as_VMReg(value() + offset);
153 VMReg res = stack2reg(reg2stack() + offset);
154 assert(res->is_stack(), "must be");
155 return res;
156 }
157
158 // Convert register numbers to stack slots and vice versa
159 static VMReg stack2reg( int idx ) {
160 return (VMReg) (intptr_t) (stack0->value() + idx);
161 }
162
163 uintptr_t reg2stack() {
164 assert( is_stack(), "Not a stack-based register" );
165 return value() - stack0->value();
166 }
167
168 static void set_regName();
169
170 #ifdef TARGET_ARCH_x86
171 # include "vmreg_x86.hpp"
172 #endif
173 #ifdef TARGET_ARCH_sparc
174 # include "vmreg_sparc.hpp"
175 #endif
176 #ifdef TARGET_ARCH_zero
177 # include "vmreg_zero.hpp"
178 #endif
179 #ifdef TARGET_ARCH_arm
180 # include "vmreg_arm.hpp"
181 #endif
182 #ifdef TARGET_ARCH_ppc
183 # include "vmreg_ppc.hpp"
184 #endif
185
186
187 };
188
189 //---------------------------VMRegPair-------------------------------------------
190 // Pairs of 32-bit registers for arguments.
191 // SharedRuntime::java_calling_convention will overwrite the structs with
192 // the calling convention's registers. VMRegImpl::Bad is returned for any
193 // unused 32-bit register. This happens for the unused high half of Int
194 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
195 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
196 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles
197 // always return a high and a low register, as do 64-bit pointers.
198 //
199 class VMRegPair {
200 private:
201 VMReg _second;
202 VMReg _first;
203 public:
204 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
205 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; }
206 void set2 ( VMReg v ) { _second=v->next(); _first=v; }
207 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; }
208 void set_ptr ( VMReg ptr ) {
209 #ifdef _LP64
210 _second = ptr->next();
211 #else
212 _second = VMRegImpl::Bad();
213 #endif
214 _first = ptr;
215 }
216 // Return true if single register, even if the pair is really just adjacent stack slots
217 bool is_single_reg() const {
218 return (_first->is_valid()) && (_first->value() + 1 == _second->value());
219 }
220
221 // Return true if single stack based "register" where the slot alignment matches input alignment
222 bool is_adjacent_on_stack(int alignment) const {
223 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
224 }
225
226 // Return true if single stack based "register" where the slot alignment matches input alignment
227 bool is_adjacent_aligned_on_stack(int alignment) const {
228 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
229 }
230
231 // Return true if single register but adjacent stack slots do not count
232 bool is_single_phys_reg() const {
233 return (_first->is_reg() && (_first->value() + 1 == _second->value()));
234 }
235
236 VMReg second() const { return _second; }
237 VMReg first() const { return _first; }
238 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; }
239 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
240 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
241 };
242
243 #endif // SHARE_VM_CODE_VMREG_HPP