1 /*
   2  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
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   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
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  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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  24 
  25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP
  26 #define CPU_X86_VM_GLOBALS_X86_HPP
  27 
  28 #include "utilities/globalDefinitions.hpp"
  29 #include "utilities/macros.hpp"
  30 
  31 // Sets the default values for platform dependent flags used by the runtime system.
  32 // (see globals.hpp)
  33 
  34 define_pd_global(bool, ConvertSleepToYield,      true);
  35 define_pd_global(bool, ShareVtableStubs,         true);
  36 define_pd_global(bool, CountInterpCalls,         true);
  37 define_pd_global(bool, NeedsDeoptSuspend,        false); // only register window machines need this
  38 
  39 define_pd_global(bool, ImplicitNullChecks,       true);  // Generate code for implicit null checks
  40 define_pd_global(bool, UncommonNullCast,         true);  // Uncommon-trap NULLs past to check cast
  41 
  42 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't
  43 // assign a different value for C2 without touching a number of files. Use
  44 // #ifdef to minimize the change as it's late in Mantis. -- FIXME.
  45 // c1 doesn't have this problem because the fix to 4858033 assures us
  46 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
  47 // the uep and the vep doesn't get real alignment but just slops on by
  48 // only assured that the entry instruction meets the 5 byte size requirement.
  49 #ifdef COMPILER2
  50 define_pd_global(intx, CodeEntryAlignment,       32);
  51 #else
  52 define_pd_global(intx, CodeEntryAlignment,       16);
  53 #endif // COMPILER2
  54 define_pd_global(intx, OptoLoopAlignment,        16);
  55 define_pd_global(intx, InlineFrequencyCount,     100);
  56 define_pd_global(intx, InlineSmallCode,          1000);
  57 
  58 define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3));
  59 define_pd_global(intx, StackRedPages, 1);
  60 #ifdef AMD64
  61 // Very large C++ stack frames using solaris-amd64 optimized builds
  62 // due to lack of optimization caused by C++ compiler bugs
  63 define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2));
  64 #else
  65 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5));
  66 #endif // AMD64
  67 
  68 define_pd_global(intx, PreInflateSpin,           10);
  69 
  70 define_pd_global(bool, RewriteBytecodes,     true);
  71 define_pd_global(bool, RewriteFrequentPairs, true);
  72 
  73 #ifdef _ALLBSD_SOURCE
  74 define_pd_global(bool, UseMembar,            true);
  75 #else
  76 define_pd_global(bool, UseMembar,            false);
  77 #endif
  78 
  79 // GC Ergo Flags
  80 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
  81 
  82 define_pd_global(uintx, TypeProfileLevel, 111);
  83 
  84 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
  85                                                                             \
  86   develop(bool, IEEEPrecision, true,                                        \
  87           "Enables IEEE precision (for INTEL only)")                        \
  88                                                                             \
  89   product(intx, FenceInstruction, 0,                                        \
  90           "(Unsafe,Unstable) Experimental")                                 \
  91                                                                             \
  92   product(intx,  ReadPrefetchInstr, 0,                                      \
  93           "Prefetch instruction to prefetch ahead")                         \
  94                                                                             \
  95   product(bool, UseStoreImmI16, true,                                       \
  96           "Use store immediate 16-bits value instruction on x86")           \
  97                                                                             \
  98   product(intx, UseAVX, 99,                                                 \
  99           "Highest supported AVX instructions set on x86/x64")              \
 100                                                                             \
 101   product(bool, UseCLMUL, false,                                            \
 102           "Control whether CLMUL instructions can be used on x86/x64")      \
 103                                                                             \
 104   diagnostic(bool, UseIncDec, true,                                         \
 105           "Use INC, DEC instructions on x86")                               \
 106                                                                             \
 107   product(bool, UseNewLongLShift, false,                                    \
 108           "Use optimized bitwise shift left")                               \
 109                                                                             \
 110   product(bool, UseAddressNop, false,                                       \
 111           "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
 112                                                                             \
 113   product(bool, UseXmmLoadAndClearUpper, true,                              \
 114           "Load low part of XMM register and clear upper part")             \
 115                                                                             \
 116   product(bool, UseXmmRegToRegMoveAll, false,                               \
 117           "Copy all XMM register bits when moving value between registers") \
 118                                                                             \
 119   product(bool, UseXmmI2D, false,                                           \
 120           "Use SSE2 CVTDQ2PD instruction to convert Integer to Double")     \
 121                                                                             \
 122   product(bool, UseXmmI2F, false,                                           \
 123           "Use SSE2 CVTDQ2PS instruction to convert Integer to Float")      \
 124                                                                             \
 125   product(bool, UseUnalignedLoadStores, false,                              \
 126           "Use SSE2 MOVDQU instruction for Arraycopy")                      \
 127                                                                             \
 128   product(bool, UseFastStosb, false,                                        \
 129           "Use fast-string operation for zeroing: rep stosb")               \
 130                                                                             \
 131   /* assembler */                                                           \
 132   product(bool, Use486InstrsOnly, false,                                    \
 133           "Use 80486 Compliant instruction subset")                         \
 134                                                                             \
 135   product(bool, UseCountLeadingZerosInstruction, false,                     \
 136           "Use count leading zeros instruction")                            \
 137                                                                             \
 138   product(bool, UseCountTrailingZerosInstruction, false,                    \
 139           "Use count trailing zeros instruction")                           \
 140                                                                             \
 141   product(bool, UseBMI1Instructions, false,                                 \
 142           "Use BMI instructions")
 143 
 144 #endif // CPU_X86_VM_GLOBALS_X86_HPP