111 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
112 \
113 product(bool, UseXmmLoadAndClearUpper, true, \
114 "Load low part of XMM register and clear upper part") \
115 \
116 product(bool, UseXmmRegToRegMoveAll, false, \
117 "Copy all XMM register bits when moving value between registers") \
118 \
119 product(bool, UseXmmI2D, false, \
120 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
121 \
122 product(bool, UseXmmI2F, false, \
123 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
124 \
125 product(bool, UseUnalignedLoadStores, false, \
126 "Use SSE2 MOVDQU instruction for Arraycopy") \
127 \
128 product(bool, UseFastStosb, false, \
129 "Use fast-string operation for zeroing: rep stosb") \
130 \
131 /* assembler */ \
132 product(bool, Use486InstrsOnly, false, \
133 "Use 80486 Compliant instruction subset") \
134 \
135 product(bool, UseCountLeadingZerosInstruction, false, \
136 "Use count leading zeros instruction") \
137 \
138 product(bool, UseCountTrailingZerosInstruction, false, \
139 "Use count trailing zeros instruction") \
140 \
141 product(bool, UseBMI1Instructions, false, \
142 "Use BMI instructions")
143
144 #endif // CPU_X86_VM_GLOBALS_X86_HPP
|
111 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
112 \
113 product(bool, UseXmmLoadAndClearUpper, true, \
114 "Load low part of XMM register and clear upper part") \
115 \
116 product(bool, UseXmmRegToRegMoveAll, false, \
117 "Copy all XMM register bits when moving value between registers") \
118 \
119 product(bool, UseXmmI2D, false, \
120 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
121 \
122 product(bool, UseXmmI2F, false, \
123 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
124 \
125 product(bool, UseUnalignedLoadStores, false, \
126 "Use SSE2 MOVDQU instruction for Arraycopy") \
127 \
128 product(bool, UseFastStosb, false, \
129 "Use fast-string operation for zeroing: rep stosb") \
130 \
131 /* Use Restricted Transactional Memory for lock eliding */ \
132 experimental(bool, UseRTMLocking, false, \
133 "Enable RTM lock eliding for inflated locks in compiled code") \
134 \
135 experimental(bool, UseRTMForStackLocks, false, \
136 "Enable RTM lock eliding for stack locks in compiled code") \
137 \
138 experimental(bool, UseRTMDeopt, false, \
139 "Perform deopt and recompilation based on RTM abort ratio") \
140 \
141 experimental(uintx, RTMRetryCount, 5, \
142 "Number of RTM retries on lock abort or busy") \
143 \
144 experimental(intx, RTMSpinLoopCount, 100, \
145 "Spin count for lock to become free before RTM retry") \
146 \
147 experimental(intx, RTMAbortThreshold, 1000, \
148 "Calculate abort ratio after this number of aborts") \
149 \
150 experimental(intx, RTMLockingThreshold, 10000, \
151 "Lock count at which to do RTM lock eliding without " \
152 "abort ratio calculation") \
153 \
154 experimental(intx, RTMAbortRatio, 50, \
155 "Lock abort ratio at which to stop use RTM lock eliding") \
156 \
157 experimental(intx, RTMTotalCountIncrRate, 64, \
158 "Increment total RTM attempted lock count once every n times") \
159 \
160 experimental(intx, RTMLockingCalculationDelay, 0, \
161 "Number of milliseconds to wait before start calculating aborts " \
162 "for RTM locking") \
163 \
164 experimental(bool, UseRTMXendForLockBusy, false, \
165 "Use RTM Xend instead of Xabort when lock busy") \
166 \
167 /* assembler */ \
168 product(bool, Use486InstrsOnly, false, \
169 "Use 80486 Compliant instruction subset") \
170 \
171 product(bool, UseCountLeadingZerosInstruction, false, \
172 "Use count leading zeros instruction") \
173 \
174 product(bool, UseCountTrailingZerosInstruction, false, \
175 "Use count trailing zeros instruction") \
176 \
177 product(bool, UseBMI1Instructions, false, \
178 "Use BMI instructions")
179
180 #endif // CPU_X86_VM_GLOBALS_X86_HPP
|