1434 #endif 1435 1436 void orl(Address dst, int32_t imm32); 1437 void orl(Register dst, int32_t imm32); 1438 void orl(Register dst, Address src); 1439 void orl(Register dst, Register src); 1440 1441 void orq(Address dst, int32_t imm32); 1442 void orq(Register dst, int32_t imm32); 1443 void orq(Register dst, Address src); 1444 void orq(Register dst, Register src); 1445 1446 // Pack with unsigned saturation 1447 void packuswb(XMMRegister dst, XMMRegister src); 1448 void packuswb(XMMRegister dst, Address src); 1449 void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256); 1450 1451 // Pemutation of 64bit words 1452 void vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256); 1453 1454 // SSE4.2 string instructions 1455 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1456 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1457 1458 // SSE 4.1 extract 1459 void pextrd(Register dst, XMMRegister src, int imm8); 1460 void pextrq(Register dst, XMMRegister src, int imm8); 1461 1462 // SSE 4.1 insert 1463 void pinsrd(XMMRegister dst, Register src, int imm8); 1464 void pinsrq(XMMRegister dst, Register src, int imm8); 1465 1466 // SSE4.1 packed move 1467 void pmovzxbw(XMMRegister dst, XMMRegister src); 1468 void pmovzxbw(XMMRegister dst, Address src); 1469 1470 #ifndef _LP64 // no 32bit push/pop on amd64 1471 void popl(Address dst); 1472 #endif 1473 1518 void punpcklbw(XMMRegister dst, XMMRegister src); 1519 void punpcklbw(XMMRegister dst, Address src); 1520 1521 // Interleave Low Doublewords 1522 void punpckldq(XMMRegister dst, XMMRegister src); 1523 void punpckldq(XMMRegister dst, Address src); 1524 1525 // Interleave Low Quadwords 1526 void punpcklqdq(XMMRegister dst, XMMRegister src); 1527 1528 #ifndef _LP64 // no 32bit push/pop on amd64 1529 void pushl(Address src); 1530 #endif 1531 1532 void pushq(Address src); 1533 1534 void rcll(Register dst, int imm8); 1535 1536 void rclq(Register dst, int imm8); 1537 1538 void ret(int imm16); 1539 1540 void sahf(); 1541 1542 void sarl(Register dst, int imm8); 1543 void sarl(Register dst); 1544 1545 void sarq(Register dst, int imm8); 1546 void sarq(Register dst); 1547 1548 void sbbl(Address dst, int32_t imm32); 1549 void sbbl(Register dst, int32_t imm32); 1550 void sbbl(Register dst, Address src); 1551 void sbbl(Register dst, Register src); 1552 1553 void sbbq(Address dst, int32_t imm32); 1554 void sbbq(Register dst, int32_t imm32); 1555 void sbbq(Register dst, Address src); 1556 void sbbq(Register dst, Register src); 1557 1615 1616 void testl(Register dst, int32_t imm32); 1617 void testl(Register dst, Register src); 1618 void testl(Register dst, Address src); 1619 1620 void testq(Register dst, int32_t imm32); 1621 void testq(Register dst, Register src); 1622 1623 // BMI - count trailing zeros 1624 void tzcntl(Register dst, Register src); 1625 void tzcntq(Register dst, Register src); 1626 1627 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS 1628 void ucomisd(XMMRegister dst, Address src); 1629 void ucomisd(XMMRegister dst, XMMRegister src); 1630 1631 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS 1632 void ucomiss(XMMRegister dst, Address src); 1633 void ucomiss(XMMRegister dst, XMMRegister src); 1634 1635 void xaddl(Address dst, Register src); 1636 1637 void xaddq(Address dst, Register src); 1638 1639 void xchgl(Register reg, Address adr); 1640 void xchgl(Register dst, Register src); 1641 1642 void xchgq(Register reg, Address adr); 1643 void xchgq(Register dst, Register src); 1644 1645 // Get Value of Extended Control Register 1646 void xgetbv(); 1647 1648 void xorl(Register dst, int32_t imm32); 1649 void xorl(Register dst, Address src); 1650 void xorl(Register dst, Register src); 1651 1652 void xorq(Register dst, Address src); 1653 void xorq(Register dst, Register src); 1654 1655 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0 1656 1657 // AVX 3-operands scalar instructions (encoded with VEX prefix) 1658 1659 void vaddsd(XMMRegister dst, XMMRegister nds, Address src); 1660 void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src); 1661 void vaddss(XMMRegister dst, XMMRegister nds, Address src); 1662 void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src); 1663 void vdivsd(XMMRegister dst, XMMRegister nds, Address src); 1664 void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src); | 1434 #endif 1435 1436 void orl(Address dst, int32_t imm32); 1437 void orl(Register dst, int32_t imm32); 1438 void orl(Register dst, Address src); 1439 void orl(Register dst, Register src); 1440 1441 void orq(Address dst, int32_t imm32); 1442 void orq(Register dst, int32_t imm32); 1443 void orq(Register dst, Address src); 1444 void orq(Register dst, Register src); 1445 1446 // Pack with unsigned saturation 1447 void packuswb(XMMRegister dst, XMMRegister src); 1448 void packuswb(XMMRegister dst, Address src); 1449 void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256); 1450 1451 // Pemutation of 64bit words 1452 void vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256); 1453 1454 void pause(); 1455 1456 // SSE4.2 string instructions 1457 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1458 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1459 1460 // SSE 4.1 extract 1461 void pextrd(Register dst, XMMRegister src, int imm8); 1462 void pextrq(Register dst, XMMRegister src, int imm8); 1463 1464 // SSE 4.1 insert 1465 void pinsrd(XMMRegister dst, Register src, int imm8); 1466 void pinsrq(XMMRegister dst, Register src, int imm8); 1467 1468 // SSE4.1 packed move 1469 void pmovzxbw(XMMRegister dst, XMMRegister src); 1470 void pmovzxbw(XMMRegister dst, Address src); 1471 1472 #ifndef _LP64 // no 32bit push/pop on amd64 1473 void popl(Address dst); 1474 #endif 1475 1520 void punpcklbw(XMMRegister dst, XMMRegister src); 1521 void punpcklbw(XMMRegister dst, Address src); 1522 1523 // Interleave Low Doublewords 1524 void punpckldq(XMMRegister dst, XMMRegister src); 1525 void punpckldq(XMMRegister dst, Address src); 1526 1527 // Interleave Low Quadwords 1528 void punpcklqdq(XMMRegister dst, XMMRegister src); 1529 1530 #ifndef _LP64 // no 32bit push/pop on amd64 1531 void pushl(Address src); 1532 #endif 1533 1534 void pushq(Address src); 1535 1536 void rcll(Register dst, int imm8); 1537 1538 void rclq(Register dst, int imm8); 1539 1540 void rdtsc(); 1541 1542 void ret(int imm16); 1543 1544 void sahf(); 1545 1546 void sarl(Register dst, int imm8); 1547 void sarl(Register dst); 1548 1549 void sarq(Register dst, int imm8); 1550 void sarq(Register dst); 1551 1552 void sbbl(Address dst, int32_t imm32); 1553 void sbbl(Register dst, int32_t imm32); 1554 void sbbl(Register dst, Address src); 1555 void sbbl(Register dst, Register src); 1556 1557 void sbbq(Address dst, int32_t imm32); 1558 void sbbq(Register dst, int32_t imm32); 1559 void sbbq(Register dst, Address src); 1560 void sbbq(Register dst, Register src); 1561 1619 1620 void testl(Register dst, int32_t imm32); 1621 void testl(Register dst, Register src); 1622 void testl(Register dst, Address src); 1623 1624 void testq(Register dst, int32_t imm32); 1625 void testq(Register dst, Register src); 1626 1627 // BMI - count trailing zeros 1628 void tzcntl(Register dst, Register src); 1629 void tzcntq(Register dst, Register src); 1630 1631 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS 1632 void ucomisd(XMMRegister dst, Address src); 1633 void ucomisd(XMMRegister dst, XMMRegister src); 1634 1635 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS 1636 void ucomiss(XMMRegister dst, Address src); 1637 void ucomiss(XMMRegister dst, XMMRegister src); 1638 1639 void xabort(int8_t imm8); 1640 1641 void xaddl(Address dst, Register src); 1642 1643 void xaddq(Address dst, Register src); 1644 1645 void xbegin(Label& abort, relocInfo::relocType rtype = relocInfo::none); 1646 1647 void xchgl(Register reg, Address adr); 1648 void xchgl(Register dst, Register src); 1649 1650 void xchgq(Register reg, Address adr); 1651 void xchgq(Register dst, Register src); 1652 1653 void xend(); 1654 1655 // Get Value of Extended Control Register 1656 void xgetbv(); 1657 1658 void xorl(Register dst, int32_t imm32); 1659 void xorl(Register dst, Address src); 1660 void xorl(Register dst, Register src); 1661 1662 void xorq(Register dst, Address src); 1663 void xorq(Register dst, Register src); 1664 1665 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0 1666 1667 // AVX 3-operands scalar instructions (encoded with VEX prefix) 1668 1669 void vaddsd(XMMRegister dst, XMMRegister nds, Address src); 1670 void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src); 1671 void vaddss(XMMRegister dst, XMMRegister nds, Address src); 1672 void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src); 1673 void vdivsd(XMMRegister dst, XMMRegister nds, Address src); 1674 void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src); |