1 /*
   2  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
  26 #define SHARE_VM_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/callnode.hpp"
  29 #include "opto/matcher.hpp"
  30 #include "opto/multnode.hpp"
  31 #include "opto/node.hpp"
  32 #include "opto/regmask.hpp"
  33 
  34 class BiasedLockingCounters;
  35 class BufferBlob;
  36 class CodeBuffer;
  37 class JVMState;
  38 class MachCallDynamicJavaNode;
  39 class MachCallJavaNode;
  40 class MachCallLeafNode;
  41 class MachCallNode;
  42 class MachCallRuntimeNode;
  43 class MachCallStaticJavaNode;
  44 class MachEpilogNode;
  45 class MachIfNode;
  46 class MachNullCheckNode;
  47 class MachOper;
  48 class MachProjNode;
  49 class MachPrologNode;
  50 class MachReturnNode;
  51 class MachSafePointNode;
  52 class MachSpillCopyNode;
  53 class Matcher;
  54 class PhaseRegAlloc;
  55 class RegMask;
  56 class State;
  57 
  58 //---------------------------MachOper------------------------------------------
  59 class MachOper : public ResourceObj {
  60 public:
  61   // Allocate right next to the MachNodes in the same arena
  62   void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
  63 
  64   // Opcode
  65   virtual uint opcode() const = 0;
  66 
  67   // Number of input edges.
  68   // Generally at least 1
  69   virtual uint num_edges() const { return 1; }
  70   // Array of Register masks
  71   virtual const RegMask *in_RegMask(int index) const;
  72 
  73   // Methods to output the encoding of the operand
  74 
  75   // Negate conditional branches.  Error for non-branch Nodes
  76   virtual void negate();
  77 
  78   // Return the value requested
  79   // result register lookup, corresponding to int_format
  80   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  81   // input register lookup, corresponding to ext_format
  82   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  83 
  84   // helpers for MacroAssembler generation from ADLC
  85   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  86     return ::as_Register(reg(ra_, node));
  87   }
  88   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  89     return ::as_Register(reg(ra_, node, idx));
  90   }
  91   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  92     return ::as_FloatRegister(reg(ra_, node));
  93   }
  94   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  95     return ::as_FloatRegister(reg(ra_, node, idx));
  96   }
  97 
  98 #if defined(IA32) || defined(AMD64)
  99   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 100     return ::as_XMMRegister(reg(ra_, node));
 101   }
 102   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 103     return ::as_XMMRegister(reg(ra_, node, idx));
 104   }
 105 #endif
 106   // CondRegister reg converter
 107 #if defined(PPC64)
 108   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 109     return ::as_ConditionRegister(reg(ra_, node));
 110   }
 111   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 112     return ::as_ConditionRegister(reg(ra_, node, idx));
 113   }
 114 #endif
 115 
 116   virtual intptr_t  constant() const;
 117   virtual relocInfo::relocType constant_reloc() const;
 118   virtual jdouble constantD() const;
 119   virtual jfloat  constantF() const;
 120   virtual jlong   constantL() const;
 121   virtual TypeOopPtr *oop() const;
 122   virtual int  ccode() const;
 123   // A zero, default, indicates this value is not needed.
 124   // May need to lookup the base register, as done in int_ and ext_format
 125   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 126   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 127   virtual int  scale() const;
 128   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 129   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 130   // Check for PC-Relative displacement
 131   virtual relocInfo::relocType disp_reloc() const;
 132   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 133   virtual int  base_position()  const;  // base edge position, or -1
 134   virtual int  index_position() const;  // index edge position, or -1
 135 
 136   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 137   // Only returns non-null value for i486.ad's indOffset32X
 138   virtual const TypePtr *disp_as_type() const { return NULL; }
 139 
 140   // Return the label
 141   virtual Label *label() const;
 142 
 143   // Return the method's address
 144   virtual intptr_t  method() const;
 145 
 146   // Hash and compare over operands are currently identical
 147   virtual uint  hash() const;
 148   virtual uint  cmp( const MachOper &oper ) const;
 149 
 150   // Virtual clone, since I do not know how big the MachOper is.
 151   virtual MachOper *clone(Compile* C) const = 0;
 152 
 153   // Return ideal Type from simple operands.  Fail for complex operands.
 154   virtual const Type *type() const;
 155 
 156   // Set an integer offset if we have one, or error otherwise
 157   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 158 
 159 #ifndef PRODUCT
 160   // Return name of operand
 161   virtual const char    *Name() const { return "???";}
 162 
 163   // Methods to output the text version of the operand
 164   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 165   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 166 
 167   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 168 
 169   // Check whether o is a valid oper.
 170   static bool notAnOper(const MachOper *o) {
 171     if (o == NULL)                   return true;
 172     if (((intptr_t)o & 1) != 0)      return true;
 173     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 174     return false;
 175   }
 176 #endif // !PRODUCT
 177 };
 178 
 179 //------------------------------MachNode---------------------------------------
 180 // Base type for all machine specific nodes.  All node classes generated by the
 181 // ADLC inherit from this class.
 182 class MachNode : public Node {
 183 public:
 184   MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
 185     init_class_id(Class_Mach);
 186   }
 187   // Required boilerplate
 188   virtual uint size_of() const { return sizeof(MachNode); }
 189   virtual int  Opcode() const;          // Always equal to MachNode
 190   virtual uint rule() const = 0;        // Machine-specific opcode
 191   // Number of inputs which come before the first operand.
 192   // Generally at least 1, to skip the Control input
 193   virtual uint oper_input_base() const { return 1; }
 194   // Position of constant base node in node's inputs. -1 if
 195   // no constant base node input.
 196   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 197 
 198   // Copy inputs and operands to new node of instruction.
 199   // Called from cisc_version() and short_branch_version().
 200   // !!!! The method's body is defined in ad_<arch>.cpp file.
 201   void fill_new_machnode(MachNode *n, Compile* C) const;
 202 
 203   // Return an equivalent instruction using memory for cisc_operand position
 204   virtual MachNode *cisc_version(int offset, Compile* C);
 205   // Modify this instruction's register mask to use stack version for cisc_operand
 206   virtual void use_cisc_RegMask();
 207 
 208   // Support for short branches
 209   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 210 
 211   // Avoid back to back some instructions on some CPUs.
 212   bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
 213 
 214   // instruction implemented with a call
 215   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 216 
 217   // First index in _in[] corresponding to operand, or -1 if there is none
 218   int  operand_index(uint operand) const;
 219   int  operand_index(const MachOper *oper) const;
 220 
 221   // Register class input is expected in
 222   virtual const RegMask &in_RegMask(uint) const;
 223 
 224   // cisc-spillable instructions redefine for use by in_RegMask
 225   virtual const RegMask *cisc_RegMask() const { return NULL; }
 226 
 227   // If this instruction is a 2-address instruction, then return the
 228   // index of the input which must match the output.  Not nessecary
 229   // for instructions which bind the input and output register to the
 230   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 231   // both an input and an output).  It is nessecary when the input and
 232   // output have choices - but they must use the same choice.
 233   virtual uint two_adr( ) const { return 0; }
 234 
 235   // Array of complex operand pointers.  Each corresponds to zero or
 236   // more leafs.  Must be set by MachNode constructor to point to an
 237   // internal array of MachOpers.  The MachOper array is sized by
 238   // specific MachNodes described in the ADL.
 239   uint _num_opnds;
 240   MachOper **_opnds;
 241   uint  num_opnds() const { return _num_opnds; }
 242 
 243   // Emit bytes into cbuf
 244   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 245   // Expand node after register allocation.
 246   // Node is replaced by several nodes in the postalloc expand phase.
 247   // Corresponding methods are generated for nodes if they specify
 248   // postalloc_expand. See block.cpp for more documentation.
 249   virtual bool requires_postalloc_expand() const { return false; }
 250   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 251   // Size of instruction in bytes
 252   virtual uint  size(PhaseRegAlloc *ra_) const;
 253   // Helper function that computes size by emitting code
 254   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 255 
 256   // Return the alignment required (in units of relocInfo::addr_unit())
 257   // for this instruction (must be a power of 2)
 258   virtual int   alignment_required() const { return 1; }
 259 
 260   // Return the padding (in bytes) to be emitted before this
 261   // instruction to properly align it.
 262   virtual int   compute_padding(int current_offset) const { return 0; }
 263 
 264   // Return number of relocatable values contained in this instruction
 265   virtual int   reloc() const { return 0; }
 266 
 267   // Return number of words used for double constants in this instruction
 268   virtual int   ins_num_consts() const { return 0; }
 269 
 270   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 271   virtual uint  hash() const;
 272   virtual uint  cmp( const Node &n ) const;
 273 
 274   // Expand method for MachNode, replaces nodes representing pseudo
 275   // instructions with a set of nodes which represent real machine
 276   // instructions and compute the same value.
 277   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 278 
 279   // Bottom_type call; value comes from operand0
 280   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 281   virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
 282 
 283   // If this is a memory op, return the base pointer and fixed offset.
 284   // If there are no such, return NULL.  If there are multiple addresses
 285   // or the address is indeterminate (rare cases) then return (Node*)-1,
 286   // which serves as node bottom.
 287   // If the offset is not statically determined, set it to Type::OffsetBot.
 288   // This method is free to ignore stack slots if that helps.
 289   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 290   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 291   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 292 
 293   // Helper for get_base_and_disp: find the base and index input nodes.
 294   // Returns the MachOper as determined by memory_operand(), for use, if
 295   // needed by the caller. If (MachOper *)-1 is returned, base and index
 296   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 297   // index are set to NULL.
 298   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 299 
 300   // Helper for memory_inputs:  Which operand carries the necessary info?
 301   // By default, returns NULL, which means there is no such operand.
 302   // If it returns (MachOper*)-1, this means there are multiple memories.
 303   virtual const MachOper* memory_operand() const { return NULL; }
 304 
 305   // Call "get_base_and_disp" to decide which category of memory is used here.
 306   virtual const class TypePtr *adr_type() const;
 307 
 308   // Apply peephole rule(s) to this instruction
 309   virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
 310 
 311   // Top-level ideal Opcode matched
 312   virtual int ideal_Opcode()     const { return Op_Node; }
 313 
 314   // Adds the label for the case
 315   virtual void add_case_label( int switch_val, Label* blockLabel);
 316 
 317   // Set the absolute address for methods
 318   virtual void method_set( intptr_t addr );
 319 
 320   // Should we clone rather than spill this instruction?
 321   bool rematerialize() const;
 322 
 323   // Get the pipeline info
 324   static const Pipeline *pipeline_class();
 325   virtual const Pipeline *pipeline() const;
 326 
 327   // Returns true if this node is a check that can be implemented with a trap.
 328   virtual bool is_TrapBasedCheckNode() const { return false; }
 329 
 330 #ifndef PRODUCT
 331   virtual const char *Name() const = 0; // Machine-specific name
 332   virtual void dump_spec(outputStream *st) const; // Print per-node info
 333   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 334 #endif
 335 };
 336 
 337 //------------------------------MachIdealNode----------------------------
 338 // Machine specific versions of nodes that must be defined by user.
 339 // These are not converted by matcher from ideal nodes to machine nodes
 340 // but are inserted into the code by the compiler.
 341 class MachIdealNode : public MachNode {
 342 public:
 343   MachIdealNode( ) {}
 344 
 345   // Define the following defaults for non-matched machine nodes
 346   virtual uint oper_input_base() const { return 0; }
 347   virtual uint rule()            const { return 9999999; }
 348   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 349 };
 350 
 351 //------------------------------MachTypeNode----------------------------
 352 // Machine Nodes that need to retain a known Type.
 353 class MachTypeNode : public MachNode {
 354   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 355 public:
 356   MachTypeNode( ) {}
 357   const Type *_bottom_type;
 358 
 359   virtual const class Type *bottom_type() const { return _bottom_type; }
 360 #ifndef PRODUCT
 361   virtual void dump_spec(outputStream *st) const;
 362 #endif
 363 };
 364 
 365 //------------------------------MachBreakpointNode----------------------------
 366 // Machine breakpoint or interrupt Node
 367 class MachBreakpointNode : public MachIdealNode {
 368 public:
 369   MachBreakpointNode( ) {}
 370   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 371   virtual uint size(PhaseRegAlloc *ra_) const;
 372 
 373 #ifndef PRODUCT
 374   virtual const char *Name() const { return "Breakpoint"; }
 375   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 376 #endif
 377 };
 378 
 379 //------------------------------MachConstantBaseNode--------------------------
 380 // Machine node that represents the base address of the constant table.
 381 class MachConstantBaseNode : public MachIdealNode {
 382 public:
 383   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 384 
 385 public:
 386   MachConstantBaseNode() : MachIdealNode() {
 387     init_class_id(Class_MachConstantBase);
 388   }
 389   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 390   virtual uint ideal_reg() const { return Op_RegP; }
 391   virtual uint oper_input_base() const { return 1; }
 392 
 393   virtual bool requires_postalloc_expand() const;
 394   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 395 
 396   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 397   virtual uint size(PhaseRegAlloc* ra_) const;
 398   virtual bool pinned() const { return UseRDPCForConstantTableBase; }
 399 
 400   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 401   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 402 
 403 #ifndef PRODUCT
 404   virtual const char* Name() const { return "MachConstantBaseNode"; }
 405   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 406 #endif
 407 };
 408 
 409 //------------------------------MachConstantNode-------------------------------
 410 // Machine node that holds a constant which is stored in the constant table.
 411 class MachConstantNode : public MachTypeNode {
 412 protected:
 413   Compile::Constant _constant;  // This node's constant.
 414 
 415 public:
 416   MachConstantNode() : MachTypeNode() {
 417     init_class_id(Class_MachConstant);
 418   }
 419 
 420   virtual void eval_constant(Compile* C) {
 421 #ifdef ASSERT
 422     tty->print("missing MachConstantNode eval_constant function: ");
 423     dump();
 424 #endif
 425     ShouldNotCallThis();
 426   }
 427 
 428   virtual const RegMask &in_RegMask(uint idx) const {
 429     if (idx == mach_constant_base_node_input())
 430       return MachConstantBaseNode::static_out_RegMask();
 431     return MachNode::in_RegMask(idx);
 432   }
 433 
 434   // Input edge of MachConstantBaseNode.
 435   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 436 
 437   int  constant_offset();
 438   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 439   // Unchecked version to avoid assertions in debug output.
 440   int  constant_offset_unchecked() const;
 441 };
 442 
 443 //------------------------------MachUEPNode-----------------------------------
 444 // Machine Unvalidated Entry Point Node
 445 class MachUEPNode : public MachIdealNode {
 446 public:
 447   MachUEPNode( ) {}
 448   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 449   virtual uint size(PhaseRegAlloc *ra_) const;
 450 
 451 #ifndef PRODUCT
 452   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 453   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 454 #endif
 455 };
 456 
 457 //------------------------------MachPrologNode--------------------------------
 458 // Machine function Prolog Node
 459 class MachPrologNode : public MachIdealNode {
 460 public:
 461   MachPrologNode( ) {}
 462   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 463   virtual uint size(PhaseRegAlloc *ra_) const;
 464   virtual int reloc() const;
 465 
 466 #ifndef PRODUCT
 467   virtual const char *Name() const { return "Prolog"; }
 468   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 469 #endif
 470 };
 471 
 472 //------------------------------MachEpilogNode--------------------------------
 473 // Machine function Epilog Node
 474 class MachEpilogNode : public MachIdealNode {
 475 public:
 476   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 477   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 478   virtual uint size(PhaseRegAlloc *ra_) const;
 479   virtual int reloc() const;
 480   virtual const Pipeline *pipeline() const;
 481 
 482 private:
 483   bool _do_polling;
 484 
 485 public:
 486   bool do_polling() const { return _do_polling; }
 487 
 488   // Offset of safepoint from the beginning of the node
 489   int safepoint_offset() const;
 490 
 491 #ifndef PRODUCT
 492   virtual const char *Name() const { return "Epilog"; }
 493   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 494 #endif
 495 };
 496 
 497 //------------------------------MachNopNode-----------------------------------
 498 // Machine function Nop Node
 499 class MachNopNode : public MachIdealNode {
 500 private:
 501   int _count;
 502 public:
 503   MachNopNode( ) : _count(1) {}
 504   MachNopNode( int count ) : _count(count) {}
 505   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 506   virtual uint size(PhaseRegAlloc *ra_) const;
 507 
 508   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 509 
 510   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 511   virtual const Pipeline *pipeline() const;
 512 #ifndef PRODUCT
 513   virtual const char *Name() const { return "Nop"; }
 514   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 515   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 516 #endif
 517 };
 518 
 519 //------------------------------MachSpillCopyNode------------------------------
 520 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 521 // location (stack or register).
 522 class MachSpillCopyNode : public MachIdealNode {
 523 public:
 524   enum SpillType {
 525     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 526     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 527     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 528     LoopPhiInput,                      // Pre-split compares of loop-phis
 529     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 530                                        // if in high pressure region or the lrg is bound
 531     RegToReg,                          // A register to register move
 532     RegToMem,                          // A register to memory move
 533     MemToReg,                          // A memory to register move
 534     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 535                                        // the phi and its input resides at different locations (i.e. reg or mem)
 536     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 537     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 538                                        // stretched beyond a new definition point, therefore we split out new copies instead
 539     CallUse,                           // Spill use at a call
 540     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 541   };
 542 private:
 543   const RegMask *_in;           // RegMask for input
 544   const RegMask *_out;          // RegMask for output
 545   const Type *_type;
 546   const SpillType _spill_type;
 547 public:
 548   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 549     MachIdealNode(), _spill_type(spill_type), _in(&in), _out(&out), _type(n->bottom_type()) {
 550     init_class_id(Class_MachSpillCopy);
 551     init_flags(Flag_is_Copy);
 552     add_req(NULL);
 553     add_req(n);
 554   }
 555   virtual uint size_of() const { return sizeof(*this); }
 556   void set_out_RegMask(const RegMask &out) { _out = &out; }
 557   void set_in_RegMask(const RegMask &in) { _in = &in; }
 558   virtual const RegMask &out_RegMask() const { return *_out; }
 559   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 560   virtual const class Type *bottom_type() const { return _type; }
 561   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 562   virtual uint oper_input_base() const { return 1; }
 563   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 564 
 565   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 566   virtual uint size(PhaseRegAlloc *ra_) const;
 567 
 568 
 569 #ifndef PRODUCT
 570   virtual const char *Name() const {
 571     switch (_spill_type) {
 572       case TwoAddress:
 573         return "TwoAddressSpillCopy";
 574       case PhiInput:
 575         return "PhiInputSpillCopy";
 576       case DebugUse:
 577         return "DebugUseSpillCopy";
 578       case LoopPhiInput:
 579         return "LoopPhiInputSpillCopy";
 580       case Definition:
 581         return "DefinitionSpillCopy";
 582       case RegToReg:
 583         return "RegToRegSpillCopy";
 584       case RegToMem:
 585         return "RegToMemSpillCopy";
 586       case MemToReg:
 587         return "MemToRegSpillCopy";
 588       case PhiLocationDifferToInputLocation:
 589         return "PhiLocationDifferToInputLocationSpillCopy";
 590       case BasePointerToMem:
 591         return "BasePointerToMemSpillCopy";
 592       case InputToRematerialization:
 593         return "InputToRematerializationSpillCopy";
 594       case CallUse:
 595         return "CallUseSpillCopy";
 596       case Bound:
 597         return "BoundSpillCopy";
 598       default:
 599         assert(false, "Must have valid spill type");
 600         return "MachSpillCopy";
 601     }
 602   }
 603 
 604   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 605 #endif
 606 };
 607 
 608 //------------------------------MachBranchNode--------------------------------
 609 // Abstract machine branch Node
 610 class MachBranchNode : public MachIdealNode {
 611 public:
 612   MachBranchNode() : MachIdealNode() {
 613     init_class_id(Class_MachBranch);
 614   }
 615   virtual void label_set(Label* label, uint block_num) = 0;
 616   virtual void save_label(Label** label, uint* block_num) = 0;
 617 
 618   // Support for short branches
 619   virtual MachNode *short_branch_version(Compile* C) { return NULL; }
 620 
 621   virtual bool pinned() const { return true; };
 622 };
 623 
 624 //------------------------------MachNullChkNode--------------------------------
 625 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 626 // also some kind of memory op.  Turns the indicated MachNode into a
 627 // conditional branch with good latency on the ptr-not-null path and awful
 628 // latency on the pointer-is-null path.
 629 
 630 class MachNullCheckNode : public MachBranchNode {
 631 public:
 632   const uint _vidx;             // Index of memop being tested
 633   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 634     init_class_id(Class_MachNullCheck);
 635     add_req(ctrl);
 636     add_req(memop);
 637   }
 638   virtual uint size_of() const { return sizeof(*this); }
 639 
 640   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 641   virtual void label_set(Label* label, uint block_num);
 642   virtual void save_label(Label** label, uint* block_num);
 643   virtual void negate() { }
 644   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 645   virtual uint ideal_reg() const { return NotAMachineReg; }
 646   virtual const RegMask &in_RegMask(uint) const;
 647   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 648 #ifndef PRODUCT
 649   virtual const char *Name() const { return "NullCheck"; }
 650   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 651 #endif
 652 };
 653 
 654 //------------------------------MachProjNode----------------------------------
 655 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 656 // just MachNodes made by the Ideal world that replicate simple projections
 657 // but with machine-dependent input & output register masks.  Generally
 658 // produced as part of calling conventions.  Normally I make MachNodes as part
 659 // of the Matcher process, but the Matcher is ill suited to issues involving
 660 // frame handling, so frame handling is all done in the Ideal world with
 661 // occasional callbacks to the machine model for important info.
 662 class MachProjNode : public ProjNode {
 663 public:
 664   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 665     init_class_id(Class_MachProj);
 666   }
 667   RegMask _rout;
 668   const uint  _ideal_reg;
 669   enum projType {
 670     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 671     fat_proj       = 999        // Projs killing many regs, defined by _rout
 672   };
 673   virtual int   Opcode() const;
 674   virtual const Type *bottom_type() const;
 675   virtual const TypePtr *adr_type() const;
 676   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 677   virtual const RegMask &out_RegMask() const { return _rout; }
 678   virtual uint  ideal_reg() const { return _ideal_reg; }
 679   // Need size_of() for virtual ProjNode::clone()
 680   virtual uint  size_of() const { return sizeof(MachProjNode); }
 681 #ifndef PRODUCT
 682   virtual void dump_spec(outputStream *st) const;
 683 #endif
 684 };
 685 
 686 //------------------------------MachIfNode-------------------------------------
 687 // Machine-specific versions of IfNodes
 688 class MachIfNode : public MachBranchNode {
 689   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 690 public:
 691   float _prob;                  // Probability branch goes either way
 692   float _fcnt;                  // Frequency counter
 693   MachIfNode() : MachBranchNode() {
 694     init_class_id(Class_MachIf);
 695   }
 696   // Negate conditional branches.
 697   virtual void negate() = 0;
 698 #ifndef PRODUCT
 699   virtual void dump_spec(outputStream *st) const;
 700 #endif
 701 };
 702 
 703 //------------------------------MachGotoNode-----------------------------------
 704 // Machine-specific versions of GotoNodes
 705 class MachGotoNode : public MachBranchNode {
 706 public:
 707   MachGotoNode() : MachBranchNode() {
 708     init_class_id(Class_MachGoto);
 709   }
 710 };
 711 
 712 //------------------------------MachFastLockNode-------------------------------------
 713 // Machine-specific versions of FastLockNodes
 714 class MachFastLockNode : public MachNode {
 715   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 716 public:
 717   BiasedLockingCounters* _counters;
 718 
 719   MachFastLockNode() : MachNode() {}
 720 };
 721 
 722 //------------------------------MachReturnNode--------------------------------
 723 // Machine-specific versions of subroutine returns
 724 class MachReturnNode : public MachNode {
 725   virtual uint size_of() const; // Size is bigger
 726 public:
 727   RegMask *_in_rms;             // Input register masks, set during allocation
 728   ReallocMark _nesting;         // assertion check for reallocations
 729   const TypePtr* _adr_type;     // memory effects of call or return
 730   MachReturnNode() : MachNode() {
 731     init_class_id(Class_MachReturn);
 732     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 733   }
 734 
 735   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 736 
 737   virtual const RegMask &in_RegMask(uint) const;
 738   virtual bool pinned() const { return true; };
 739   virtual const TypePtr *adr_type() const;
 740 };
 741 
 742 //------------------------------MachSafePointNode-----------------------------
 743 // Machine-specific versions of safepoints
 744 class MachSafePointNode : public MachReturnNode {
 745 public:
 746   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 747   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 748   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 749   OopMap*         oop_map() const { return _oop_map; }
 750   void            set_oop_map(OopMap* om) { _oop_map = om; }
 751 
 752   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
 753     init_class_id(Class_MachSafePoint);
 754   }
 755 
 756   virtual JVMState* jvms() const { return _jvms; }
 757   void set_jvms(JVMState* s) {
 758     _jvms = s;
 759   }
 760   virtual const Type    *bottom_type() const;
 761 
 762   virtual const RegMask &in_RegMask(uint) const;
 763 
 764   // Functionality from old debug nodes
 765   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 766   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 767 
 768   Node *local(const JVMState* jvms, uint idx) const {
 769     assert(verify_jvms(jvms), "jvms must match");
 770     return in(_jvmadj + jvms->locoff() + idx);
 771   }
 772   Node *stack(const JVMState* jvms, uint idx) const {
 773     assert(verify_jvms(jvms), "jvms must match");
 774     return in(_jvmadj + jvms->stkoff() + idx);
 775  }
 776   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 777     assert(verify_jvms(jvms), "jvms must match");
 778     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 779   }
 780   Node *monitor_box(const JVMState* jvms, uint idx) const {
 781     assert(verify_jvms(jvms), "jvms must match");
 782     return in(_jvmadj + jvms->monitor_box_offset(idx));
 783   }
 784   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 785     assert(verify_jvms(jvms), "jvms must match");
 786     set_req(_jvmadj + jvms->locoff() + idx, c);
 787   }
 788   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 789     assert(verify_jvms(jvms), "jvms must match");
 790     set_req(_jvmadj + jvms->stkoff() + idx, c);
 791   }
 792   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 793     assert(verify_jvms(jvms), "jvms must match");
 794     set_req(_jvmadj + jvms->monoff() + idx, c);
 795   }
 796 };
 797 
 798 //------------------------------MachCallNode----------------------------------
 799 // Machine-specific versions of subroutine calls
 800 class MachCallNode : public MachSafePointNode {
 801 protected:
 802   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 803   virtual uint cmp( const Node &n ) const;
 804   virtual uint size_of() const = 0; // Size is bigger
 805 public:
 806   const TypeFunc *_tf;        // Function type
 807   address      _entry_point;  // Address of the method being called
 808   float        _cnt;          // Estimate of number of times called
 809   uint         _argsize;      // Size of argument block on stack
 810 
 811   const TypeFunc* tf()        const { return _tf; }
 812   const address entry_point() const { return _entry_point; }
 813   const float   cnt()         const { return _cnt; }
 814   uint argsize()              const { return _argsize; }
 815 
 816   void set_tf(const TypeFunc* tf) { _tf = tf; }
 817   void set_entry_point(address p) { _entry_point = p; }
 818   void set_cnt(float c)           { _cnt = c; }
 819   void set_argsize(int s)         { _argsize = s; }
 820 
 821   MachCallNode() : MachSafePointNode() {
 822     init_class_id(Class_MachCall);
 823   }
 824 
 825   virtual const Type *bottom_type() const;
 826   virtual bool  pinned() const { return false; }
 827   virtual const Type *Value( PhaseTransform *phase ) const;
 828   virtual const RegMask &in_RegMask(uint) const;
 829   virtual int ret_addr_offset() { return 0; }
 830 
 831   bool returns_long() const { return tf()->return_type() == T_LONG; }
 832   bool return_value_is_used() const;
 833 #ifndef PRODUCT
 834   virtual void dump_spec(outputStream *st) const;
 835 #endif
 836 };
 837 
 838 //------------------------------MachCallJavaNode------------------------------
 839 // "Base" class for machine-specific versions of subroutine calls
 840 class MachCallJavaNode : public MachCallNode {
 841 protected:
 842   virtual uint cmp( const Node &n ) const;
 843   virtual uint size_of() const; // Size is bigger
 844 public:
 845   ciMethod* _method;             // Method being direct called
 846   int        _bci;               // Byte Code index of call byte code
 847   bool       _optimized_virtual; // Tells if node is a static call or an optimized virtual
 848   bool       _method_handle_invoke;   // Tells if the call has to preserve SP
 849   MachCallJavaNode() : MachCallNode() {
 850     init_class_id(Class_MachCallJava);
 851   }
 852 
 853   virtual const RegMask &in_RegMask(uint) const;
 854 
 855 #ifndef PRODUCT
 856   virtual void dump_spec(outputStream *st) const;
 857 #endif
 858 };
 859 
 860 //------------------------------MachCallStaticJavaNode------------------------
 861 // Machine-specific versions of monomorphic subroutine calls
 862 class MachCallStaticJavaNode : public MachCallJavaNode {
 863   virtual uint cmp( const Node &n ) const;
 864   virtual uint size_of() const; // Size is bigger
 865 public:
 866   const char *_name;            // Runtime wrapper name
 867   MachCallStaticJavaNode() : MachCallJavaNode() {
 868     init_class_id(Class_MachCallStaticJava);
 869   }
 870 
 871   // If this is an uncommon trap, return the request code, else zero.
 872   int uncommon_trap_request() const;
 873 
 874   virtual int ret_addr_offset();
 875 #ifndef PRODUCT
 876   virtual void dump_spec(outputStream *st) const;
 877   void dump_trap_args(outputStream *st) const;
 878 #endif
 879 };
 880 
 881 //------------------------------MachCallDynamicJavaNode------------------------
 882 // Machine-specific versions of possibly megamorphic subroutine calls
 883 class MachCallDynamicJavaNode : public MachCallJavaNode {
 884 public:
 885   int _vtable_index;
 886   MachCallDynamicJavaNode() : MachCallJavaNode() {
 887     init_class_id(Class_MachCallDynamicJava);
 888     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
 889   }
 890   virtual int ret_addr_offset();
 891 #ifndef PRODUCT
 892   virtual void dump_spec(outputStream *st) const;
 893 #endif
 894 };
 895 
 896 //------------------------------MachCallRuntimeNode----------------------------
 897 // Machine-specific versions of subroutine calls
 898 class MachCallRuntimeNode : public MachCallNode {
 899   virtual uint cmp( const Node &n ) const;
 900   virtual uint size_of() const; // Size is bigger
 901 public:
 902   const char *_name;            // Printable name, if _method is NULL
 903   MachCallRuntimeNode() : MachCallNode() {
 904     init_class_id(Class_MachCallRuntime);
 905   }
 906   virtual int ret_addr_offset();
 907 #ifndef PRODUCT
 908   virtual void dump_spec(outputStream *st) const;
 909 #endif
 910 };
 911 
 912 class MachCallLeafNode: public MachCallRuntimeNode {
 913 public:
 914   MachCallLeafNode() : MachCallRuntimeNode() {
 915     init_class_id(Class_MachCallLeaf);
 916   }
 917 };
 918 
 919 //------------------------------MachHaltNode-----------------------------------
 920 // Machine-specific versions of halt nodes
 921 class MachHaltNode : public MachReturnNode {
 922 public:
 923   virtual JVMState* jvms() const;
 924 };
 925 
 926 
 927 //------------------------------MachTempNode-----------------------------------
 928 // Node used by the adlc to construct inputs to represent temporary registers
 929 class MachTempNode : public MachNode {
 930 private:
 931   MachOper *_opnd_array[1];
 932 
 933 public:
 934   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
 935   virtual uint rule() const { return 9999999; }
 936   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
 937 
 938   MachTempNode(MachOper* oper) {
 939     init_class_id(Class_MachTemp);
 940     _num_opnds = 1;
 941     _opnds = _opnd_array;
 942     add_req(NULL);
 943     _opnds[0] = oper;
 944   }
 945   virtual uint size_of() const { return sizeof(MachTempNode); }
 946 
 947 #ifndef PRODUCT
 948   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
 949   virtual const char *Name() const { return "MachTemp";}
 950 #endif
 951 };
 952 
 953 
 954 
 955 //------------------------------labelOper--------------------------------------
 956 // Machine-independent version of label operand
 957 class labelOper : public MachOper {
 958 private:
 959   virtual uint           num_edges() const { return 0; }
 960 public:
 961   // Supported for fixed size branches
 962   Label* _label;                // Label for branch(es)
 963 
 964   uint _block_num;
 965 
 966   labelOper() : _block_num(0), _label(0) {}
 967 
 968   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
 969 
 970   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
 971 
 972   virtual MachOper *clone(Compile* C) const;
 973 
 974   virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
 975 
 976   virtual uint           opcode() const;
 977 
 978   virtual uint           hash()   const;
 979   virtual uint           cmp( const MachOper &oper ) const;
 980 #ifndef PRODUCT
 981   virtual const char    *Name()   const { return "Label";}
 982 
 983   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
 984   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
 985 #endif
 986 };
 987 
 988 
 989 //------------------------------methodOper--------------------------------------
 990 // Machine-independent version of method operand
 991 class methodOper : public MachOper {
 992 private:
 993   virtual uint           num_edges() const { return 0; }
 994 public:
 995   intptr_t _method;             // Address of method
 996   methodOper() :   _method(0) {}
 997   methodOper(intptr_t method) : _method(method)  {}
 998 
 999   virtual MachOper *clone(Compile* C) const;
1000 
1001   virtual intptr_t method() const { return _method; }
1002 
1003   virtual uint           opcode() const;
1004 
1005   virtual uint           hash()   const;
1006   virtual uint           cmp( const MachOper &oper ) const;
1007 #ifndef PRODUCT
1008   virtual const char    *Name()   const { return "Method";}
1009 
1010   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1011   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1012 #endif
1013 };
1014 
1015 #endif // SHARE_VM_OPTO_MACHNODE_HPP