3837 bool vector256 = true;
3838 assert(src != xnoreg, "sanity");
3839 int src_enc = src->encoding();
3840 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256);
3841 emit_int8(0x39);
3842 emit_operand(src, dst);
3843 // 0x01 - extract from upper 128 bits
3844 emit_int8(0x01);
3845 }
3846
3847 // duplicate 4-bytes integer data from src into 8 locations in dest
3848 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) {
3849 assert(VM_Version::supports_avx2(), "");
3850 bool vector256 = true;
3851 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38);
3852 emit_int8(0x58);
3853 emit_int8((unsigned char)(0xC0 | encode));
3854 }
3855
3856 // Carry-Less Multiplication Quadword
3857 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) {
3858 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), "");
3859 bool vector256 = false;
3860 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3861 emit_int8(0x44);
3862 emit_int8((unsigned char)(0xC0 | encode));
3863 emit_int8((unsigned char)mask);
3864 }
3865
3866 void Assembler::vzeroupper() {
3867 assert(VM_Version::supports_avx(), "");
3868 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE);
3869 emit_int8(0x77);
3870 }
3871
3872
3873 #ifndef _LP64
3874 // 32bit only pieces of the assembler
3875
3876 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) {
|
3837 bool vector256 = true;
3838 assert(src != xnoreg, "sanity");
3839 int src_enc = src->encoding();
3840 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256);
3841 emit_int8(0x39);
3842 emit_operand(src, dst);
3843 // 0x01 - extract from upper 128 bits
3844 emit_int8(0x01);
3845 }
3846
3847 // duplicate 4-bytes integer data from src into 8 locations in dest
3848 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) {
3849 assert(VM_Version::supports_avx2(), "");
3850 bool vector256 = true;
3851 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38);
3852 emit_int8(0x58);
3853 emit_int8((unsigned char)(0xC0 | encode));
3854 }
3855
3856 // Carry-Less Multiplication Quadword
3857 void Assembler::pclmulqdq(XMMRegister dst, XMMRegister src, int mask) {
3858 assert(VM_Version::supports_clmul(), "");
3859 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A);
3860 emit_int8(0x44);
3861 emit_int8((unsigned char)(0xC0 | encode));
3862 emit_int8((unsigned char)mask);
3863 }
3864
3865 // Carry-Less Multiplication Quadword
3866 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) {
3867 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), "");
3868 bool vector256 = false;
3869 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3870 emit_int8(0x44);
3871 emit_int8((unsigned char)(0xC0 | encode));
3872 emit_int8((unsigned char)mask);
3873 }
3874
3875 void Assembler::vzeroupper() {
3876 assert(VM_Version::supports_avx(), "");
3877 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE);
3878 emit_int8(0x77);
3879 }
3880
3881
3882 #ifndef _LP64
3883 // 32bit only pieces of the assembler
3884
3885 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) {
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