871 void adcl(Register dst, int32_t imm32); 872 void adcl(Register dst, Address src); 873 void adcl(Register dst, Register src); 874 875 void adcq(Register dst, int32_t imm32); 876 void adcq(Register dst, Address src); 877 void adcq(Register dst, Register src); 878 879 void addl(Address dst, int32_t imm32); 880 void addl(Address dst, Register src); 881 void addl(Register dst, int32_t imm32); 882 void addl(Register dst, Address src); 883 void addl(Register dst, Register src); 884 885 void addq(Address dst, int32_t imm32); 886 void addq(Address dst, Register src); 887 void addq(Register dst, int32_t imm32); 888 void addq(Register dst, Address src); 889 void addq(Register dst, Register src); 890 891 void addr_nop_4(); 892 void addr_nop_5(); 893 void addr_nop_7(); 894 void addr_nop_8(); 895 896 // Add Scalar Double-Precision Floating-Point Values 897 void addsd(XMMRegister dst, Address src); 898 void addsd(XMMRegister dst, XMMRegister src); 899 900 // Add Scalar Single-Precision Floating-Point Values 901 void addss(XMMRegister dst, Address src); 902 void addss(XMMRegister dst, XMMRegister src); 903 904 // AES instructions 905 void aesdec(XMMRegister dst, Address src); 906 void aesdec(XMMRegister dst, XMMRegister src); 907 void aesdeclast(XMMRegister dst, Address src); 908 void aesdeclast(XMMRegister dst, XMMRegister src); 909 void aesenc(XMMRegister dst, Address src); 910 void aesenc(XMMRegister dst, XMMRegister src); 1187 void fucomip(int i = 1); 1188 1189 void fwait(); 1190 1191 void fxch(int i = 1); 1192 1193 void fxrstor(Address src); 1194 1195 void fxsave(Address dst); 1196 1197 void fyl2x(); 1198 void frndint(); 1199 void f2xm1(); 1200 void fldl2e(); 1201 1202 void hlt(); 1203 1204 void idivl(Register src); 1205 void divl(Register src); // Unsigned division 1206 1207 void idivq(Register src); 1208 1209 void imull(Register dst, Register src); 1210 void imull(Register dst, Register src, int value); 1211 void imull(Register dst, Address src); 1212 1213 void imulq(Register dst, Register src); 1214 void imulq(Register dst, Register src, int value); 1215 #ifdef _LP64 1216 void imulq(Register dst, Address src); 1217 #endif 1218 1219 1220 // jcc is the generic conditional branch generator to run- 1221 // time routines, jcc is used for branches to labels. jcc 1222 // takes a branch opcode (cc) and a label (L) and generates 1223 // either a backward branch or a forward branch and links it 1224 // to the label fixup chain. Usage: 1225 // 1226 // Label L; // unbound label 1227 // jcc(cc, L); // forward branch to unbound label 1228 // bind(L); // bind label to the current pc 1229 // jcc(cc, L); // backward branch to bound label 1230 // bind(L); // illegal: a label may be bound only once 1231 // 1232 // Note: The same Label can be used for forward and backward branches 1233 // but it may be bound only once. 1234 1235 void jcc(Condition cc, Label& L, bool maybe_short = true); 1236 1237 // Conditional jump to a 8-bit offset to L. 1238 // WARNING: be very careful using this for forward jumps. If the label is 1239 // not bound within an 8-bit offset of this instruction, a run-time error 1391 void movw(Address dst, int imm16); 1392 void movw(Register dst, Address src); 1393 void movw(Address dst, Register src); 1394 1395 void movzbl(Register dst, Address src); 1396 void movzbl(Register dst, Register src); 1397 1398 #ifdef _LP64 1399 void movzbq(Register dst, Address src); 1400 void movzbq(Register dst, Register src); 1401 #endif 1402 1403 void movzwl(Register dst, Address src); 1404 void movzwl(Register dst, Register src); 1405 1406 #ifdef _LP64 1407 void movzwq(Register dst, Address src); 1408 void movzwq(Register dst, Register src); 1409 #endif 1410 1411 void mull(Address src); 1412 void mull(Register src); 1413 1414 // Multiply Scalar Double-Precision Floating-Point Values 1415 void mulsd(XMMRegister dst, Address src); 1416 void mulsd(XMMRegister dst, XMMRegister src); 1417 1418 // Multiply Scalar Single-Precision Floating-Point Values 1419 void mulss(XMMRegister dst, Address src); 1420 void mulss(XMMRegister dst, XMMRegister src); 1421 1422 void negl(Register dst); 1423 1424 #ifdef _LP64 1425 void negq(Register dst); 1426 #endif 1427 1428 void nop(int i = 1); 1429 1430 void notl(Register dst); 1431 1432 #ifdef _LP64 1433 void notq(Register dst); 1524 void punpckldq(XMMRegister dst, XMMRegister src); 1525 void punpckldq(XMMRegister dst, Address src); 1526 1527 // Interleave Low Quadwords 1528 void punpcklqdq(XMMRegister dst, XMMRegister src); 1529 1530 #ifndef _LP64 // no 32bit push/pop on amd64 1531 void pushl(Address src); 1532 #endif 1533 1534 void pushq(Address src); 1535 1536 void rcll(Register dst, int imm8); 1537 1538 void rclq(Register dst, int imm8); 1539 1540 void rdtsc(); 1541 1542 void ret(int imm16); 1543 1544 void sahf(); 1545 1546 void sarl(Register dst, int imm8); 1547 void sarl(Register dst); 1548 1549 void sarq(Register dst, int imm8); 1550 void sarq(Register dst); 1551 1552 void sbbl(Address dst, int32_t imm32); 1553 void sbbl(Register dst, int32_t imm32); 1554 void sbbl(Register dst, Address src); 1555 void sbbl(Register dst, Register src); 1556 1557 void sbbq(Address dst, int32_t imm32); 1558 void sbbq(Register dst, int32_t imm32); 1559 void sbbq(Register dst, Address src); 1560 void sbbq(Register dst, Register src); 1561 1562 void setb(Condition cc, Register dst); 1563 | 871 void adcl(Register dst, int32_t imm32); 872 void adcl(Register dst, Address src); 873 void adcl(Register dst, Register src); 874 875 void adcq(Register dst, int32_t imm32); 876 void adcq(Register dst, Address src); 877 void adcq(Register dst, Register src); 878 879 void addl(Address dst, int32_t imm32); 880 void addl(Address dst, Register src); 881 void addl(Register dst, int32_t imm32); 882 void addl(Register dst, Address src); 883 void addl(Register dst, Register src); 884 885 void addq(Address dst, int32_t imm32); 886 void addq(Address dst, Register src); 887 void addq(Register dst, int32_t imm32); 888 void addq(Register dst, Address src); 889 void addq(Register dst, Register src); 890 891 #ifdef _LP64 892 //Add Unsigned Integers with Carry Flag 893 void adcxq(Register dst, Register src); 894 895 //Add Unsigned Integers with Overflow Flag 896 void adoxq(Register dst, Register src); 897 #endif 898 899 void addr_nop_4(); 900 void addr_nop_5(); 901 void addr_nop_7(); 902 void addr_nop_8(); 903 904 // Add Scalar Double-Precision Floating-Point Values 905 void addsd(XMMRegister dst, Address src); 906 void addsd(XMMRegister dst, XMMRegister src); 907 908 // Add Scalar Single-Precision Floating-Point Values 909 void addss(XMMRegister dst, Address src); 910 void addss(XMMRegister dst, XMMRegister src); 911 912 // AES instructions 913 void aesdec(XMMRegister dst, Address src); 914 void aesdec(XMMRegister dst, XMMRegister src); 915 void aesdeclast(XMMRegister dst, Address src); 916 void aesdeclast(XMMRegister dst, XMMRegister src); 917 void aesenc(XMMRegister dst, Address src); 918 void aesenc(XMMRegister dst, XMMRegister src); 1195 void fucomip(int i = 1); 1196 1197 void fwait(); 1198 1199 void fxch(int i = 1); 1200 1201 void fxrstor(Address src); 1202 1203 void fxsave(Address dst); 1204 1205 void fyl2x(); 1206 void frndint(); 1207 void f2xm1(); 1208 void fldl2e(); 1209 1210 void hlt(); 1211 1212 void idivl(Register src); 1213 void divl(Register src); // Unsigned division 1214 1215 #ifdef _LP64 1216 void idivq(Register src); 1217 #endif 1218 1219 void imull(Register dst, Register src); 1220 void imull(Register dst, Register src, int value); 1221 void imull(Register dst, Address src); 1222 1223 #ifdef _LP64 1224 void imulq(Register dst, Register src); 1225 void imulq(Register dst, Register src, int value); 1226 void imulq(Register dst, Address src); 1227 #endif 1228 1229 // jcc is the generic conditional branch generator to run- 1230 // time routines, jcc is used for branches to labels. jcc 1231 // takes a branch opcode (cc) and a label (L) and generates 1232 // either a backward branch or a forward branch and links it 1233 // to the label fixup chain. Usage: 1234 // 1235 // Label L; // unbound label 1236 // jcc(cc, L); // forward branch to unbound label 1237 // bind(L); // bind label to the current pc 1238 // jcc(cc, L); // backward branch to bound label 1239 // bind(L); // illegal: a label may be bound only once 1240 // 1241 // Note: The same Label can be used for forward and backward branches 1242 // but it may be bound only once. 1243 1244 void jcc(Condition cc, Label& L, bool maybe_short = true); 1245 1246 // Conditional jump to a 8-bit offset to L. 1247 // WARNING: be very careful using this for forward jumps. If the label is 1248 // not bound within an 8-bit offset of this instruction, a run-time error 1400 void movw(Address dst, int imm16); 1401 void movw(Register dst, Address src); 1402 void movw(Address dst, Register src); 1403 1404 void movzbl(Register dst, Address src); 1405 void movzbl(Register dst, Register src); 1406 1407 #ifdef _LP64 1408 void movzbq(Register dst, Address src); 1409 void movzbq(Register dst, Register src); 1410 #endif 1411 1412 void movzwl(Register dst, Address src); 1413 void movzwl(Register dst, Register src); 1414 1415 #ifdef _LP64 1416 void movzwq(Register dst, Address src); 1417 void movzwq(Register dst, Register src); 1418 #endif 1419 1420 // Unsigned multiply with RAX destination register 1421 void mull(Address src); 1422 void mull(Register src); 1423 1424 #ifdef _LP64 1425 void mulq(Address src); 1426 void mulq(Register src); 1427 void mulxq(Register dst1, Register dst2, Register src); 1428 #endif 1429 1430 // Multiply Scalar Double-Precision Floating-Point Values 1431 void mulsd(XMMRegister dst, Address src); 1432 void mulsd(XMMRegister dst, XMMRegister src); 1433 1434 // Multiply Scalar Single-Precision Floating-Point Values 1435 void mulss(XMMRegister dst, Address src); 1436 void mulss(XMMRegister dst, XMMRegister src); 1437 1438 void negl(Register dst); 1439 1440 #ifdef _LP64 1441 void negq(Register dst); 1442 #endif 1443 1444 void nop(int i = 1); 1445 1446 void notl(Register dst); 1447 1448 #ifdef _LP64 1449 void notq(Register dst); 1540 void punpckldq(XMMRegister dst, XMMRegister src); 1541 void punpckldq(XMMRegister dst, Address src); 1542 1543 // Interleave Low Quadwords 1544 void punpcklqdq(XMMRegister dst, XMMRegister src); 1545 1546 #ifndef _LP64 // no 32bit push/pop on amd64 1547 void pushl(Address src); 1548 #endif 1549 1550 void pushq(Address src); 1551 1552 void rcll(Register dst, int imm8); 1553 1554 void rclq(Register dst, int imm8); 1555 1556 void rdtsc(); 1557 1558 void ret(int imm16); 1559 1560 #ifdef _LP64 1561 void rorq(Register dst, int imm8); 1562 void rorxq(Register dst, Register src, int imm8); 1563 #endif 1564 1565 void sahf(); 1566 1567 void sarl(Register dst, int imm8); 1568 void sarl(Register dst); 1569 1570 void sarq(Register dst, int imm8); 1571 void sarq(Register dst); 1572 1573 void sbbl(Address dst, int32_t imm32); 1574 void sbbl(Register dst, int32_t imm32); 1575 void sbbl(Register dst, Address src); 1576 void sbbl(Register dst, Register src); 1577 1578 void sbbq(Address dst, int32_t imm32); 1579 void sbbq(Register dst, int32_t imm32); 1580 void sbbq(Register dst, Address src); 1581 void sbbq(Register dst, Register src); 1582 1583 void setb(Condition cc, Register dst); 1584 |