*** old/src/cpu/x86/vm/vm_version_x86.cpp	Fri Aug 29 19:42:11 2014
--- new/src/cpu/x86/vm/vm_version_x86.cpp	Fri Aug 29 19:42:11 2014

*** 483,493 ****
--- 483,493 ----
      // HT processor could be installed on a system which doesn't support HT.
      _cpuFeatures &= ~CPU_HT;
    }
  
    char buf[256];
!   jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
!   jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
                 cores_per_cpu(), threads_per_core(),
                 cpu_family(), _model, _stepping,
                 (supports_cmov() ? ", cmov" : ""),
                 (supports_cmpxchg8() ? ", cx8" : ""),
                 (supports_fxsr() ? ", fxsr" : ""),

*** 512,522 ****
--- 512,523 ----
                 (supports_ht() ? ", ht": ""),
                 (supports_tsc() ? ", tsc": ""),
                 (supports_tscinv_bit() ? ", tscinvbit": ""),
                 (supports_tscinv() ? ", tscinv": ""),
                 (supports_bmi1() ? ", bmi1" : ""),
!                (supports_bmi2() ? ", bmi2" : ""));
!                (supports_bmi2() ? ", bmi2" : ""),
+                (supports_adx() ? ", adx" : ""));
    _features_str = os::strdup(buf);
  
    // UseSSE is set to the smaller of what hardware supports and what
    // the command line requires.  I.e., you cannot set UseSSE to 2 on
    // older Pentiums which do not support it.

*** 564,574 ****
--- 565,575 ----
      if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
        UseCRC32Intrinsics = true;
      }
    } else if (UseCRC32Intrinsics) {
      if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
-       warning("CRC32 Intrinsics requires AVX and CLMUL instructions (not available on this CPU)");
      FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
    }
  
    // The AES intrinsic stubs require AES instruction support (of course)
    // but also require sse3 mode for instructions it use.

*** 687,697 ****
--- 688,711 ----
          tty->cr();
        }
      }
  #endif
    }
+ 
+ #ifdef _LP64
+   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
+     UseMultiplyToLenIntrinsic = true;
+   }
+ #else
+   if (UseMultiplyToLenIntrinsic) {
+     if (!FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
+       warning("multiplyToLen intrinsic is not available in Client 32-bit VM");
+     }
+     FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, false);
+   }
  #endif
+ #endif // COMPILER2
  
    // On new cpus instructions which update whole XMM register should be used
    // to prevent partial register stall due to dependencies on high half.
    //
    // UseXmmLoadAndClearUpper == true  --> movsd(xmm, mem)

*** 830,839 ****
--- 844,856 ----
          if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
            UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
          }
        }
      }
+     if(FLAG_IS_DEFAULT(AllocatePrefetchInstr) && supports_3dnow_prefetch()) {
+       AllocatePrefetchInstr = 3;
+     }
    }
  
    // Use count leading zeros count instruction if available.
    if (supports_lzcnt()) {
      if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) {

*** 842,868 ****
--- 859,897 ----
     } else if (UseCountLeadingZerosInstruction) {
      warning("lzcnt instruction is not available on this CPU");
      FLAG_SET_DEFAULT(UseCountLeadingZerosInstruction, false);
    }
  
+   // Use count trailing zeros instruction if available
    if (supports_bmi1()) {
+     // tzcnt does not require VEX prefix
+     if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstruction)) {
+       UseCountTrailingZerosInstruction = true;
+     }
+   } else if (UseCountTrailingZerosInstruction) {
+     warning("tzcnt instruction is not available on this CPU");
+     FLAG_SET_DEFAULT(UseCountTrailingZerosInstruction, false);
+   }
+ 
+   // BMI instructions use an encoding with VEX prefix.
+   // VEX prefix is generated only when AVX > 0.
+   if (supports_bmi1() && supports_avx()) {
      if (FLAG_IS_DEFAULT(UseBMI1Instructions)) {
        UseBMI1Instructions = true;
      }
    } else if (UseBMI1Instructions) {
!     warning("BMI1 instructions are not available on this CPU (AVX is also required)");
      FLAG_SET_DEFAULT(UseBMI1Instructions, false);
    }
  
    // Use count trailing zeros instruction if available
!   if (supports_bmi1()) {
      if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstruction)) {
        UseCountTrailingZerosInstruction = UseBMI1Instructions;
      }
    } else if (UseCountTrailingZerosInstruction) {
!     warning("tzcnt instruction is not available on this CPU");
      FLAG_SET_DEFAULT(UseCountTrailingZerosInstruction, false);
+   if (supports_bmi2() && supports_avx()) {
!     if (FLAG_IS_DEFAULT(UseBMI2Instructions)) {
+       UseBMI2Instructions = true;
+     }
+   } else if (UseBMI2Instructions) {
+     warning("BMI2 instructions are not available on this CPU (AVX is also required)");
!     FLAG_SET_DEFAULT(UseBMI2Instructions, false);
    }
  
    // Use population count instruction if available.
    if (supports_popcnt()) {
      if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {