src/cpu/x86/vm/vm_version_x86.hpp

*** 207,217 ****
                          : 2,
                     bmi2 : 1,
                     erms : 1,
                          : 1,
                     rtm  : 1,
!                         : 20;
      } bits;
    };
  
    union XemXcr0Eax {
      uint32_t value;
--- 207,219 ----
                          : 2,
                     bmi2 : 1,
                     erms : 1,
                          : 1,
                     rtm  : 1,
!                         : 7,
!                    adx  : 1, 
!                         : 12;
      } bits;
    };
  
    union XemXcr0Eax {
      uint32_t value;
*** 258,268 ****
      CPU_AES    = (1 << 19),
      CPU_ERMS   = (1 << 20), // enhanced 'rep movsb/stosb' instructions
      CPU_CLMUL  = (1 << 21), // carryless multiply for CRC
      CPU_BMI1   = (1 << 22),
      CPU_BMI2   = (1 << 23),
!     CPU_RTM    = (1 << 24)  // Restricted Transactional Memory instructions
    } cpuFeatureFlags;
  
    enum {
      // AMD
      CPU_FAMILY_AMD_11H       = 0x11,
--- 260,271 ----
      CPU_AES    = (1 << 19),
      CPU_ERMS   = (1 << 20), // enhanced 'rep movsb/stosb' instructions
      CPU_CLMUL  = (1 << 21), // carryless multiply for CRC
      CPU_BMI1   = (1 << 22),
      CPU_BMI2   = (1 << 23),
!     CPU_RTM    = (1 << 24),  // Restricted Transactional Memory instructions
!     CPU_ADX    = (1 << 25)
    } cpuFeatureFlags;
  
    enum {
      // AMD
      CPU_FAMILY_AMD_11H       = 0x11,
*** 463,476 ****
--- 466,485 ----
        if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
          result |= CPU_SSE4A;
      }
      // Intel features.
      if(is_intel()) {
+       if(_cpuid_info.sef_cpuid7_ebx.bits.adx != 0)
+          result |= CPU_ADX;
        if(_cpuid_info.sef_cpuid7_ebx.bits.bmi2 != 0)
          result |= CPU_BMI2;
        if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0)
          result |= CPU_LZCNT;
+       // for Intel, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw
+       if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) {
+         result |= CPU_3DNOW_PREFETCH;
+       }
      }
  
      return result;
    }
  
*** 623,632 ****
--- 632,642 ----
    static bool supports_erms()     { return (_cpuFeatures & CPU_ERMS) != 0; }
    static bool supports_clmul()    { return (_cpuFeatures & CPU_CLMUL) != 0; }
    static bool supports_rtm()      { return (_cpuFeatures & CPU_RTM) != 0; }
    static bool supports_bmi1()     { return (_cpuFeatures & CPU_BMI1) != 0; }
    static bool supports_bmi2()     { return (_cpuFeatures & CPU_BMI2) != 0; }
+   static bool supports_adx()     { return (_cpuFeatures & CPU_ADX) != 0; }
    // Intel features
    static bool is_intel_family_core() { return is_intel() &&
                                         extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
  
    static bool is_intel_tsc_synched_at_init()  {