182       UseAES = true;
 183     }
 184   } else {
 185     if (UseAES) {
 186       warning("UseAES specified, but not supported on this CPU");
 187     }
 188     if (UseAESIntrinsics) {
 189       warning("UseAESIntrinsics specified, but not supported on this CPU");
 190     }
 191   }
 192 
 193   if (UseGHASHIntrinsics) {
 194     warning("GHASH intrinsics are not available on this CPU");
 195     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 196   }
 197 
 198   if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 199     UseCRC32Intrinsics = true;
 200   }
 201 






 202   if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
 203     if (FLAG_IS_DEFAULT(UseSHA)) {
 204       FLAG_SET_DEFAULT(UseSHA, true);
 205     }
 206   } else if (UseSHA) {
 207     warning("SHA instructions are not available on this CPU");
 208     FLAG_SET_DEFAULT(UseSHA, false);
 209   }
 210 
 211   if (!UseSHA) {
 212     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 213     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 214     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 215   } else {
 216     if (auxv & HWCAP_SHA1) {
 217       if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
 218         FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
 219       }
 220     } else if (UseSHA1Intrinsics) {
 221       warning("SHA1 instruction is not available on this CPU.");

 182       UseAES = true;
 183     }
 184   } else {
 185     if (UseAES) {
 186       warning("UseAES specified, but not supported on this CPU");
 187     }
 188     if (UseAESIntrinsics) {
 189       warning("UseAESIntrinsics specified, but not supported on this CPU");
 190     }
 191   }
 192 
 193   if (UseGHASHIntrinsics) {
 194     warning("GHASH intrinsics are not available on this CPU");
 195     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 196   }
 197 
 198   if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 199     UseCRC32Intrinsics = true;
 200   }
 201 
 202   if (UseCRC32CIntrinsics) {
 203     if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics))
 204       warning("CRC32C intrinsics are not available on this CPU");
 205     FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
 206   }
 207 
 208   if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
 209     if (FLAG_IS_DEFAULT(UseSHA)) {
 210       FLAG_SET_DEFAULT(UseSHA, true);
 211     }
 212   } else if (UseSHA) {
 213     warning("SHA instructions are not available on this CPU");
 214     FLAG_SET_DEFAULT(UseSHA, false);
 215   }
 216 
 217   if (!UseSHA) {
 218     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 219     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 220     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 221   } else {
 222     if (auxv & HWCAP_SHA1) {
 223       if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
 224         FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
 225       }
 226     } else if (UseSHA1Intrinsics) {
 227       warning("SHA1 instruction is not available on this CPU.");