1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
886 inline void lduh(const Address& a, Register d, int offset = 0);
887 inline void lduw(const Address& a, Register d, int offset = 0);
888 inline void ldx( const Address& a, Register d, int offset = 0);
889 inline void ld( const Address& a, Register d, int offset = 0);
890 inline void ldd( const Address& a, Register d, int offset = 0);
891
892 inline void ldub(Register s1, RegisterOrConstant s2, Register d );
893 inline void ldsb(Register s1, RegisterOrConstant s2, Register d );
894 inline void lduh(Register s1, RegisterOrConstant s2, Register d );
895 inline void ldsh(Register s1, RegisterOrConstant s2, Register d );
896 inline void lduw(Register s1, RegisterOrConstant s2, Register d );
897 inline void ldsw(Register s1, RegisterOrConstant s2, Register d );
898 inline void ldx( Register s1, RegisterOrConstant s2, Register d );
899 inline void ld( Register s1, RegisterOrConstant s2, Register d );
900 inline void ldd( Register s1, RegisterOrConstant s2, Register d );
901
902 using Assembler::ldf;
903 inline void ldf(FloatRegisterImpl::Width w, Register s1, RegisterOrConstant s2, FloatRegister d);
904 inline void ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset = 0);
905
906 // membar psuedo instruction. takes into account target memory model.
907 inline void membar( Assembler::Membar_mask_bits const7a );
908
909 // returns if membar generates anything.
910 inline bool membar_has_effect( Assembler::Membar_mask_bits const7a );
911
912 // mov pseudo instructions
913 inline void mov( Register s, Register d) {
914 if ( s != d ) or3( G0, s, d);
915 else assert_not_delayed(); // Put something useful in the delay slot!
916 }
917
918 inline void mov_or_nop( Register s, Register d) {
919 if ( s != d ) or3( G0, s, d);
920 else nop();
921 }
922
923 inline void mov( int simm13a, Register d) { or3( G0, simm13a, d); }
924
925 using Assembler::prefetch;
1419 virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset);
1420
1421 void verify_tlab();
1422
1423 Condition negate_condition(Condition cond);
1424
1425 // Helper functions for statistics gathering.
1426 // Conditionally (non-atomically) increments passed counter address, preserving condition codes.
1427 void cond_inc(Condition cond, address counter_addr, Register Rtemp1, Register Rtemp2);
1428 // Unconditional increment.
1429 void inc_counter(address counter_addr, Register Rtmp1, Register Rtmp2);
1430 void inc_counter(int* counter_addr, Register Rtmp1, Register Rtmp2);
1431
1432 // Compare char[] arrays aligned to 4 bytes.
1433 void char_arrays_equals(Register ary1, Register ary2,
1434 Register limit, Register result,
1435 Register chr1, Register chr2, Label& Ldone);
1436 // Use BIS for zeroing
1437 void bis_zeroing(Register to, Register count, Register temp, Label& Ldone);
1438
1439 #undef VIRTUAL
1440 };
1441
1442 /**
1443 * class SkipIfEqual:
1444 *
1445 * Instantiating this class will result in assembly code being output that will
1446 * jump around any code emitted between the creation of the instance and it's
1447 * automatic destruction at the end of a scope block, depending on the value of
1448 * the flag passed to the constructor, which will be checked at run-time.
1449 */
1450 class SkipIfEqual : public StackObj {
1451 private:
1452 MacroAssembler* _masm;
1453 Label _label;
1454
1455 public:
1456 // 'temp' is a temp register that this object can use (and trash)
1457 SkipIfEqual(MacroAssembler*, Register temp,
1458 const bool* flag_addr, Assembler::Condition condition);
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1 /*
2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
886 inline void lduh(const Address& a, Register d, int offset = 0);
887 inline void lduw(const Address& a, Register d, int offset = 0);
888 inline void ldx( const Address& a, Register d, int offset = 0);
889 inline void ld( const Address& a, Register d, int offset = 0);
890 inline void ldd( const Address& a, Register d, int offset = 0);
891
892 inline void ldub(Register s1, RegisterOrConstant s2, Register d );
893 inline void ldsb(Register s1, RegisterOrConstant s2, Register d );
894 inline void lduh(Register s1, RegisterOrConstant s2, Register d );
895 inline void ldsh(Register s1, RegisterOrConstant s2, Register d );
896 inline void lduw(Register s1, RegisterOrConstant s2, Register d );
897 inline void ldsw(Register s1, RegisterOrConstant s2, Register d );
898 inline void ldx( Register s1, RegisterOrConstant s2, Register d );
899 inline void ld( Register s1, RegisterOrConstant s2, Register d );
900 inline void ldd( Register s1, RegisterOrConstant s2, Register d );
901
902 using Assembler::ldf;
903 inline void ldf(FloatRegisterImpl::Width w, Register s1, RegisterOrConstant s2, FloatRegister d);
904 inline void ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset = 0);
905
906 // little-endian
907 inline void ldxl(Register s1, Register s2, Register d) { ldxa(s1, s2, ASI_PRIMARY_LITTLE, d); }
908 inline void ldfl(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d) { ldfa(w, s1, s2, ASI_PRIMARY_LITTLE, d); }
909
910 // membar psuedo instruction. takes into account target memory model.
911 inline void membar( Assembler::Membar_mask_bits const7a );
912
913 // returns if membar generates anything.
914 inline bool membar_has_effect( Assembler::Membar_mask_bits const7a );
915
916 // mov pseudo instructions
917 inline void mov( Register s, Register d) {
918 if ( s != d ) or3( G0, s, d);
919 else assert_not_delayed(); // Put something useful in the delay slot!
920 }
921
922 inline void mov_or_nop( Register s, Register d) {
923 if ( s != d ) or3( G0, s, d);
924 else nop();
925 }
926
927 inline void mov( int simm13a, Register d) { or3( G0, simm13a, d); }
928
929 using Assembler::prefetch;
1423 virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset);
1424
1425 void verify_tlab();
1426
1427 Condition negate_condition(Condition cond);
1428
1429 // Helper functions for statistics gathering.
1430 // Conditionally (non-atomically) increments passed counter address, preserving condition codes.
1431 void cond_inc(Condition cond, address counter_addr, Register Rtemp1, Register Rtemp2);
1432 // Unconditional increment.
1433 void inc_counter(address counter_addr, Register Rtmp1, Register Rtmp2);
1434 void inc_counter(int* counter_addr, Register Rtmp1, Register Rtmp2);
1435
1436 // Compare char[] arrays aligned to 4 bytes.
1437 void char_arrays_equals(Register ary1, Register ary2,
1438 Register limit, Register result,
1439 Register chr1, Register chr2, Label& Ldone);
1440 // Use BIS for zeroing
1441 void bis_zeroing(Register to, Register count, Register temp, Label& Ldone);
1442
1443 // Update CRC-32[C] with a byte value according to constants in table
1444 void update_byte_crc32(Register crc, Register val, Register table);
1445
1446 // Reverse byte order of lower 32 bits, assuming upper 32 bits all zeros
1447 void reverse_bytes_32(Register src, Register dst, Register tmp);
1448 void movitof_revbytes(Register src, FloatRegister dst, Register tmp1, Register tmp2);
1449 void movftoi_revbytes(FloatRegister src, Register dst, Register tmp1, Register tmp2);
1450
1451 #undef VIRTUAL
1452 };
1453
1454 /**
1455 * class SkipIfEqual:
1456 *
1457 * Instantiating this class will result in assembly code being output that will
1458 * jump around any code emitted between the creation of the instance and it's
1459 * automatic destruction at the end of a scope block, depending on the value of
1460 * the flag passed to the constructor, which will be checked at run-time.
1461 */
1462 class SkipIfEqual : public StackObj {
1463 private:
1464 MacroAssembler* _masm;
1465 Label _label;
1466
1467 public:
1468 // 'temp' is a temp register that this object can use (and trash)
1469 SkipIfEqual(MacroAssembler*, Register temp,
1470 const bool* flag_addr, Assembler::Condition condition);
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