src/cpu/x86/vm/macroAssembler_x86.hpp

@@ -1089,10 +1089,35 @@
       Assembler::vinserti128h(dst, nds, src);
     else
       Assembler::vinsertf128h(dst, nds, src);
   }
 
+  void vextractf128h(XMMRegister dst, XMMRegister src) {
+    Assembler::vextractf128h(dst, src);
+  }
+
+  void vextractf128h(Address dst, XMMRegister src) {
+          Assembler::vextractf128h(dst, src);
+  }
+
+  // Add horizontal packed integers
+  void vphaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
+    Assembler::vphaddw(dst, nds, src, vector256);
+  }
+
+  void vphaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
+    Assembler::vphaddd(dst, nds, src, vector256);
+  }
+
+  void phaddw(XMMRegister dst, XMMRegister src) {
+    Assembler::phaddw(dst, src);
+  }
+
+  void phaddd(XMMRegister dst, XMMRegister src) {
+    Assembler::phaddd(dst, src);
+  }
+
   // Carry-Less Multiplication Quadword
   void vpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
     // 0x00 - multiply lower 64 bits [0:63]
     Assembler::vpclmulqdq(dst, nds, src, 0x00);
   }