304 "Trace partial peeling (loop rotation) information") \ 305 \ 306 product(bool, PartialPeelAtUnsignedTests, true, \ 307 "Partial peel at unsigned tests if no signed test exists") \ 308 \ 309 product(bool, ReassociateInvariants, true, \ 310 "Enable reassociation of expressions with loop invariants.") \ 311 \ 312 product(bool, LoopUnswitching, true, \ 313 "Enable loop unswitching (a form of invariant test hoisting)") \ 314 \ 315 notproduct(bool, TraceLoopUnswitching, false, \ 316 "Trace loop unswitching") \ 317 \ 318 product(bool, UseSuperWord, true, \ 319 "Transform scalar operations into superword operations") \ 320 \ 321 develop(bool, SuperWordRTDepCheck, false, \ 322 "Enable runtime dependency checks.") \ 323 \ 324 notproduct(bool, TraceSuperWord, false, \ 325 "Trace superword transforms") \ 326 \ 327 notproduct(bool, TraceNewVectors, false, \ 328 "Trace creation of Vector nodes") \ 329 \ 330 product_pd(bool, OptoBundling, \ 331 "Generate nops to fill i-cache lines") \ 332 \ 333 product_pd(intx, ConditionalMoveLimit, \ 334 "Limit of ops to make speculative when using CMOVE") \ 335 \ 336 /* Set BranchOnRegister == false. See 4965987. */ \ 337 product(bool, BranchOnRegister, false, \ 338 "Use Sparc V9 branch-on-register opcodes") \ 339 \ 340 develop(bool, SparcV9RegsHiBitsZero, true, \ 341 "Assume Sparc V9 I&L registers on V8+ systems are zero-extended") \ 342 \ 343 product(bool, UseRDPCForConstantTableBase, false, \ | 304 "Trace partial peeling (loop rotation) information") \ 305 \ 306 product(bool, PartialPeelAtUnsignedTests, true, \ 307 "Partial peel at unsigned tests if no signed test exists") \ 308 \ 309 product(bool, ReassociateInvariants, true, \ 310 "Enable reassociation of expressions with loop invariants.") \ 311 \ 312 product(bool, LoopUnswitching, true, \ 313 "Enable loop unswitching (a form of invariant test hoisting)") \ 314 \ 315 notproduct(bool, TraceLoopUnswitching, false, \ 316 "Trace loop unswitching") \ 317 \ 318 product(bool, UseSuperWord, true, \ 319 "Transform scalar operations into superword operations") \ 320 \ 321 develop(bool, SuperWordRTDepCheck, false, \ 322 "Enable runtime dependency checks.") \ 323 \ 324 product(bool, SuperWordReductions, true, \ 325 "Enable reductions support in superword.") \ 326 \ 327 notproduct(bool, TraceSuperWord, false, \ 328 "Trace superword transforms") \ 329 \ 330 notproduct(bool, TraceNewVectors, false, \ 331 "Trace creation of Vector nodes") \ 332 \ 333 product_pd(bool, OptoBundling, \ 334 "Generate nops to fill i-cache lines") \ 335 \ 336 product_pd(intx, ConditionalMoveLimit, \ 337 "Limit of ops to make speculative when using CMOVE") \ 338 \ 339 /* Set BranchOnRegister == false. See 4965987. */ \ 340 product(bool, BranchOnRegister, false, \ 341 "Use Sparc V9 branch-on-register opcodes") \ 342 \ 343 develop(bool, SparcV9RegsHiBitsZero, true, \ 344 "Assume Sparc V9 I&L registers on V8+ systems are zero-extended") \ 345 \ 346 product(bool, UseRDPCForConstantTableBase, false, \ |