28 #include "asm/register.hpp" 29 30 class VMRegImpl; 31 typedef VMRegImpl* VMReg; 32 33 // Use Register as shortcut 34 class RegisterImpl; 35 typedef RegisterImpl* Register; 36 37 38 // The implementation of integer registers for the ia32 architecture 39 inline Register as_Register(int encoding) { 40 return (Register)(intptr_t) encoding; 41 } 42 43 class RegisterImpl: public AbstractRegisterImpl { 44 public: 45 enum { 46 #ifndef AMD64 47 number_of_registers = 8, 48 number_of_byte_registers = 4 49 #else 50 number_of_registers = 16, 51 number_of_byte_registers = 16 52 #endif // AMD64 53 }; 54 55 // derived registers, offsets, and addresses 56 Register successor() const { return as_Register(encoding() + 1); } 57 58 // construction 59 inline friend Register as_Register(int encoding); 60 61 inline VMReg as_VMReg(); 62 63 // accessors 64 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } 65 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 66 bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; } 67 const char* name() const; 68 }; 69 70 // The integer registers of the ia32/amd64 architecture 71 126 class XMMRegisterImpl; 127 typedef XMMRegisterImpl* XMMRegister; 128 129 // Use MMXRegister as shortcut 130 class MMXRegisterImpl; 131 typedef MMXRegisterImpl* MMXRegister; 132 133 inline XMMRegister as_XMMRegister(int encoding) { 134 return (XMMRegister)(intptr_t)encoding; 135 } 136 137 inline MMXRegister as_MMXRegister(int encoding) { 138 return (MMXRegister)(intptr_t)encoding; 139 } 140 141 // The implementation of XMM registers for the IA32 architecture 142 class XMMRegisterImpl: public AbstractRegisterImpl { 143 public: 144 enum { 145 #ifndef AMD64 146 number_of_registers = 8 147 #else 148 number_of_registers = 16 149 #endif // AMD64 150 }; 151 152 // construction 153 friend XMMRegister as_XMMRegister(int encoding); 154 155 inline VMReg as_VMReg(); 156 157 // derived registers, offsets, and addresses 158 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); } 159 160 // accessors 161 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; } 162 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 163 const char* name() const; 164 }; 165 166 167 // The XMM registers, for P3 and up chips 168 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1)); 169 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0)); 170 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1)); 171 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2)); 172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3)); 173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4)); 174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5)); 175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6)); 176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7)); 177 #ifdef AMD64 178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8)); 179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9)); 180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10)); 181 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11)); 182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12)); 183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13)); 184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14, (14)); 185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15, (15)); 186 #endif // AMD64 187 188 // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence 189 // can't be described in oopMaps and therefore can't be used by the compilers (at least 190 // were deopt might wan't to see them). 191 192 // The MMX registers, for P3 and up chips 193 CONSTANT_REGISTER_DECLARATION(MMXRegister, mnoreg , (-1)); 194 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx0 , ( 0)); 195 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx1 , ( 1)); 196 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx2 , ( 2)); 197 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx3 , ( 3)); 198 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4)); 199 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5)); 200 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6)); 201 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7)); 202 203 204 // Need to know the total number of registers of all sorts for SharedInfo. 205 // Define a class that exports it. 206 class ConcreteRegisterImpl : public AbstractRegisterImpl { 207 public: 208 enum { 209 // A big enough number for C2: all the registers plus flags 210 // This number must be large enough to cover REG_COUNT (defined by c2) registers. 211 // There is no requirement that any ordering here matches any ordering c2 gives 212 // it's optoregs. 213 214 number_of_registers = RegisterImpl::number_of_registers + 215 #ifdef AMD64 216 RegisterImpl::number_of_registers + // "H" half of a 64bit register 217 #endif // AMD64 218 2 * FloatRegisterImpl::number_of_registers + 219 8 * XMMRegisterImpl::number_of_registers + 220 1 // eflags 221 }; 222 223 static const int max_gpr; 224 static const int max_fpr; 225 static const int max_xmm; 226 227 }; 228 229 #endif // CPU_X86_VM_REGISTER_X86_HPP | 28 #include "asm/register.hpp" 29 30 class VMRegImpl; 31 typedef VMRegImpl* VMReg; 32 33 // Use Register as shortcut 34 class RegisterImpl; 35 typedef RegisterImpl* Register; 36 37 38 // The implementation of integer registers for the ia32 architecture 39 inline Register as_Register(int encoding) { 40 return (Register)(intptr_t) encoding; 41 } 42 43 class RegisterImpl: public AbstractRegisterImpl { 44 public: 45 enum { 46 #ifndef AMD64 47 number_of_registers = 8, 48 number_of_byte_registers = 4, 49 max_slots_per_register = 1 50 #else 51 number_of_registers = 16, 52 number_of_byte_registers = 16, 53 max_slots_per_register = 1 54 #endif // AMD64 55 }; 56 57 // derived registers, offsets, and addresses 58 Register successor() const { return as_Register(encoding() + 1); } 59 60 // construction 61 inline friend Register as_Register(int encoding); 62 63 inline VMReg as_VMReg(); 64 65 // accessors 66 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } 67 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 68 bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; } 69 const char* name() const; 70 }; 71 72 // The integer registers of the ia32/amd64 architecture 73 128 class XMMRegisterImpl; 129 typedef XMMRegisterImpl* XMMRegister; 130 131 // Use MMXRegister as shortcut 132 class MMXRegisterImpl; 133 typedef MMXRegisterImpl* MMXRegister; 134 135 inline XMMRegister as_XMMRegister(int encoding) { 136 return (XMMRegister)(intptr_t)encoding; 137 } 138 139 inline MMXRegister as_MMXRegister(int encoding) { 140 return (MMXRegister)(intptr_t)encoding; 141 } 142 143 // The implementation of XMM registers for the IA32 architecture 144 class XMMRegisterImpl: public AbstractRegisterImpl { 145 public: 146 enum { 147 #ifndef AMD64 148 number_of_registers = 8, 149 max_slots_per_register = 16 // 512-bit 150 #else 151 number_of_registers = 32, 152 max_slots_per_register = 16 // 512-bit 153 #endif // AMD64 154 }; 155 156 // construction 157 friend XMMRegister as_XMMRegister(int encoding); 158 159 inline VMReg as_VMReg(); 160 161 // derived registers, offsets, and addresses 162 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); } 163 164 // accessors 165 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; } 166 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 167 const char* name() const; 168 }; 169 170 171 // The XMM registers, for P3 and up chips 172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1)); 173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0)); 174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1)); 175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2)); 176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3)); 177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4)); 178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5)); 179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6)); 180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7)); 181 #ifdef AMD64 182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8)); 183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9)); 184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10)); 185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11)); 186 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12)); 187 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13)); 188 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14, (14)); 189 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15, (15)); 190 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm16, (16)); 191 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm17, (17)); 192 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm18, (18)); 193 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm19, (19)); 194 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm20, (20)); 195 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm21, (21)); 196 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm22, (22)); 197 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm23, (23)); 198 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm24, (24)); 199 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm25, (25)); 200 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm26, (26)); 201 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm27, (27)); 202 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm28, (28)); 203 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm29, (29)); 204 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm30, (30)); 205 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm31, (31)); 206 #endif // AMD64 207 208 // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence 209 // can't be described in oopMaps and therefore can't be used by the compilers (at least 210 // were deopt might wan't to see them). 211 212 // The MMX registers, for P3 and up chips 213 CONSTANT_REGISTER_DECLARATION(MMXRegister, mnoreg , (-1)); 214 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx0 , ( 0)); 215 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx1 , ( 1)); 216 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx2 , ( 2)); 217 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx3 , ( 3)); 218 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4)); 219 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5)); 220 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6)); 221 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7)); 222 223 // Use XMMRegister as shortcut 224 class KRegisterImpl; 225 typedef KRegisterImpl* KRegister; 226 227 inline KRegister as_KRegister(int encoding) { 228 return (KRegister)(intptr_t)encoding; 229 } 230 231 // The implementation of XMM registers for the IA32 architecture 232 class KRegisterImpl : public AbstractRegisterImpl { 233 public: 234 enum { 235 number_of_registers = 8, 236 max_slots_per_register = 1 237 }; 238 239 // construction 240 friend KRegister as_KRegister(int encoding); 241 242 inline VMReg as_VMReg(); 243 244 // derived registers, offsets, and addresses 245 KRegister successor() const { return as_KRegister(encoding() + 1); } 246 247 // accessors 248 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this)); return (intptr_t)this; } 249 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } 250 const char* name() const; 251 }; 252 253 // The Mask registers, for AVX3 enabled and up chips 254 CONSTANT_REGISTER_DECLARATION(KRegister, knoreg, (-1)); 255 CONSTANT_REGISTER_DECLARATION(KRegister, k0, (0)); 256 CONSTANT_REGISTER_DECLARATION(KRegister, k1, (1)); 257 CONSTANT_REGISTER_DECLARATION(KRegister, k2, (2)); 258 CONSTANT_REGISTER_DECLARATION(KRegister, k3, (3)); 259 CONSTANT_REGISTER_DECLARATION(KRegister, k4, (4)); 260 CONSTANT_REGISTER_DECLARATION(KRegister, k5, (5)); 261 CONSTANT_REGISTER_DECLARATION(KRegister, k6, (6)); 262 CONSTANT_REGISTER_DECLARATION(KRegister, k7, (7)); 263 264 // Need to know the total number of registers of all sorts for SharedInfo. 265 // Define a class that exports it. 266 class ConcreteRegisterImpl : public AbstractRegisterImpl { 267 public: 268 enum { 269 // A big enough number for C2: all the registers plus flags 270 // This number must be large enough to cover REG_COUNT (defined by c2) registers. 271 // There is no requirement that any ordering here matches any ordering c2 gives 272 // it's optoregs. 273 274 number_of_registers = RegisterImpl::number_of_registers + 275 #ifdef AMD64 276 RegisterImpl::number_of_registers + // "H" half of a 64bit register 277 #endif // AMD64 278 2 * FloatRegisterImpl::number_of_registers + 279 XMMRegisterImpl::max_slots_per_register * XMMRegisterImpl::number_of_registers + 280 KRegisterImpl::number_of_registers + // mask registers 281 1 // eflags 282 }; 283 284 static const int max_gpr; 285 static const int max_fpr; 286 static const int max_xmm; 287 static const int max_kpr; 288 289 }; 290 291 #endif // CPU_X86_VM_REGISTER_X86_HPP |