1 /* 2 * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/debugInfoRec.hpp" 29 #include "code/icBuffer.hpp" 30 #include "code/vtableStubs.hpp" 31 #include "interpreter/interpreter.hpp" 32 #include "oops/compiledICHolder.hpp" 33 #include "prims/jvmtiRedefineClassesTrace.hpp" 34 #include "runtime/sharedRuntime.hpp" 35 #include "runtime/vframeArray.hpp" 36 #include "vmreg_x86.inline.hpp" 37 #ifdef COMPILER1 38 #include "c1/c1_Runtime1.hpp" 39 #endif 40 #ifdef COMPILER2 41 #include "opto/runtime.hpp" 42 #endif 43 44 #define __ masm-> 45 46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 47 48 class SimpleRuntimeFrame { 49 50 public: 51 52 // Most of the runtime stubs have this simple frame layout. 53 // This class exists to make the layout shared in one place. 54 // Offsets are for compiler stack slots, which are jints. 55 enum layout { 56 // The frame sender code expects that rbp will be in the "natural" place and 57 // will override any oopMap setting for it. We must therefore force the layout 58 // so that it agrees with the frame sender code. 59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, 60 rbp_off2, 61 return_off, return_off2, 62 framesize 63 }; 64 }; 65 66 class RegisterSaver { 67 // Capture info about frame layout. Layout offsets are in jint 68 // units because compiler frame slots are jints. 69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off 70 enum layout { 71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area 72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area 73 DEF_XMM_OFFS(0), 74 DEF_XMM_OFFS(1), 75 DEF_XMM_OFFS(2), 76 DEF_XMM_OFFS(3), 77 DEF_XMM_OFFS(4), 78 DEF_XMM_OFFS(5), 79 DEF_XMM_OFFS(6), 80 DEF_XMM_OFFS(7), 81 DEF_XMM_OFFS(8), 82 DEF_XMM_OFFS(9), 83 DEF_XMM_OFFS(10), 84 DEF_XMM_OFFS(11), 85 DEF_XMM_OFFS(12), 86 DEF_XMM_OFFS(13), 87 DEF_XMM_OFFS(14), 88 DEF_XMM_OFFS(15), 89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), 90 fpu_stateH_end, 91 r15_off, r15H_off, 92 r14_off, r14H_off, 93 r13_off, r13H_off, 94 r12_off, r12H_off, 95 r11_off, r11H_off, 96 r10_off, r10H_off, 97 r9_off, r9H_off, 98 r8_off, r8H_off, 99 rdi_off, rdiH_off, 100 rsi_off, rsiH_off, 101 ignore_off, ignoreH_off, // extra copy of rbp 102 rsp_off, rspH_off, 103 rbx_off, rbxH_off, 104 rdx_off, rdxH_off, 105 rcx_off, rcxH_off, 106 rax_off, raxH_off, 107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state 108 align_off, alignH_off, 109 flags_off, flagsH_off, 110 // The frame sender code expects that rbp will be in the "natural" place and 111 // will override any oopMap setting for it. We must therefore force the layout 112 // so that it agrees with the frame sender code. 113 rbp_off, rbpH_off, // copy of rbp we will restore 114 return_off, returnH_off, // slot for return address 115 reg_save_size // size in compiler stack slots 116 }; 117 118 public: 119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); 120 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 121 122 // Offsets into the register save area 123 // Used by deoptimization when it is managing result register 124 // values on its own 125 126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } 129 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } 130 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } 131 132 // During deoptimization only the result registers need to be restored, 133 // all the other values have already been extracted. 134 static void restore_result_registers(MacroAssembler* masm); 135 }; 136 137 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { 138 int vect_words = 0; 139 #ifdef COMPILER2 140 if (save_vectors) { 141 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); 142 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); 143 // Save upper half of YMM registes 144 vect_words = 16 * 16 / wordSize; 145 additional_frame_words += vect_words; 146 } 147 #else 148 assert(!save_vectors, "vectors are generated only by C2"); 149 #endif 150 151 // Always make the frame size 16-byte aligned 152 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + 153 reg_save_size*BytesPerInt, 16); 154 // OopMap frame size is in compiler stack slots (jint's) not bytes or words 155 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; 156 // The caller will allocate additional_frame_words 157 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; 158 // CodeBlob frame size is in words. 159 int frame_size_in_words = frame_size_in_bytes / wordSize; 160 *total_frame_words = frame_size_in_words; 161 162 // Save registers, fpu state, and flags. 163 // We assume caller has already pushed the return address onto the 164 // stack, so rsp is 8-byte aligned here. 165 // We push rpb twice in this sequence because we want the real rbp 166 // to be under the return like a normal enter. 167 168 __ enter(); // rsp becomes 16-byte aligned here 169 __ push_CPU_state(); // Push a multiple of 16 bytes 170 171 if (vect_words > 0) { 172 assert(vect_words*wordSize == 256, ""); 173 __ subptr(rsp, 256); // Save upper half of YMM registes 174 __ vextractf128h(Address(rsp, 0),xmm0); 175 __ vextractf128h(Address(rsp, 16),xmm1); 176 __ vextractf128h(Address(rsp, 32),xmm2); 177 __ vextractf128h(Address(rsp, 48),xmm3); 178 __ vextractf128h(Address(rsp, 64),xmm4); 179 __ vextractf128h(Address(rsp, 80),xmm5); 180 __ vextractf128h(Address(rsp, 96),xmm6); 181 __ vextractf128h(Address(rsp,112),xmm7); 182 __ vextractf128h(Address(rsp,128),xmm8); 183 __ vextractf128h(Address(rsp,144),xmm9); 184 __ vextractf128h(Address(rsp,160),xmm10); 185 __ vextractf128h(Address(rsp,176),xmm11); 186 __ vextractf128h(Address(rsp,192),xmm12); 187 __ vextractf128h(Address(rsp,208),xmm13); 188 __ vextractf128h(Address(rsp,224),xmm14); 189 __ vextractf128h(Address(rsp,240),xmm15); 190 } 191 if (frame::arg_reg_save_area_bytes != 0) { 192 // Allocate argument register save area 193 __ subptr(rsp, frame::arg_reg_save_area_bytes); 194 } 195 196 // Set an oopmap for the call site. This oopmap will map all 197 // oop-registers and debug-info registers as callee-saved. This 198 // will allow deoptimization at this safepoint to find all possible 199 // debug-info recordings, as well as let GC find all oops. 200 201 OopMapSet *oop_maps = new OopMapSet(); 202 OopMap* map = new OopMap(frame_size_in_slots, 0); 203 204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) 205 206 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); 207 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); 208 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); 209 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); 210 // rbp location is known implicitly by the frame sender code, needs no oopmap 211 // and the location where rbp was saved by is ignored 212 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); 213 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); 214 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); 215 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); 216 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); 217 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); 218 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); 219 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); 220 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); 221 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); 222 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); 223 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); 224 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); 225 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); 226 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); 227 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); 228 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); 229 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); 230 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); 231 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); 232 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); 233 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); 234 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); 235 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); 236 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); 237 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); 238 239 // %%% These should all be a waste but we'll keep things as they were for now 240 if (true) { 241 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); 242 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); 243 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); 244 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); 245 // rbp location is known implicitly by the frame sender code, needs no oopmap 246 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); 247 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); 248 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); 249 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); 250 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); 251 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); 252 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); 253 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); 254 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); 255 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); 256 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); 257 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); 258 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); 259 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); 260 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); 261 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); 262 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); 263 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); 264 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); 265 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); 266 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); 267 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); 268 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); 269 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); 270 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); 271 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); 272 } 273 274 return map; 275 } 276 277 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 278 if (frame::arg_reg_save_area_bytes != 0) { 279 // Pop arg register save area 280 __ addptr(rsp, frame::arg_reg_save_area_bytes); 281 } 282 #ifdef COMPILER2 283 if (restore_vectors) { 284 // Restore upper half of YMM registes. 285 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); 286 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); 287 __ vinsertf128h(xmm0, Address(rsp, 0)); 288 __ vinsertf128h(xmm1, Address(rsp, 16)); 289 __ vinsertf128h(xmm2, Address(rsp, 32)); 290 __ vinsertf128h(xmm3, Address(rsp, 48)); 291 __ vinsertf128h(xmm4, Address(rsp, 64)); 292 __ vinsertf128h(xmm5, Address(rsp, 80)); 293 __ vinsertf128h(xmm6, Address(rsp, 96)); 294 __ vinsertf128h(xmm7, Address(rsp,112)); 295 __ vinsertf128h(xmm8, Address(rsp,128)); 296 __ vinsertf128h(xmm9, Address(rsp,144)); 297 __ vinsertf128h(xmm10, Address(rsp,160)); 298 __ vinsertf128h(xmm11, Address(rsp,176)); 299 __ vinsertf128h(xmm12, Address(rsp,192)); 300 __ vinsertf128h(xmm13, Address(rsp,208)); 301 __ vinsertf128h(xmm14, Address(rsp,224)); 302 __ vinsertf128h(xmm15, Address(rsp,240)); 303 __ addptr(rsp, 256); 304 } 305 #else 306 assert(!restore_vectors, "vectors are generated only by C2"); 307 #endif 308 // Recover CPU state 309 __ pop_CPU_state(); 310 // Get the rbp described implicitly by the calling convention (no oopMap) 311 __ pop(rbp); 312 } 313 314 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 315 316 // Just restore result register. Only used by deoptimization. By 317 // now any callee save register that needs to be restored to a c2 318 // caller of the deoptee has been extracted into the vframeArray 319 // and will be stuffed into the c2i adapter we create for later 320 // restoration so only result registers need to be restored here. 321 322 // Restore fp result register 323 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); 324 // Restore integer result register 325 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); 326 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); 327 328 // Pop all of the register save are off the stack except the return address 329 __ addptr(rsp, return_offset_in_bytes()); 330 } 331 332 // Is vector's size (in bytes) bigger than a size saved by default? 333 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. 334 bool SharedRuntime::is_wide_vector(int size) { 335 return size > 16; 336 } 337 338 // The java_calling_convention describes stack locations as ideal slots on 339 // a frame with no abi restrictions. Since we must observe abi restrictions 340 // (like the placement of the register window) the slots must be biased by 341 // the following value. 342 static int reg2offset_in(VMReg r) { 343 // Account for saved rbp and return address 344 // This should really be in_preserve_stack_slots 345 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; 346 } 347 348 static int reg2offset_out(VMReg r) { 349 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 350 } 351 352 // --------------------------------------------------------------------------- 353 // Read the array of BasicTypes from a signature, and compute where the 354 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 355 // quantities. Values less than VMRegImpl::stack0 are registers, those above 356 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 357 // as framesizes are fixed. 358 // VMRegImpl::stack0 refers to the first slot 0(sp). 359 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 360 // up to RegisterImpl::number_of_registers) are the 64-bit 361 // integer registers. 362 363 // Note: the INPUTS in sig_bt are in units of Java argument words, which are 364 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 365 // units regardless of build. Of course for i486 there is no 64 bit build 366 367 // The Java calling convention is a "shifted" version of the C ABI. 368 // By skipping the first C ABI register we can call non-static jni methods 369 // with small numbers of arguments without having to shuffle the arguments 370 // at all. Since we control the java ABI we ought to at least get some 371 // advantage out of it. 372 373 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 374 VMRegPair *regs, 375 int total_args_passed, 376 int is_outgoing) { 377 378 // Create the mapping between argument positions and 379 // registers. 380 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { 381 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 382 }; 383 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { 384 j_farg0, j_farg1, j_farg2, j_farg3, 385 j_farg4, j_farg5, j_farg6, j_farg7 386 }; 387 388 389 uint int_args = 0; 390 uint fp_args = 0; 391 uint stk_args = 0; // inc by 2 each time 392 393 for (int i = 0; i < total_args_passed; i++) { 394 switch (sig_bt[i]) { 395 case T_BOOLEAN: 396 case T_CHAR: 397 case T_BYTE: 398 case T_SHORT: 399 case T_INT: 400 if (int_args < Argument::n_int_register_parameters_j) { 401 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 402 } else { 403 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 404 stk_args += 2; 405 } 406 break; 407 case T_VOID: 408 // halves of T_LONG or T_DOUBLE 409 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 410 regs[i].set_bad(); 411 break; 412 case T_LONG: 413 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 414 // fall through 415 case T_OBJECT: 416 case T_ARRAY: 417 case T_ADDRESS: 418 if (int_args < Argument::n_int_register_parameters_j) { 419 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 420 } else { 421 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 422 stk_args += 2; 423 } 424 break; 425 case T_FLOAT: 426 if (fp_args < Argument::n_float_register_parameters_j) { 427 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 428 } else { 429 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 430 stk_args += 2; 431 } 432 break; 433 case T_DOUBLE: 434 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 435 if (fp_args < Argument::n_float_register_parameters_j) { 436 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 437 } else { 438 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 439 stk_args += 2; 440 } 441 break; 442 default: 443 ShouldNotReachHere(); 444 break; 445 } 446 } 447 448 return round_to(stk_args, 2); 449 } 450 451 // Patch the callers callsite with entry to compiled code if it exists. 452 static void patch_callers_callsite(MacroAssembler *masm) { 453 Label L; 454 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); 455 __ jcc(Assembler::equal, L); 456 457 // Save the current stack pointer 458 __ mov(r13, rsp); 459 // Schedule the branch target address early. 460 // Call into the VM to patch the caller, then jump to compiled callee 461 // rax isn't live so capture return address while we easily can 462 __ movptr(rax, Address(rsp, 0)); 463 464 // align stack so push_CPU_state doesn't fault 465 __ andptr(rsp, -(StackAlignmentInBytes)); 466 __ push_CPU_state(); 467 468 // VM needs caller's callsite 469 // VM needs target method 470 // This needs to be a long call since we will relocate this adapter to 471 // the codeBuffer and it may not reach 472 473 // Allocate argument register save area 474 if (frame::arg_reg_save_area_bytes != 0) { 475 __ subptr(rsp, frame::arg_reg_save_area_bytes); 476 } 477 __ mov(c_rarg0, rbx); 478 __ mov(c_rarg1, rax); 479 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 480 481 // De-allocate argument register save area 482 if (frame::arg_reg_save_area_bytes != 0) { 483 __ addptr(rsp, frame::arg_reg_save_area_bytes); 484 } 485 486 __ pop_CPU_state(); 487 // restore sp 488 __ mov(rsp, r13); 489 __ bind(L); 490 } 491 492 493 static void gen_c2i_adapter(MacroAssembler *masm, 494 int total_args_passed, 495 int comp_args_on_stack, 496 const BasicType *sig_bt, 497 const VMRegPair *regs, 498 Label& skip_fixup) { 499 // Before we get into the guts of the C2I adapter, see if we should be here 500 // at all. We've come from compiled code and are attempting to jump to the 501 // interpreter, which means the caller made a static call to get here 502 // (vcalls always get a compiled target if there is one). Check for a 503 // compiled target. If there is one, we need to patch the caller's call. 504 patch_callers_callsite(masm); 505 506 __ bind(skip_fixup); 507 508 // Since all args are passed on the stack, total_args_passed * 509 // Interpreter::stackElementSize is the space we need. Plus 1 because 510 // we also account for the return address location since 511 // we store it first rather than hold it in rax across all the shuffling 512 513 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; 514 515 // stack is aligned, keep it that way 516 extraspace = round_to(extraspace, 2*wordSize); 517 518 // Get return address 519 __ pop(rax); 520 521 // set senderSP value 522 __ mov(r13, rsp); 523 524 __ subptr(rsp, extraspace); 525 526 // Store the return address in the expected location 527 __ movptr(Address(rsp, 0), rax); 528 529 // Now write the args into the outgoing interpreter space 530 for (int i = 0; i < total_args_passed; i++) { 531 if (sig_bt[i] == T_VOID) { 532 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 533 continue; 534 } 535 536 // offset to start parameters 537 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; 538 int next_off = st_off - Interpreter::stackElementSize; 539 540 // Say 4 args: 541 // i st_off 542 // 0 32 T_LONG 543 // 1 24 T_VOID 544 // 2 16 T_OBJECT 545 // 3 8 T_BOOL 546 // - 0 return address 547 // 548 // However to make thing extra confusing. Because we can fit a long/double in 549 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 550 // leaves one slot empty and only stores to a single slot. In this case the 551 // slot that is occupied is the T_VOID slot. See I said it was confusing. 552 553 VMReg r_1 = regs[i].first(); 554 VMReg r_2 = regs[i].second(); 555 if (!r_1->is_valid()) { 556 assert(!r_2->is_valid(), ""); 557 continue; 558 } 559 if (r_1->is_stack()) { 560 // memory to memory use rax 561 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 562 if (!r_2->is_valid()) { 563 // sign extend?? 564 __ movl(rax, Address(rsp, ld_off)); 565 __ movptr(Address(rsp, st_off), rax); 566 567 } else { 568 569 __ movq(rax, Address(rsp, ld_off)); 570 571 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 572 // T_DOUBLE and T_LONG use two slots in the interpreter 573 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 574 // ld_off == LSW, ld_off+wordSize == MSW 575 // st_off == MSW, next_off == LSW 576 __ movq(Address(rsp, next_off), rax); 577 #ifdef ASSERT 578 // Overwrite the unused slot with known junk 579 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); 580 __ movptr(Address(rsp, st_off), rax); 581 #endif /* ASSERT */ 582 } else { 583 __ movq(Address(rsp, st_off), rax); 584 } 585 } 586 } else if (r_1->is_Register()) { 587 Register r = r_1->as_Register(); 588 if (!r_2->is_valid()) { 589 // must be only an int (or less ) so move only 32bits to slot 590 // why not sign extend?? 591 __ movl(Address(rsp, st_off), r); 592 } else { 593 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 594 // T_DOUBLE and T_LONG use two slots in the interpreter 595 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 596 // long/double in gpr 597 #ifdef ASSERT 598 // Overwrite the unused slot with known junk 599 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); 600 __ movptr(Address(rsp, st_off), rax); 601 #endif /* ASSERT */ 602 __ movq(Address(rsp, next_off), r); 603 } else { 604 __ movptr(Address(rsp, st_off), r); 605 } 606 } 607 } else { 608 assert(r_1->is_XMMRegister(), ""); 609 if (!r_2->is_valid()) { 610 // only a float use just part of the slot 611 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); 612 } else { 613 #ifdef ASSERT 614 // Overwrite the unused slot with known junk 615 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); 616 __ movptr(Address(rsp, st_off), rax); 617 #endif /* ASSERT */ 618 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); 619 } 620 } 621 } 622 623 // Schedule the branch target address early. 624 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); 625 __ jmp(rcx); 626 } 627 628 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, 629 address code_start, address code_end, 630 Label& L_ok) { 631 Label L_fail; 632 __ lea(temp_reg, ExternalAddress(code_start)); 633 __ cmpptr(pc_reg, temp_reg); 634 __ jcc(Assembler::belowEqual, L_fail); 635 __ lea(temp_reg, ExternalAddress(code_end)); 636 __ cmpptr(pc_reg, temp_reg); 637 __ jcc(Assembler::below, L_ok); 638 __ bind(L_fail); 639 } 640 641 static void gen_i2c_adapter(MacroAssembler *masm, 642 int total_args_passed, 643 int comp_args_on_stack, 644 const BasicType *sig_bt, 645 const VMRegPair *regs) { 646 647 // Note: r13 contains the senderSP on entry. We must preserve it since 648 // we may do a i2c -> c2i transition if we lose a race where compiled 649 // code goes non-entrant while we get args ready. 650 // In addition we use r13 to locate all the interpreter args as 651 // we must align the stack to 16 bytes on an i2c entry else we 652 // lose alignment we expect in all compiled code and register 653 // save code can segv when fxsave instructions find improperly 654 // aligned stack pointer. 655 656 // Adapters can be frameless because they do not require the caller 657 // to perform additional cleanup work, such as correcting the stack pointer. 658 // An i2c adapter is frameless because the *caller* frame, which is interpreted, 659 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), 660 // even if a callee has modified the stack pointer. 661 // A c2i adapter is frameless because the *callee* frame, which is interpreted, 662 // routinely repairs its caller's stack pointer (from sender_sp, which is set 663 // up via the senderSP register). 664 // In other words, if *either* the caller or callee is interpreted, we can 665 // get the stack pointer repaired after a call. 666 // This is why c2i and i2c adapters cannot be indefinitely composed. 667 // In particular, if a c2i adapter were to somehow call an i2c adapter, 668 // both caller and callee would be compiled methods, and neither would 669 // clean up the stack pointer changes performed by the two adapters. 670 // If this happens, control eventually transfers back to the compiled 671 // caller, but with an uncorrected stack, causing delayed havoc. 672 673 // Pick up the return address 674 __ movptr(rax, Address(rsp, 0)); 675 676 if (VerifyAdapterCalls && 677 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { 678 // So, let's test for cascading c2i/i2c adapters right now. 679 // assert(Interpreter::contains($return_addr) || 680 // StubRoutines::contains($return_addr), 681 // "i2c adapter must return to an interpreter frame"); 682 __ block_comment("verify_i2c { "); 683 Label L_ok; 684 if (Interpreter::code() != NULL) 685 range_check(masm, rax, r11, 686 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 687 L_ok); 688 if (StubRoutines::code1() != NULL) 689 range_check(masm, rax, r11, 690 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), 691 L_ok); 692 if (StubRoutines::code2() != NULL) 693 range_check(masm, rax, r11, 694 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), 695 L_ok); 696 const char* msg = "i2c adapter must return to an interpreter frame"; 697 __ block_comment(msg); 698 __ stop(msg); 699 __ bind(L_ok); 700 __ block_comment("} verify_i2ce "); 701 } 702 703 // Must preserve original SP for loading incoming arguments because 704 // we need to align the outgoing SP for compiled code. 705 __ movptr(r11, rsp); 706 707 // Cut-out for having no stack args. Since up to 2 int/oop args are passed 708 // in registers, we will occasionally have no stack args. 709 int comp_words_on_stack = 0; 710 if (comp_args_on_stack) { 711 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 712 // registers are below. By subtracting stack0, we either get a negative 713 // number (all values in registers) or the maximum stack slot accessed. 714 715 // Convert 4-byte c2 stack slots to words. 716 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; 717 // Round up to miminum stack alignment, in wordSize 718 comp_words_on_stack = round_to(comp_words_on_stack, 2); 719 __ subptr(rsp, comp_words_on_stack * wordSize); 720 } 721 722 723 // Ensure compiled code always sees stack at proper alignment 724 __ andptr(rsp, -16); 725 726 // push the return address and misalign the stack that youngest frame always sees 727 // as far as the placement of the call instruction 728 __ push(rax); 729 730 // Put saved SP in another register 731 const Register saved_sp = rax; 732 __ movptr(saved_sp, r11); 733 734 // Will jump to the compiled code just as if compiled code was doing it. 735 // Pre-load the register-jump target early, to schedule it better. 736 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); 737 738 // Now generate the shuffle code. Pick up all register args and move the 739 // rest through the floating point stack top. 740 for (int i = 0; i < total_args_passed; i++) { 741 if (sig_bt[i] == T_VOID) { 742 // Longs and doubles are passed in native word order, but misaligned 743 // in the 32-bit build. 744 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 745 continue; 746 } 747 748 // Pick up 0, 1 or 2 words from SP+offset. 749 750 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 751 "scrambled load targets?"); 752 // Load in argument order going down. 753 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; 754 // Point to interpreter value (vs. tag) 755 int next_off = ld_off - Interpreter::stackElementSize; 756 // 757 // 758 // 759 VMReg r_1 = regs[i].first(); 760 VMReg r_2 = regs[i].second(); 761 if (!r_1->is_valid()) { 762 assert(!r_2->is_valid(), ""); 763 continue; 764 } 765 if (r_1->is_stack()) { 766 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 767 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; 768 769 // We can use r13 as a temp here because compiled code doesn't need r13 as an input 770 // and if we end up going thru a c2i because of a miss a reasonable value of r13 771 // will be generated. 772 if (!r_2->is_valid()) { 773 // sign extend??? 774 __ movl(r13, Address(saved_sp, ld_off)); 775 __ movptr(Address(rsp, st_off), r13); 776 } else { 777 // 778 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 779 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 780 // So we must adjust where to pick up the data to match the interpreter. 781 // 782 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 783 // are accessed as negative so LSW is at LOW address 784 785 // ld_off is MSW so get LSW 786 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 787 next_off : ld_off; 788 __ movq(r13, Address(saved_sp, offset)); 789 // st_off is LSW (i.e. reg.first()) 790 __ movq(Address(rsp, st_off), r13); 791 } 792 } else if (r_1->is_Register()) { // Register argument 793 Register r = r_1->as_Register(); 794 assert(r != rax, "must be different"); 795 if (r_2->is_valid()) { 796 // 797 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 798 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 799 // So we must adjust where to pick up the data to match the interpreter. 800 801 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 802 next_off : ld_off; 803 804 // this can be a misaligned move 805 __ movq(r, Address(saved_sp, offset)); 806 } else { 807 // sign extend and use a full word? 808 __ movl(r, Address(saved_sp, ld_off)); 809 } 810 } else { 811 if (!r_2->is_valid()) { 812 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); 813 } else { 814 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); 815 } 816 } 817 } 818 819 // 6243940 We might end up in handle_wrong_method if 820 // the callee is deoptimized as we race thru here. If that 821 // happens we don't want to take a safepoint because the 822 // caller frame will look interpreted and arguments are now 823 // "compiled" so it is much better to make this transition 824 // invisible to the stack walking code. Unfortunately if 825 // we try and find the callee by normal means a safepoint 826 // is possible. So we stash the desired callee in the thread 827 // and the vm will find there should this case occur. 828 829 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); 830 831 // put Method* where a c2i would expect should we end up there 832 // only needed becaus eof c2 resolve stubs return Method* as a result in 833 // rax 834 __ mov(rax, rbx); 835 __ jmp(r11); 836 } 837 838 // --------------------------------------------------------------- 839 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 840 int total_args_passed, 841 int comp_args_on_stack, 842 const BasicType *sig_bt, 843 const VMRegPair *regs, 844 AdapterFingerPrint* fingerprint) { 845 address i2c_entry = __ pc(); 846 847 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 848 849 // ------------------------------------------------------------------------- 850 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls 851 // to the interpreter. The args start out packed in the compiled layout. They 852 // need to be unpacked into the interpreter layout. This will almost always 853 // require some stack space. We grow the current (compiled) stack, then repack 854 // the args. We finally end in a jump to the generic interpreter entry point. 855 // On exit from the interpreter, the interpreter will restore our SP (lest the 856 // compiled code, which relys solely on SP and not RBP, get sick). 857 858 address c2i_unverified_entry = __ pc(); 859 Label skip_fixup; 860 Label ok; 861 862 Register holder = rax; 863 Register receiver = j_rarg0; 864 Register temp = rbx; 865 866 { 867 __ load_klass(temp, receiver); 868 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); 869 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); 870 __ jcc(Assembler::equal, ok); 871 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 872 873 __ bind(ok); 874 // Method might have been compiled since the call site was patched to 875 // interpreted if that is the case treat it as a miss so we can get 876 // the call site corrected. 877 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); 878 __ jcc(Assembler::equal, skip_fixup); 879 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 880 } 881 882 address c2i_entry = __ pc(); 883 884 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 885 886 __ flush(); 887 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 888 } 889 890 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 891 VMRegPair *regs, 892 VMRegPair *regs2, 893 int total_args_passed) { 894 assert(regs2 == NULL, "not needed on x86"); 895 // We return the amount of VMRegImpl stack slots we need to reserve for all 896 // the arguments NOT counting out_preserve_stack_slots. 897 898 // NOTE: These arrays will have to change when c1 is ported 899 #ifdef _WIN64 900 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 901 c_rarg0, c_rarg1, c_rarg2, c_rarg3 902 }; 903 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 904 c_farg0, c_farg1, c_farg2, c_farg3 905 }; 906 #else 907 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 908 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 909 }; 910 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 911 c_farg0, c_farg1, c_farg2, c_farg3, 912 c_farg4, c_farg5, c_farg6, c_farg7 913 }; 914 #endif // _WIN64 915 916 917 uint int_args = 0; 918 uint fp_args = 0; 919 uint stk_args = 0; // inc by 2 each time 920 921 for (int i = 0; i < total_args_passed; i++) { 922 switch (sig_bt[i]) { 923 case T_BOOLEAN: 924 case T_CHAR: 925 case T_BYTE: 926 case T_SHORT: 927 case T_INT: 928 if (int_args < Argument::n_int_register_parameters_c) { 929 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 930 #ifdef _WIN64 931 fp_args++; 932 // Allocate slots for callee to stuff register args the stack. 933 stk_args += 2; 934 #endif 935 } else { 936 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 937 stk_args += 2; 938 } 939 break; 940 case T_LONG: 941 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 942 // fall through 943 case T_OBJECT: 944 case T_ARRAY: 945 case T_ADDRESS: 946 case T_METADATA: 947 if (int_args < Argument::n_int_register_parameters_c) { 948 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 949 #ifdef _WIN64 950 fp_args++; 951 stk_args += 2; 952 #endif 953 } else { 954 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 955 stk_args += 2; 956 } 957 break; 958 case T_FLOAT: 959 if (fp_args < Argument::n_float_register_parameters_c) { 960 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 961 #ifdef _WIN64 962 int_args++; 963 // Allocate slots for callee to stuff register args the stack. 964 stk_args += 2; 965 #endif 966 } else { 967 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 968 stk_args += 2; 969 } 970 break; 971 case T_DOUBLE: 972 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 973 if (fp_args < Argument::n_float_register_parameters_c) { 974 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 975 #ifdef _WIN64 976 int_args++; 977 // Allocate slots for callee to stuff register args the stack. 978 stk_args += 2; 979 #endif 980 } else { 981 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 982 stk_args += 2; 983 } 984 break; 985 case T_VOID: // Halves of longs and doubles 986 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 987 regs[i].set_bad(); 988 break; 989 default: 990 ShouldNotReachHere(); 991 break; 992 } 993 } 994 #ifdef _WIN64 995 // windows abi requires that we always allocate enough stack space 996 // for 4 64bit registers to be stored down. 997 if (stk_args < 8) { 998 stk_args = 8; 999 } 1000 #endif // _WIN64 1001 1002 return stk_args; 1003 } 1004 1005 // On 64 bit we will store integer like items to the stack as 1006 // 64 bits items (sparc abi) even though java would only store 1007 // 32bits for a parameter. On 32bit it will simply be 32 bits 1008 // So this routine will do 32->32 on 32bit and 32->64 on 64bit 1009 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1010 if (src.first()->is_stack()) { 1011 if (dst.first()->is_stack()) { 1012 // stack to stack 1013 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); 1014 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); 1015 } else { 1016 // stack to reg 1017 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); 1018 } 1019 } else if (dst.first()->is_stack()) { 1020 // reg to stack 1021 // Do we really have to sign extend??? 1022 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); 1023 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1024 } else { 1025 // Do we really have to sign extend??? 1026 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); 1027 if (dst.first() != src.first()) { 1028 __ movq(dst.first()->as_Register(), src.first()->as_Register()); 1029 } 1030 } 1031 } 1032 1033 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1034 if (src.first()->is_stack()) { 1035 if (dst.first()->is_stack()) { 1036 // stack to stack 1037 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); 1038 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); 1039 } else { 1040 // stack to reg 1041 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); 1042 } 1043 } else if (dst.first()->is_stack()) { 1044 // reg to stack 1045 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1046 } else { 1047 if (dst.first() != src.first()) { 1048 __ movq(dst.first()->as_Register(), src.first()->as_Register()); 1049 } 1050 } 1051 } 1052 1053 // An oop arg. Must pass a handle not the oop itself 1054 static void object_move(MacroAssembler* masm, 1055 OopMap* map, 1056 int oop_handle_offset, 1057 int framesize_in_slots, 1058 VMRegPair src, 1059 VMRegPair dst, 1060 bool is_receiver, 1061 int* receiver_offset) { 1062 1063 // must pass a handle. First figure out the location we use as a handle 1064 1065 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); 1066 1067 // See if oop is NULL if it is we need no handle 1068 1069 if (src.first()->is_stack()) { 1070 1071 // Oop is already on the stack as an argument 1072 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1073 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 1074 if (is_receiver) { 1075 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 1076 } 1077 1078 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); 1079 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); 1080 // conditionally move a NULL 1081 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); 1082 } else { 1083 1084 // Oop is in an a register we must store it to the space we reserve 1085 // on the stack for oop_handles and pass a handle if oop is non-NULL 1086 1087 const Register rOop = src.first()->as_Register(); 1088 int oop_slot; 1089 if (rOop == j_rarg0) 1090 oop_slot = 0; 1091 else if (rOop == j_rarg1) 1092 oop_slot = 1; 1093 else if (rOop == j_rarg2) 1094 oop_slot = 2; 1095 else if (rOop == j_rarg3) 1096 oop_slot = 3; 1097 else if (rOop == j_rarg4) 1098 oop_slot = 4; 1099 else { 1100 assert(rOop == j_rarg5, "wrong register"); 1101 oop_slot = 5; 1102 } 1103 1104 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; 1105 int offset = oop_slot*VMRegImpl::stack_slot_size; 1106 1107 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1108 // Store oop in handle area, may be NULL 1109 __ movptr(Address(rsp, offset), rOop); 1110 if (is_receiver) { 1111 *receiver_offset = offset; 1112 } 1113 1114 __ cmpptr(rOop, (int32_t)NULL_WORD); 1115 __ lea(rHandle, Address(rsp, offset)); 1116 // conditionally move a NULL from the handle area where it was just stored 1117 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); 1118 } 1119 1120 // If arg is on the stack then place it otherwise it is already in correct reg. 1121 if (dst.first()->is_stack()) { 1122 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1123 } 1124 } 1125 1126 // A float arg may have to do float reg int reg conversion 1127 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1128 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); 1129 1130 // The calling conventions assures us that each VMregpair is either 1131 // all really one physical register or adjacent stack slots. 1132 // This greatly simplifies the cases here compared to sparc. 1133 1134 if (src.first()->is_stack()) { 1135 if (dst.first()->is_stack()) { 1136 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); 1137 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1138 } else { 1139 // stack to reg 1140 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); 1141 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); 1142 } 1143 } else if (dst.first()->is_stack()) { 1144 // reg to stack 1145 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); 1146 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1147 } else { 1148 // reg to reg 1149 // In theory these overlap but the ordering is such that this is likely a nop 1150 if ( src.first() != dst.first()) { 1151 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); 1152 } 1153 } 1154 } 1155 1156 // A long move 1157 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1158 1159 // The calling conventions assures us that each VMregpair is either 1160 // all really one physical register or adjacent stack slots. 1161 // This greatly simplifies the cases here compared to sparc. 1162 1163 if (src.is_single_phys_reg() ) { 1164 if (dst.is_single_phys_reg()) { 1165 if (dst.first() != src.first()) { 1166 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1167 } 1168 } else { 1169 assert(dst.is_single_reg(), "not a stack pair"); 1170 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1171 } 1172 } else if (dst.is_single_phys_reg()) { 1173 assert(src.is_single_reg(), "not a stack pair"); 1174 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); 1175 } else { 1176 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); 1177 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); 1178 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); 1179 } 1180 } 1181 1182 // A double move 1183 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1184 1185 // The calling conventions assures us that each VMregpair is either 1186 // all really one physical register or adjacent stack slots. 1187 // This greatly simplifies the cases here compared to sparc. 1188 1189 if (src.is_single_phys_reg() ) { 1190 if (dst.is_single_phys_reg()) { 1191 // In theory these overlap but the ordering is such that this is likely a nop 1192 if ( src.first() != dst.first()) { 1193 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); 1194 } 1195 } else { 1196 assert(dst.is_single_reg(), "not a stack pair"); 1197 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1198 } 1199 } else if (dst.is_single_phys_reg()) { 1200 assert(src.is_single_reg(), "not a stack pair"); 1201 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); 1202 } else { 1203 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); 1204 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); 1205 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); 1206 } 1207 } 1208 1209 1210 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1211 // We always ignore the frame_slots arg and just use the space just below frame pointer 1212 // which by this time is free to use 1213 switch (ret_type) { 1214 case T_FLOAT: 1215 __ movflt(Address(rbp, -wordSize), xmm0); 1216 break; 1217 case T_DOUBLE: 1218 __ movdbl(Address(rbp, -wordSize), xmm0); 1219 break; 1220 case T_VOID: break; 1221 default: { 1222 __ movptr(Address(rbp, -wordSize), rax); 1223 } 1224 } 1225 } 1226 1227 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1228 // We always ignore the frame_slots arg and just use the space just below frame pointer 1229 // which by this time is free to use 1230 switch (ret_type) { 1231 case T_FLOAT: 1232 __ movflt(xmm0, Address(rbp, -wordSize)); 1233 break; 1234 case T_DOUBLE: 1235 __ movdbl(xmm0, Address(rbp, -wordSize)); 1236 break; 1237 case T_VOID: break; 1238 default: { 1239 __ movptr(rax, Address(rbp, -wordSize)); 1240 } 1241 } 1242 } 1243 1244 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1245 for ( int i = first_arg ; i < arg_count ; i++ ) { 1246 if (args[i].first()->is_Register()) { 1247 __ push(args[i].first()->as_Register()); 1248 } else if (args[i].first()->is_XMMRegister()) { 1249 __ subptr(rsp, 2*wordSize); 1250 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); 1251 } 1252 } 1253 } 1254 1255 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1256 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { 1257 if (args[i].first()->is_Register()) { 1258 __ pop(args[i].first()->as_Register()); 1259 } else if (args[i].first()->is_XMMRegister()) { 1260 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); 1261 __ addptr(rsp, 2*wordSize); 1262 } 1263 } 1264 } 1265 1266 1267 static void save_or_restore_arguments(MacroAssembler* masm, 1268 const int stack_slots, 1269 const int total_in_args, 1270 const int arg_save_area, 1271 OopMap* map, 1272 VMRegPair* in_regs, 1273 BasicType* in_sig_bt) { 1274 // if map is non-NULL then the code should store the values, 1275 // otherwise it should load them. 1276 int slot = arg_save_area; 1277 // Save down double word first 1278 for ( int i = 0; i < total_in_args; i++) { 1279 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { 1280 int offset = slot * VMRegImpl::stack_slot_size; 1281 slot += VMRegImpl::slots_per_word; 1282 assert(slot <= stack_slots, "overflow"); 1283 if (map != NULL) { 1284 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); 1285 } else { 1286 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); 1287 } 1288 } 1289 if (in_regs[i].first()->is_Register() && 1290 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { 1291 int offset = slot * VMRegImpl::stack_slot_size; 1292 if (map != NULL) { 1293 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); 1294 if (in_sig_bt[i] == T_ARRAY) { 1295 map->set_oop(VMRegImpl::stack2reg(slot));; 1296 } 1297 } else { 1298 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); 1299 } 1300 slot += VMRegImpl::slots_per_word; 1301 } 1302 } 1303 // Save or restore single word registers 1304 for ( int i = 0; i < total_in_args; i++) { 1305 if (in_regs[i].first()->is_Register()) { 1306 int offset = slot * VMRegImpl::stack_slot_size; 1307 slot++; 1308 assert(slot <= stack_slots, "overflow"); 1309 1310 // Value is in an input register pass we must flush it to the stack 1311 const Register reg = in_regs[i].first()->as_Register(); 1312 switch (in_sig_bt[i]) { 1313 case T_BOOLEAN: 1314 case T_CHAR: 1315 case T_BYTE: 1316 case T_SHORT: 1317 case T_INT: 1318 if (map != NULL) { 1319 __ movl(Address(rsp, offset), reg); 1320 } else { 1321 __ movl(reg, Address(rsp, offset)); 1322 } 1323 break; 1324 case T_ARRAY: 1325 case T_LONG: 1326 // handled above 1327 break; 1328 case T_OBJECT: 1329 default: ShouldNotReachHere(); 1330 } 1331 } else if (in_regs[i].first()->is_XMMRegister()) { 1332 if (in_sig_bt[i] == T_FLOAT) { 1333 int offset = slot * VMRegImpl::stack_slot_size; 1334 slot++; 1335 assert(slot <= stack_slots, "overflow"); 1336 if (map != NULL) { 1337 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); 1338 } else { 1339 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); 1340 } 1341 } 1342 } else if (in_regs[i].first()->is_stack()) { 1343 if (in_sig_bt[i] == T_ARRAY && map != NULL) { 1344 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1345 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); 1346 } 1347 } 1348 } 1349 } 1350 1351 1352 // Check GC_locker::needs_gc and enter the runtime if it's true. This 1353 // keeps a new JNI critical region from starting until a GC has been 1354 // forced. Save down any oops in registers and describe them in an 1355 // OopMap. 1356 static void check_needs_gc_for_critical_native(MacroAssembler* masm, 1357 int stack_slots, 1358 int total_c_args, 1359 int total_in_args, 1360 int arg_save_area, 1361 OopMapSet* oop_maps, 1362 VMRegPair* in_regs, 1363 BasicType* in_sig_bt) { 1364 __ block_comment("check GC_locker::needs_gc"); 1365 Label cont; 1366 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); 1367 __ jcc(Assembler::equal, cont); 1368 1369 // Save down any incoming oops and call into the runtime to halt for a GC 1370 1371 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1372 save_or_restore_arguments(masm, stack_slots, total_in_args, 1373 arg_save_area, map, in_regs, in_sig_bt); 1374 1375 address the_pc = __ pc(); 1376 oop_maps->add_gc_map( __ offset(), map); 1377 __ set_last_Java_frame(rsp, noreg, the_pc); 1378 1379 __ block_comment("block_for_jni_critical"); 1380 __ movptr(c_rarg0, r15_thread); 1381 __ mov(r12, rsp); // remember sp 1382 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows 1383 __ andptr(rsp, -16); // align stack as required by ABI 1384 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); 1385 __ mov(rsp, r12); // restore sp 1386 __ reinit_heapbase(); 1387 1388 __ reset_last_Java_frame(false, true); 1389 1390 save_or_restore_arguments(masm, stack_slots, total_in_args, 1391 arg_save_area, NULL, in_regs, in_sig_bt); 1392 1393 __ bind(cont); 1394 #ifdef ASSERT 1395 if (StressCriticalJNINatives) { 1396 // Stress register saving 1397 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1398 save_or_restore_arguments(masm, stack_slots, total_in_args, 1399 arg_save_area, map, in_regs, in_sig_bt); 1400 // Destroy argument registers 1401 for (int i = 0; i < total_in_args - 1; i++) { 1402 if (in_regs[i].first()->is_Register()) { 1403 const Register reg = in_regs[i].first()->as_Register(); 1404 __ xorptr(reg, reg); 1405 } else if (in_regs[i].first()->is_XMMRegister()) { 1406 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); 1407 } else if (in_regs[i].first()->is_FloatRegister()) { 1408 ShouldNotReachHere(); 1409 } else if (in_regs[i].first()->is_stack()) { 1410 // Nothing to do 1411 } else { 1412 ShouldNotReachHere(); 1413 } 1414 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { 1415 i++; 1416 } 1417 } 1418 1419 save_or_restore_arguments(masm, stack_slots, total_in_args, 1420 arg_save_area, NULL, in_regs, in_sig_bt); 1421 } 1422 #endif 1423 } 1424 1425 // Unpack an array argument into a pointer to the body and the length 1426 // if the array is non-null, otherwise pass 0 for both. 1427 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { 1428 Register tmp_reg = rax; 1429 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, 1430 "possible collision"); 1431 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, 1432 "possible collision"); 1433 1434 __ block_comment("unpack_array_argument {"); 1435 1436 // Pass the length, ptr pair 1437 Label is_null, done; 1438 VMRegPair tmp; 1439 tmp.set_ptr(tmp_reg->as_VMReg()); 1440 if (reg.first()->is_stack()) { 1441 // Load the arg up from the stack 1442 move_ptr(masm, reg, tmp); 1443 reg = tmp; 1444 } 1445 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); 1446 __ jccb(Assembler::equal, is_null); 1447 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); 1448 move_ptr(masm, tmp, body_arg); 1449 // load the length relative to the body. 1450 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - 1451 arrayOopDesc::base_offset_in_bytes(in_elem_type))); 1452 move32_64(masm, tmp, length_arg); 1453 __ jmpb(done); 1454 __ bind(is_null); 1455 // Pass zeros 1456 __ xorptr(tmp_reg, tmp_reg); 1457 move_ptr(masm, tmp, body_arg); 1458 move32_64(masm, tmp, length_arg); 1459 __ bind(done); 1460 1461 __ block_comment("} unpack_array_argument"); 1462 } 1463 1464 1465 // Different signatures may require very different orders for the move 1466 // to avoid clobbering other arguments. There's no simple way to 1467 // order them safely. Compute a safe order for issuing stores and 1468 // break any cycles in those stores. This code is fairly general but 1469 // it's not necessary on the other platforms so we keep it in the 1470 // platform dependent code instead of moving it into a shared file. 1471 // (See bugs 7013347 & 7145024.) 1472 // Note that this code is specific to LP64. 1473 class ComputeMoveOrder: public StackObj { 1474 class MoveOperation: public ResourceObj { 1475 friend class ComputeMoveOrder; 1476 private: 1477 VMRegPair _src; 1478 VMRegPair _dst; 1479 int _src_index; 1480 int _dst_index; 1481 bool _processed; 1482 MoveOperation* _next; 1483 MoveOperation* _prev; 1484 1485 static int get_id(VMRegPair r) { 1486 return r.first()->value(); 1487 } 1488 1489 public: 1490 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): 1491 _src(src) 1492 , _src_index(src_index) 1493 , _dst(dst) 1494 , _dst_index(dst_index) 1495 , _next(NULL) 1496 , _prev(NULL) 1497 , _processed(false) { 1498 } 1499 1500 VMRegPair src() const { return _src; } 1501 int src_id() const { return get_id(src()); } 1502 int src_index() const { return _src_index; } 1503 VMRegPair dst() const { return _dst; } 1504 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } 1505 int dst_index() const { return _dst_index; } 1506 int dst_id() const { return get_id(dst()); } 1507 MoveOperation* next() const { return _next; } 1508 MoveOperation* prev() const { return _prev; } 1509 void set_processed() { _processed = true; } 1510 bool is_processed() const { return _processed; } 1511 1512 // insert 1513 void break_cycle(VMRegPair temp_register) { 1514 // create a new store following the last store 1515 // to move from the temp_register to the original 1516 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); 1517 1518 // break the cycle of links and insert new_store at the end 1519 // break the reverse link. 1520 MoveOperation* p = prev(); 1521 assert(p->next() == this, "must be"); 1522 _prev = NULL; 1523 p->_next = new_store; 1524 new_store->_prev = p; 1525 1526 // change the original store to save it's value in the temp. 1527 set_dst(-1, temp_register); 1528 } 1529 1530 void link(GrowableArray<MoveOperation*>& killer) { 1531 // link this store in front the store that it depends on 1532 MoveOperation* n = killer.at_grow(src_id(), NULL); 1533 if (n != NULL) { 1534 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); 1535 _next = n; 1536 n->_prev = this; 1537 } 1538 } 1539 }; 1540 1541 private: 1542 GrowableArray<MoveOperation*> edges; 1543 1544 public: 1545 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, 1546 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { 1547 // Move operations where the dest is the stack can all be 1548 // scheduled first since they can't interfere with the other moves. 1549 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 1550 if (in_sig_bt[i] == T_ARRAY) { 1551 c_arg--; 1552 if (out_regs[c_arg].first()->is_stack() && 1553 out_regs[c_arg + 1].first()->is_stack()) { 1554 arg_order.push(i); 1555 arg_order.push(c_arg); 1556 } else { 1557 if (out_regs[c_arg].first()->is_stack() || 1558 in_regs[i].first() == out_regs[c_arg].first()) { 1559 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); 1560 } else { 1561 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); 1562 } 1563 } 1564 } else if (in_sig_bt[i] == T_VOID) { 1565 arg_order.push(i); 1566 arg_order.push(c_arg); 1567 } else { 1568 if (out_regs[c_arg].first()->is_stack() || 1569 in_regs[i].first() == out_regs[c_arg].first()) { 1570 arg_order.push(i); 1571 arg_order.push(c_arg); 1572 } else { 1573 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); 1574 } 1575 } 1576 } 1577 // Break any cycles in the register moves and emit the in the 1578 // proper order. 1579 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); 1580 for (int i = 0; i < stores->length(); i++) { 1581 arg_order.push(stores->at(i)->src_index()); 1582 arg_order.push(stores->at(i)->dst_index()); 1583 } 1584 } 1585 1586 // Collected all the move operations 1587 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { 1588 if (src.first() == dst.first()) return; 1589 edges.append(new MoveOperation(src_index, src, dst_index, dst)); 1590 } 1591 1592 // Walk the edges breaking cycles between moves. The result list 1593 // can be walked in order to produce the proper set of loads 1594 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { 1595 // Record which moves kill which values 1596 GrowableArray<MoveOperation*> killer; 1597 for (int i = 0; i < edges.length(); i++) { 1598 MoveOperation* s = edges.at(i); 1599 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); 1600 killer.at_put_grow(s->dst_id(), s, NULL); 1601 } 1602 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, 1603 "make sure temp isn't in the registers that are killed"); 1604 1605 // create links between loads and stores 1606 for (int i = 0; i < edges.length(); i++) { 1607 edges.at(i)->link(killer); 1608 } 1609 1610 // at this point, all the move operations are chained together 1611 // in a doubly linked list. Processing it backwards finds 1612 // the beginning of the chain, forwards finds the end. If there's 1613 // a cycle it can be broken at any point, so pick an edge and walk 1614 // backward until the list ends or we end where we started. 1615 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); 1616 for (int e = 0; e < edges.length(); e++) { 1617 MoveOperation* s = edges.at(e); 1618 if (!s->is_processed()) { 1619 MoveOperation* start = s; 1620 // search for the beginning of the chain or cycle 1621 while (start->prev() != NULL && start->prev() != s) { 1622 start = start->prev(); 1623 } 1624 if (start->prev() == s) { 1625 start->break_cycle(temp_register); 1626 } 1627 // walk the chain forward inserting to store list 1628 while (start != NULL) { 1629 stores->append(start); 1630 start->set_processed(); 1631 start = start->next(); 1632 } 1633 } 1634 } 1635 return stores; 1636 } 1637 }; 1638 1639 static void verify_oop_args(MacroAssembler* masm, 1640 methodHandle method, 1641 const BasicType* sig_bt, 1642 const VMRegPair* regs) { 1643 Register temp_reg = rbx; // not part of any compiled calling seq 1644 if (VerifyOops) { 1645 for (int i = 0; i < method->size_of_parameters(); i++) { 1646 if (sig_bt[i] == T_OBJECT || 1647 sig_bt[i] == T_ARRAY) { 1648 VMReg r = regs[i].first(); 1649 assert(r->is_valid(), "bad oop arg"); 1650 if (r->is_stack()) { 1651 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1652 __ verify_oop(temp_reg); 1653 } else { 1654 __ verify_oop(r->as_Register()); 1655 } 1656 } 1657 } 1658 } 1659 } 1660 1661 static void gen_special_dispatch(MacroAssembler* masm, 1662 methodHandle method, 1663 const BasicType* sig_bt, 1664 const VMRegPair* regs) { 1665 verify_oop_args(masm, method, sig_bt, regs); 1666 vmIntrinsics::ID iid = method->intrinsic_id(); 1667 1668 // Now write the args into the outgoing interpreter space 1669 bool has_receiver = false; 1670 Register receiver_reg = noreg; 1671 int member_arg_pos = -1; 1672 Register member_reg = noreg; 1673 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1674 if (ref_kind != 0) { 1675 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1676 member_reg = rbx; // known to be free at this point 1677 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1678 } else if (iid == vmIntrinsics::_invokeBasic) { 1679 has_receiver = true; 1680 } else { 1681 fatal(err_msg_res("unexpected intrinsic id %d", iid)); 1682 } 1683 1684 if (member_reg != noreg) { 1685 // Load the member_arg into register, if necessary. 1686 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1687 VMReg r = regs[member_arg_pos].first(); 1688 if (r->is_stack()) { 1689 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1690 } else { 1691 // no data motion is needed 1692 member_reg = r->as_Register(); 1693 } 1694 } 1695 1696 if (has_receiver) { 1697 // Make sure the receiver is loaded into a register. 1698 assert(method->size_of_parameters() > 0, "oob"); 1699 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1700 VMReg r = regs[0].first(); 1701 assert(r->is_valid(), "bad receiver arg"); 1702 if (r->is_stack()) { 1703 // Porting note: This assumes that compiled calling conventions always 1704 // pass the receiver oop in a register. If this is not true on some 1705 // platform, pick a temp and load the receiver from stack. 1706 fatal("receiver always in a register"); 1707 receiver_reg = j_rarg0; // known to be free at this point 1708 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1709 } else { 1710 // no data motion is needed 1711 receiver_reg = r->as_Register(); 1712 } 1713 } 1714 1715 // Figure out which address we are really jumping to: 1716 MethodHandles::generate_method_handle_dispatch(masm, iid, 1717 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1718 } 1719 1720 // --------------------------------------------------------------------------- 1721 // Generate a native wrapper for a given method. The method takes arguments 1722 // in the Java compiled code convention, marshals them to the native 1723 // convention (handlizes oops, etc), transitions to native, makes the call, 1724 // returns to java state (possibly blocking), unhandlizes any result and 1725 // returns. 1726 // 1727 // Critical native functions are a shorthand for the use of 1728 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1729 // functions. The wrapper is expected to unpack the arguments before 1730 // passing them to the callee and perform checks before and after the 1731 // native call to ensure that they GC_locker 1732 // lock_critical/unlock_critical semantics are followed. Some other 1733 // parts of JNI setup are skipped like the tear down of the JNI handle 1734 // block and the check for pending exceptions it's impossible for them 1735 // to be thrown. 1736 // 1737 // They are roughly structured like this: 1738 // if (GC_locker::needs_gc()) 1739 // SharedRuntime::block_for_jni_critical(); 1740 // tranistion to thread_in_native 1741 // unpack arrray arguments and call native entry point 1742 // check for safepoint in progress 1743 // check if any thread suspend flags are set 1744 // call into JVM and possible unlock the JNI critical 1745 // if a GC was suppressed while in the critical native. 1746 // transition back to thread_in_Java 1747 // return to caller 1748 // 1749 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1750 methodHandle method, 1751 int compile_id, 1752 BasicType* in_sig_bt, 1753 VMRegPair* in_regs, 1754 BasicType ret_type) { 1755 if (method->is_method_handle_intrinsic()) { 1756 vmIntrinsics::ID iid = method->intrinsic_id(); 1757 intptr_t start = (intptr_t)__ pc(); 1758 int vep_offset = ((intptr_t)__ pc()) - start; 1759 gen_special_dispatch(masm, 1760 method, 1761 in_sig_bt, 1762 in_regs); 1763 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1764 __ flush(); 1765 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1766 return nmethod::new_native_nmethod(method, 1767 compile_id, 1768 masm->code(), 1769 vep_offset, 1770 frame_complete, 1771 stack_slots / VMRegImpl::slots_per_word, 1772 in_ByteSize(-1), 1773 in_ByteSize(-1), 1774 (OopMapSet*)NULL); 1775 } 1776 bool is_critical_native = true; 1777 address native_func = method->critical_native_function(); 1778 if (native_func == NULL) { 1779 native_func = method->native_function(); 1780 is_critical_native = false; 1781 } 1782 assert(native_func != NULL, "must have function"); 1783 1784 // An OopMap for lock (and class if static) 1785 OopMapSet *oop_maps = new OopMapSet(); 1786 intptr_t start = (intptr_t)__ pc(); 1787 1788 // We have received a description of where all the java arg are located 1789 // on entry to the wrapper. We need to convert these args to where 1790 // the jni function will expect them. To figure out where they go 1791 // we convert the java signature to a C signature by inserting 1792 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1793 1794 const int total_in_args = method->size_of_parameters(); 1795 int total_c_args = total_in_args; 1796 if (!is_critical_native) { 1797 total_c_args += 1; 1798 if (method->is_static()) { 1799 total_c_args++; 1800 } 1801 } else { 1802 for (int i = 0; i < total_in_args; i++) { 1803 if (in_sig_bt[i] == T_ARRAY) { 1804 total_c_args++; 1805 } 1806 } 1807 } 1808 1809 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1810 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1811 BasicType* in_elem_bt = NULL; 1812 1813 int argc = 0; 1814 if (!is_critical_native) { 1815 out_sig_bt[argc++] = T_ADDRESS; 1816 if (method->is_static()) { 1817 out_sig_bt[argc++] = T_OBJECT; 1818 } 1819 1820 for (int i = 0; i < total_in_args ; i++ ) { 1821 out_sig_bt[argc++] = in_sig_bt[i]; 1822 } 1823 } else { 1824 Thread* THREAD = Thread::current(); 1825 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); 1826 SignatureStream ss(method->signature()); 1827 for (int i = 0; i < total_in_args ; i++ ) { 1828 if (in_sig_bt[i] == T_ARRAY) { 1829 // Arrays are passed as int, elem* pair 1830 out_sig_bt[argc++] = T_INT; 1831 out_sig_bt[argc++] = T_ADDRESS; 1832 Symbol* atype = ss.as_symbol(CHECK_NULL); 1833 const char* at = atype->as_C_string(); 1834 if (strlen(at) == 2) { 1835 assert(at[0] == '[', "must be"); 1836 switch (at[1]) { 1837 case 'B': in_elem_bt[i] = T_BYTE; break; 1838 case 'C': in_elem_bt[i] = T_CHAR; break; 1839 case 'D': in_elem_bt[i] = T_DOUBLE; break; 1840 case 'F': in_elem_bt[i] = T_FLOAT; break; 1841 case 'I': in_elem_bt[i] = T_INT; break; 1842 case 'J': in_elem_bt[i] = T_LONG; break; 1843 case 'S': in_elem_bt[i] = T_SHORT; break; 1844 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; 1845 default: ShouldNotReachHere(); 1846 } 1847 } 1848 } else { 1849 out_sig_bt[argc++] = in_sig_bt[i]; 1850 in_elem_bt[i] = T_VOID; 1851 } 1852 if (in_sig_bt[i] != T_VOID) { 1853 assert(in_sig_bt[i] == ss.type(), "must match"); 1854 ss.next(); 1855 } 1856 } 1857 } 1858 1859 // Now figure out where the args must be stored and how much stack space 1860 // they require. 1861 int out_arg_slots; 1862 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); 1863 1864 // Compute framesize for the wrapper. We need to handlize all oops in 1865 // incoming registers 1866 1867 // Calculate the total number of stack slots we will need. 1868 1869 // First count the abi requirement plus all of the outgoing args 1870 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1871 1872 // Now the space for the inbound oop handle area 1873 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers 1874 if (is_critical_native) { 1875 // Critical natives may have to call out so they need a save area 1876 // for register arguments. 1877 int double_slots = 0; 1878 int single_slots = 0; 1879 for ( int i = 0; i < total_in_args; i++) { 1880 if (in_regs[i].first()->is_Register()) { 1881 const Register reg = in_regs[i].first()->as_Register(); 1882 switch (in_sig_bt[i]) { 1883 case T_BOOLEAN: 1884 case T_BYTE: 1885 case T_SHORT: 1886 case T_CHAR: 1887 case T_INT: single_slots++; break; 1888 case T_ARRAY: // specific to LP64 (7145024) 1889 case T_LONG: double_slots++; break; 1890 default: ShouldNotReachHere(); 1891 } 1892 } else if (in_regs[i].first()->is_XMMRegister()) { 1893 switch (in_sig_bt[i]) { 1894 case T_FLOAT: single_slots++; break; 1895 case T_DOUBLE: double_slots++; break; 1896 default: ShouldNotReachHere(); 1897 } 1898 } else if (in_regs[i].first()->is_FloatRegister()) { 1899 ShouldNotReachHere(); 1900 } 1901 } 1902 total_save_slots = double_slots * 2 + single_slots; 1903 // align the save area 1904 if (double_slots != 0) { 1905 stack_slots = round_to(stack_slots, 2); 1906 } 1907 } 1908 1909 int oop_handle_offset = stack_slots; 1910 stack_slots += total_save_slots; 1911 1912 // Now any space we need for handlizing a klass if static method 1913 1914 int klass_slot_offset = 0; 1915 int klass_offset = -1; 1916 int lock_slot_offset = 0; 1917 bool is_static = false; 1918 1919 if (method->is_static()) { 1920 klass_slot_offset = stack_slots; 1921 stack_slots += VMRegImpl::slots_per_word; 1922 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1923 is_static = true; 1924 } 1925 1926 // Plus a lock if needed 1927 1928 if (method->is_synchronized()) { 1929 lock_slot_offset = stack_slots; 1930 stack_slots += VMRegImpl::slots_per_word; 1931 } 1932 1933 // Now a place (+2) to save return values or temp during shuffling 1934 // + 4 for return address (which we own) and saved rbp 1935 stack_slots += 6; 1936 1937 // Ok The space we have allocated will look like: 1938 // 1939 // 1940 // FP-> | | 1941 // |---------------------| 1942 // | 2 slots for moves | 1943 // |---------------------| 1944 // | lock box (if sync) | 1945 // |---------------------| <- lock_slot_offset 1946 // | klass (if static) | 1947 // |---------------------| <- klass_slot_offset 1948 // | oopHandle area | 1949 // |---------------------| <- oop_handle_offset (6 java arg registers) 1950 // | outbound memory | 1951 // | based arguments | 1952 // | | 1953 // |---------------------| 1954 // | | 1955 // SP-> | out_preserved_slots | 1956 // 1957 // 1958 1959 1960 // Now compute actual number of stack words we need rounding to make 1961 // stack properly aligned. 1962 stack_slots = round_to(stack_slots, StackAlignmentInSlots); 1963 1964 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1965 1966 // First thing make an ic check to see if we should even be here 1967 1968 // We are free to use all registers as temps without saving them and 1969 // restoring them except rbp. rbp is the only callee save register 1970 // as far as the interpreter and the compiler(s) are concerned. 1971 1972 1973 const Register ic_reg = rax; 1974 const Register receiver = j_rarg0; 1975 1976 Label hit; 1977 Label exception_pending; 1978 1979 assert_different_registers(ic_reg, receiver, rscratch1); 1980 __ verify_oop(receiver); 1981 __ load_klass(rscratch1, receiver); 1982 __ cmpq(ic_reg, rscratch1); 1983 __ jcc(Assembler::equal, hit); 1984 1985 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 1986 1987 // Verified entry point must be aligned 1988 __ align(8); 1989 1990 __ bind(hit); 1991 1992 int vep_offset = ((intptr_t)__ pc()) - start; 1993 1994 // The instruction at the verified entry point must be 5 bytes or longer 1995 // because it can be patched on the fly by make_non_entrant. The stack bang 1996 // instruction fits that requirement. 1997 1998 // Generate stack overflow check 1999 2000 if (UseStackBanging) { 2001 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); 2002 } else { 2003 // need a 5 byte instruction to allow MT safe patching to non-entrant 2004 __ fat_nop(); 2005 } 2006 2007 // Generate a new frame for the wrapper. 2008 __ enter(); 2009 // -2 because return address is already present and so is saved rbp 2010 __ subptr(rsp, stack_size - 2*wordSize); 2011 2012 // Frame is now completed as far as size and linkage. 2013 int frame_complete = ((intptr_t)__ pc()) - start; 2014 2015 if (UseRTMLocking) { 2016 // Abort RTM transaction before calling JNI 2017 // because critical section will be large and will be 2018 // aborted anyway. Also nmethod could be deoptimized. 2019 __ xabort(0); 2020 } 2021 2022 #ifdef ASSERT 2023 { 2024 Label L; 2025 __ mov(rax, rsp); 2026 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) 2027 __ cmpptr(rax, rsp); 2028 __ jcc(Assembler::equal, L); 2029 __ stop("improperly aligned stack"); 2030 __ bind(L); 2031 } 2032 #endif /* ASSERT */ 2033 2034 2035 // We use r14 as the oop handle for the receiver/klass 2036 // It is callee save so it survives the call to native 2037 2038 const Register oop_handle_reg = r14; 2039 2040 if (is_critical_native) { 2041 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, 2042 oop_handle_offset, oop_maps, in_regs, in_sig_bt); 2043 } 2044 2045 // 2046 // We immediately shuffle the arguments so that any vm call we have to 2047 // make from here on out (sync slow path, jvmti, etc.) we will have 2048 // captured the oops from our caller and have a valid oopMap for 2049 // them. 2050 2051 // ----------------- 2052 // The Grand Shuffle 2053 2054 // The Java calling convention is either equal (linux) or denser (win64) than the 2055 // c calling convention. However the because of the jni_env argument the c calling 2056 // convention always has at least one more (and two for static) arguments than Java. 2057 // Therefore if we move the args from java -> c backwards then we will never have 2058 // a register->register conflict and we don't have to build a dependency graph 2059 // and figure out how to break any cycles. 2060 // 2061 2062 // Record esp-based slot for receiver on stack for non-static methods 2063 int receiver_offset = -1; 2064 2065 // This is a trick. We double the stack slots so we can claim 2066 // the oops in the caller's frame. Since we are sure to have 2067 // more args than the caller doubling is enough to make 2068 // sure we can capture all the incoming oop args from the 2069 // caller. 2070 // 2071 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 2072 2073 // Mark location of rbp (someday) 2074 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); 2075 2076 // Use eax, ebx as temporaries during any memory-memory moves we have to do 2077 // All inbound args are referenced based on rbp and all outbound args via rsp. 2078 2079 2080 #ifdef ASSERT 2081 bool reg_destroyed[RegisterImpl::number_of_registers]; 2082 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; 2083 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { 2084 reg_destroyed[r] = false; 2085 } 2086 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { 2087 freg_destroyed[f] = false; 2088 } 2089 2090 #endif /* ASSERT */ 2091 2092 // This may iterate in two different directions depending on the 2093 // kind of native it is. The reason is that for regular JNI natives 2094 // the incoming and outgoing registers are offset upwards and for 2095 // critical natives they are offset down. 2096 GrowableArray<int> arg_order(2 * total_in_args); 2097 VMRegPair tmp_vmreg; 2098 tmp_vmreg.set1(rbx->as_VMReg()); 2099 2100 if (!is_critical_native) { 2101 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 2102 arg_order.push(i); 2103 arg_order.push(c_arg); 2104 } 2105 } else { 2106 // Compute a valid move order, using tmp_vmreg to break any cycles 2107 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); 2108 } 2109 2110 int temploc = -1; 2111 for (int ai = 0; ai < arg_order.length(); ai += 2) { 2112 int i = arg_order.at(ai); 2113 int c_arg = arg_order.at(ai + 1); 2114 __ block_comment(err_msg("move %d -> %d", i, c_arg)); 2115 if (c_arg == -1) { 2116 assert(is_critical_native, "should only be required for critical natives"); 2117 // This arg needs to be moved to a temporary 2118 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); 2119 in_regs[i] = tmp_vmreg; 2120 temploc = i; 2121 continue; 2122 } else if (i == -1) { 2123 assert(is_critical_native, "should only be required for critical natives"); 2124 // Read from the temporary location 2125 assert(temploc != -1, "must be valid"); 2126 i = temploc; 2127 temploc = -1; 2128 } 2129 #ifdef ASSERT 2130 if (in_regs[i].first()->is_Register()) { 2131 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); 2132 } else if (in_regs[i].first()->is_XMMRegister()) { 2133 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); 2134 } 2135 if (out_regs[c_arg].first()->is_Register()) { 2136 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 2137 } else if (out_regs[c_arg].first()->is_XMMRegister()) { 2138 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; 2139 } 2140 #endif /* ASSERT */ 2141 switch (in_sig_bt[i]) { 2142 case T_ARRAY: 2143 if (is_critical_native) { 2144 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); 2145 c_arg++; 2146 #ifdef ASSERT 2147 if (out_regs[c_arg].first()->is_Register()) { 2148 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 2149 } else if (out_regs[c_arg].first()->is_XMMRegister()) { 2150 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; 2151 } 2152 #endif 2153 break; 2154 } 2155 case T_OBJECT: 2156 assert(!is_critical_native, "no oop arguments"); 2157 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 2158 ((i == 0) && (!is_static)), 2159 &receiver_offset); 2160 break; 2161 case T_VOID: 2162 break; 2163 2164 case T_FLOAT: 2165 float_move(masm, in_regs[i], out_regs[c_arg]); 2166 break; 2167 2168 case T_DOUBLE: 2169 assert( i + 1 < total_in_args && 2170 in_sig_bt[i + 1] == T_VOID && 2171 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 2172 double_move(masm, in_regs[i], out_regs[c_arg]); 2173 break; 2174 2175 case T_LONG : 2176 long_move(masm, in_regs[i], out_regs[c_arg]); 2177 break; 2178 2179 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 2180 2181 default: 2182 move32_64(masm, in_regs[i], out_regs[c_arg]); 2183 } 2184 } 2185 2186 int c_arg; 2187 2188 // Pre-load a static method's oop into r14. Used both by locking code and 2189 // the normal JNI call code. 2190 if (!is_critical_native) { 2191 // point c_arg at the first arg that is already loaded in case we 2192 // need to spill before we call out 2193 c_arg = total_c_args - total_in_args; 2194 2195 if (method->is_static()) { 2196 2197 // load oop into a register 2198 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); 2199 2200 // Now handlize the static class mirror it's known not-null. 2201 __ movptr(Address(rsp, klass_offset), oop_handle_reg); 2202 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 2203 2204 // Now get the handle 2205 __ lea(oop_handle_reg, Address(rsp, klass_offset)); 2206 // store the klass handle as second argument 2207 __ movptr(c_rarg1, oop_handle_reg); 2208 // and protect the arg if we must spill 2209 c_arg--; 2210 } 2211 } else { 2212 // For JNI critical methods we need to save all registers in save_args. 2213 c_arg = 0; 2214 } 2215 2216 // Change state to native (we save the return address in the thread, since it might not 2217 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() 2218 // points into the right code segment. It does not have to be the correct return pc. 2219 // We use the same pc/oopMap repeatedly when we call out 2220 2221 intptr_t the_pc = (intptr_t) __ pc(); 2222 oop_maps->add_gc_map(the_pc - start, map); 2223 2224 __ set_last_Java_frame(rsp, noreg, (address)the_pc); 2225 2226 2227 // We have all of the arguments setup at this point. We must not touch any register 2228 // argument registers at this point (what if we save/restore them there are no oop? 2229 2230 { 2231 SkipIfEqual skip(masm, &DTraceMethodProbes, false); 2232 // protect the args we've loaded 2233 save_args(masm, total_c_args, c_arg, out_regs); 2234 __ mov_metadata(c_rarg1, method()); 2235 __ call_VM_leaf( 2236 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2237 r15_thread, c_rarg1); 2238 restore_args(masm, total_c_args, c_arg, out_regs); 2239 } 2240 2241 // RedefineClasses() tracing support for obsolete method entry 2242 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { 2243 // protect the args we've loaded 2244 save_args(masm, total_c_args, c_arg, out_regs); 2245 __ mov_metadata(c_rarg1, method()); 2246 __ call_VM_leaf( 2247 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 2248 r15_thread, c_rarg1); 2249 restore_args(masm, total_c_args, c_arg, out_regs); 2250 } 2251 2252 // Lock a synchronized method 2253 2254 // Register definitions used by locking and unlocking 2255 2256 const Register swap_reg = rax; // Must use rax for cmpxchg instruction 2257 const Register obj_reg = rbx; // Will contain the oop 2258 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) 2259 const Register old_hdr = r13; // value of old header at unlock time 2260 2261 Label slow_path_lock; 2262 Label lock_done; 2263 2264 if (method->is_synchronized()) { 2265 assert(!is_critical_native, "unhandled"); 2266 2267 2268 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 2269 2270 // Get the handle (the 2nd argument) 2271 __ mov(oop_handle_reg, c_rarg1); 2272 2273 // Get address of the box 2274 2275 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2276 2277 // Load the oop from the handle 2278 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 2279 2280 if (UseBiasedLocking) { 2281 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); 2282 } 2283 2284 // Load immediate 1 into swap_reg %rax 2285 __ movl(swap_reg, 1); 2286 2287 // Load (object->mark() | 1) into swap_reg %rax 2288 __ orptr(swap_reg, Address(obj_reg, 0)); 2289 2290 // Save (object->mark() | 1) into BasicLock's displaced header 2291 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 2292 2293 if (os::is_MP()) { 2294 __ lock(); 2295 } 2296 2297 // src -> dest iff dest == rax else rax <- dest 2298 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); 2299 __ jcc(Assembler::equal, lock_done); 2300 2301 // Hmm should this move to the slow path code area??? 2302 2303 // Test if the oopMark is an obvious stack pointer, i.e., 2304 // 1) (mark & 3) == 0, and 2305 // 2) rsp <= mark < mark + os::pagesize() 2306 // These 3 tests can be done by evaluating the following 2307 // expression: ((mark - rsp) & (3 - os::vm_page_size())), 2308 // assuming both stack pointer and pagesize have their 2309 // least significant 2 bits clear. 2310 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg 2311 2312 __ subptr(swap_reg, rsp); 2313 __ andptr(swap_reg, 3 - os::vm_page_size()); 2314 2315 // Save the test result, for recursive case, the result is zero 2316 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 2317 __ jcc(Assembler::notEqual, slow_path_lock); 2318 2319 // Slow path will re-enter here 2320 2321 __ bind(lock_done); 2322 } 2323 2324 2325 // Finally just about ready to make the JNI call 2326 2327 2328 // get JNIEnv* which is first argument to native 2329 if (!is_critical_native) { 2330 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); 2331 } 2332 2333 // Now set thread in native 2334 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); 2335 2336 __ call(RuntimeAddress(native_func)); 2337 2338 // Verify or restore cpu control state after JNI call 2339 __ restore_cpu_control_state_after_jni(); 2340 2341 // Unpack native results. 2342 switch (ret_type) { 2343 case T_BOOLEAN: __ c2bool(rax); break; 2344 case T_CHAR : __ movzwl(rax, rax); break; 2345 case T_BYTE : __ sign_extend_byte (rax); break; 2346 case T_SHORT : __ sign_extend_short(rax); break; 2347 case T_INT : /* nothing to do */ break; 2348 case T_DOUBLE : 2349 case T_FLOAT : 2350 // Result is in xmm0 we'll save as needed 2351 break; 2352 case T_ARRAY: // Really a handle 2353 case T_OBJECT: // Really a handle 2354 break; // can't de-handlize until after safepoint check 2355 case T_VOID: break; 2356 case T_LONG: break; 2357 default : ShouldNotReachHere(); 2358 } 2359 2360 // Switch thread to "native transition" state before reading the synchronization state. 2361 // This additional state is necessary because reading and testing the synchronization 2362 // state is not atomic w.r.t. GC, as this scenario demonstrates: 2363 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 2364 // VM thread changes sync state to synchronizing and suspends threads for GC. 2365 // Thread A is resumed to finish this native method, but doesn't block here since it 2366 // didn't see any synchronization is progress, and escapes. 2367 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); 2368 2369 if(os::is_MP()) { 2370 if (UseMembar) { 2371 // Force this write out before the read below 2372 __ membar(Assembler::Membar_mask_bits( 2373 Assembler::LoadLoad | Assembler::LoadStore | 2374 Assembler::StoreLoad | Assembler::StoreStore)); 2375 } else { 2376 // Write serialization page so VM thread can do a pseudo remote membar. 2377 // We use the current thread pointer to calculate a thread specific 2378 // offset to write to within the page. This minimizes bus traffic 2379 // due to cache line collision. 2380 __ serialize_memory(r15_thread, rcx); 2381 } 2382 } 2383 2384 Label after_transition; 2385 2386 // check for safepoint operation in progress and/or pending suspend requests 2387 { 2388 Label Continue; 2389 2390 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), 2391 SafepointSynchronize::_not_synchronized); 2392 2393 Label L; 2394 __ jcc(Assembler::notEqual, L); 2395 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); 2396 __ jcc(Assembler::equal, Continue); 2397 __ bind(L); 2398 2399 // Don't use call_VM as it will see a possible pending exception and forward it 2400 // and never return here preventing us from clearing _last_native_pc down below. 2401 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are 2402 // preserved and correspond to the bcp/locals pointers. So we do a runtime call 2403 // by hand. 2404 // 2405 save_native_result(masm, ret_type, stack_slots); 2406 __ mov(c_rarg0, r15_thread); 2407 __ mov(r12, rsp); // remember sp 2408 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows 2409 __ andptr(rsp, -16); // align stack as required by ABI 2410 if (!is_critical_native) { 2411 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); 2412 } else { 2413 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); 2414 } 2415 __ mov(rsp, r12); // restore sp 2416 __ reinit_heapbase(); 2417 // Restore any method result value 2418 restore_native_result(masm, ret_type, stack_slots); 2419 2420 if (is_critical_native) { 2421 // The call above performed the transition to thread_in_Java so 2422 // skip the transition logic below. 2423 __ jmpb(after_transition); 2424 } 2425 2426 __ bind(Continue); 2427 } 2428 2429 // change thread state 2430 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); 2431 __ bind(after_transition); 2432 2433 Label reguard; 2434 Label reguard_done; 2435 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); 2436 __ jcc(Assembler::equal, reguard); 2437 __ bind(reguard_done); 2438 2439 // native result if any is live 2440 2441 // Unlock 2442 Label unlock_done; 2443 Label slow_path_unlock; 2444 if (method->is_synchronized()) { 2445 2446 // Get locked oop from the handle we passed to jni 2447 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 2448 2449 Label done; 2450 2451 if (UseBiasedLocking) { 2452 __ biased_locking_exit(obj_reg, old_hdr, done); 2453 } 2454 2455 // Simple recursive lock? 2456 2457 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); 2458 __ jcc(Assembler::equal, done); 2459 2460 // Must save rax if if it is live now because cmpxchg must use it 2461 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2462 save_native_result(masm, ret_type, stack_slots); 2463 } 2464 2465 2466 // get address of the stack lock 2467 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2468 // get old displaced header 2469 __ movptr(old_hdr, Address(rax, 0)); 2470 2471 // Atomic swap old header if oop still contains the stack lock 2472 if (os::is_MP()) { 2473 __ lock(); 2474 } 2475 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); 2476 __ jcc(Assembler::notEqual, slow_path_unlock); 2477 2478 // slow path re-enters here 2479 __ bind(unlock_done); 2480 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2481 restore_native_result(masm, ret_type, stack_slots); 2482 } 2483 2484 __ bind(done); 2485 2486 } 2487 { 2488 SkipIfEqual skip(masm, &DTraceMethodProbes, false); 2489 save_native_result(masm, ret_type, stack_slots); 2490 __ mov_metadata(c_rarg1, method()); 2491 __ call_VM_leaf( 2492 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2493 r15_thread, c_rarg1); 2494 restore_native_result(masm, ret_type, stack_slots); 2495 } 2496 2497 __ reset_last_Java_frame(false, true); 2498 2499 // Unpack oop result 2500 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { 2501 Label L; 2502 __ testptr(rax, rax); 2503 __ jcc(Assembler::zero, L); 2504 __ movptr(rax, Address(rax, 0)); 2505 __ bind(L); 2506 __ verify_oop(rax); 2507 } 2508 2509 if (!is_critical_native) { 2510 // reset handle block 2511 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); 2512 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); 2513 } 2514 2515 // pop our frame 2516 2517 __ leave(); 2518 2519 if (!is_critical_native) { 2520 // Any exception pending? 2521 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); 2522 __ jcc(Assembler::notEqual, exception_pending); 2523 } 2524 2525 // Return 2526 2527 __ ret(0); 2528 2529 // Unexpected paths are out of line and go here 2530 2531 if (!is_critical_native) { 2532 // forward the exception 2533 __ bind(exception_pending); 2534 2535 // and forward the exception 2536 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2537 } 2538 2539 // Slow path locking & unlocking 2540 if (method->is_synchronized()) { 2541 2542 // BEGIN Slow path lock 2543 __ bind(slow_path_lock); 2544 2545 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2546 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2547 2548 // protect the args we've loaded 2549 save_args(masm, total_c_args, c_arg, out_regs); 2550 2551 __ mov(c_rarg0, obj_reg); 2552 __ mov(c_rarg1, lock_reg); 2553 __ mov(c_rarg2, r15_thread); 2554 2555 // Not a leaf but we have last_Java_frame setup as we want 2556 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); 2557 restore_args(masm, total_c_args, c_arg, out_regs); 2558 2559 #ifdef ASSERT 2560 { Label L; 2561 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); 2562 __ jcc(Assembler::equal, L); 2563 __ stop("no pending exception allowed on exit from monitorenter"); 2564 __ bind(L); 2565 } 2566 #endif 2567 __ jmp(lock_done); 2568 2569 // END Slow path lock 2570 2571 // BEGIN Slow path unlock 2572 __ bind(slow_path_unlock); 2573 2574 // If we haven't already saved the native result we must save it now as xmm registers 2575 // are still exposed. 2576 2577 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2578 save_native_result(masm, ret_type, stack_slots); 2579 } 2580 2581 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2582 2583 __ mov(c_rarg0, obj_reg); 2584 __ mov(c_rarg2, r15_thread); 2585 __ mov(r12, rsp); // remember sp 2586 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows 2587 __ andptr(rsp, -16); // align stack as required by ABI 2588 2589 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2590 // NOTE that obj_reg == rbx currently 2591 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); 2592 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); 2593 2594 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2595 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); 2596 __ mov(rsp, r12); // restore sp 2597 __ reinit_heapbase(); 2598 #ifdef ASSERT 2599 { 2600 Label L; 2601 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); 2602 __ jcc(Assembler::equal, L); 2603 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2604 __ bind(L); 2605 } 2606 #endif /* ASSERT */ 2607 2608 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); 2609 2610 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2611 restore_native_result(masm, ret_type, stack_slots); 2612 } 2613 __ jmp(unlock_done); 2614 2615 // END Slow path unlock 2616 2617 } // synchronized 2618 2619 // SLOW PATH Reguard the stack if needed 2620 2621 __ bind(reguard); 2622 save_native_result(masm, ret_type, stack_slots); 2623 __ mov(r12, rsp); // remember sp 2624 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows 2625 __ andptr(rsp, -16); // align stack as required by ABI 2626 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); 2627 __ mov(rsp, r12); // restore sp 2628 __ reinit_heapbase(); 2629 restore_native_result(masm, ret_type, stack_slots); 2630 // and continue 2631 __ jmp(reguard_done); 2632 2633 2634 2635 __ flush(); 2636 2637 nmethod *nm = nmethod::new_native_nmethod(method, 2638 compile_id, 2639 masm->code(), 2640 vep_offset, 2641 frame_complete, 2642 stack_slots / VMRegImpl::slots_per_word, 2643 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2644 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2645 oop_maps); 2646 2647 if (is_critical_native) { 2648 nm->set_lazy_critical_native(true); 2649 } 2650 2651 return nm; 2652 2653 } 2654 2655 // this function returns the adjust size (in number of words) to a c2i adapter 2656 // activation for use during deoptimization 2657 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { 2658 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2659 } 2660 2661 2662 uint SharedRuntime::out_preserve_stack_slots() { 2663 return 0; 2664 } 2665 2666 //------------------------------generate_deopt_blob---------------------------- 2667 void SharedRuntime::generate_deopt_blob() { 2668 // Allocate space for the code 2669 ResourceMark rm; 2670 // Setup code generation tools 2671 CodeBuffer buffer("deopt_blob", 2048, 1024); 2672 MacroAssembler* masm = new MacroAssembler(&buffer); 2673 int frame_size_in_words; 2674 OopMap* map = NULL; 2675 OopMapSet *oop_maps = new OopMapSet(); 2676 2677 // ------------- 2678 // This code enters when returning to a de-optimized nmethod. A return 2679 // address has been pushed on the the stack, and return values are in 2680 // registers. 2681 // If we are doing a normal deopt then we were called from the patched 2682 // nmethod from the point we returned to the nmethod. So the return 2683 // address on the stack is wrong by NativeCall::instruction_size 2684 // We will adjust the value so it looks like we have the original return 2685 // address on the stack (like when we eagerly deoptimized). 2686 // In the case of an exception pending when deoptimizing, we enter 2687 // with a return address on the stack that points after the call we patched 2688 // into the exception handler. We have the following register state from, 2689 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). 2690 // rax: exception oop 2691 // rbx: exception handler 2692 // rdx: throwing pc 2693 // So in this case we simply jam rdx into the useless return address and 2694 // the stack looks just like we want. 2695 // 2696 // At this point we need to de-opt. We save the argument return 2697 // registers. We call the first C routine, fetch_unroll_info(). This 2698 // routine captures the return values and returns a structure which 2699 // describes the current frame size and the sizes of all replacement frames. 2700 // The current frame is compiled code and may contain many inlined 2701 // functions, each with their own JVM state. We pop the current frame, then 2702 // push all the new frames. Then we call the C routine unpack_frames() to 2703 // populate these frames. Finally unpack_frames() returns us the new target 2704 // address. Notice that callee-save registers are BLOWN here; they have 2705 // already been captured in the vframeArray at the time the return PC was 2706 // patched. 2707 address start = __ pc(); 2708 Label cont; 2709 2710 // Prolog for non exception case! 2711 2712 // Save everything in sight. 2713 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2714 2715 // Normal deoptimization. Save exec mode for unpack_frames. 2716 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved 2717 __ jmp(cont); 2718 2719 int reexecute_offset = __ pc() - start; 2720 2721 // Reexecute case 2722 // return address is the pc describes what bci to do re-execute at 2723 2724 // No need to update map as each call to save_live_registers will produce identical oopmap 2725 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2726 2727 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved 2728 __ jmp(cont); 2729 2730 int exception_offset = __ pc() - start; 2731 2732 // Prolog for exception case 2733 2734 // all registers are dead at this entry point, except for rax, and 2735 // rdx which contain the exception oop and exception pc 2736 // respectively. Set them in TLS and fall thru to the 2737 // unpack_with_exception_in_tls entry point. 2738 2739 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); 2740 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); 2741 2742 int exception_in_tls_offset = __ pc() - start; 2743 2744 // new implementation because exception oop is now passed in JavaThread 2745 2746 // Prolog for exception case 2747 // All registers must be preserved because they might be used by LinearScan 2748 // Exceptiop oop and throwing PC are passed in JavaThread 2749 // tos: stack at point of call to method that threw the exception (i.e. only 2750 // args are on the stack, no return address) 2751 2752 // make room on stack for the return address 2753 // It will be patched later with the throwing pc. The correct value is not 2754 // available now because loading it from memory would destroy registers. 2755 __ push(0); 2756 2757 // Save everything in sight. 2758 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2759 2760 // Now it is safe to overwrite any register 2761 2762 // Deopt during an exception. Save exec mode for unpack_frames. 2763 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved 2764 2765 // load throwing pc from JavaThread and patch it as the return address 2766 // of the current frame. Then clear the field in JavaThread 2767 2768 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); 2769 __ movptr(Address(rbp, wordSize), rdx); 2770 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); 2771 2772 #ifdef ASSERT 2773 // verify that there is really an exception oop in JavaThread 2774 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); 2775 __ verify_oop(rax); 2776 2777 // verify that there is no pending exception 2778 Label no_pending_exception; 2779 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); 2780 __ testptr(rax, rax); 2781 __ jcc(Assembler::zero, no_pending_exception); 2782 __ stop("must not have pending exception here"); 2783 __ bind(no_pending_exception); 2784 #endif 2785 2786 __ bind(cont); 2787 2788 // Call C code. Need thread and this frame, but NOT official VM entry 2789 // crud. We cannot block on this call, no GC can happen. 2790 // 2791 // UnrollBlock* fetch_unroll_info(JavaThread* thread) 2792 2793 // fetch_unroll_info needs to call last_java_frame(). 2794 2795 __ set_last_Java_frame(noreg, noreg, NULL); 2796 #ifdef ASSERT 2797 { Label L; 2798 __ cmpptr(Address(r15_thread, 2799 JavaThread::last_Java_fp_offset()), 2800 (int32_t)0); 2801 __ jcc(Assembler::equal, L); 2802 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2803 __ bind(L); 2804 } 2805 #endif // ASSERT 2806 __ mov(c_rarg0, r15_thread); 2807 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2808 2809 // Need to have an oopmap that tells fetch_unroll_info where to 2810 // find any register it might need. 2811 oop_maps->add_gc_map(__ pc() - start, map); 2812 2813 __ reset_last_Java_frame(false, false); 2814 2815 // Load UnrollBlock* into rdi 2816 __ mov(rdi, rax); 2817 2818 Label noException; 2819 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? 2820 __ jcc(Assembler::notEqual, noException); 2821 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); 2822 // QQQ this is useless it was NULL above 2823 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); 2824 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); 2825 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); 2826 2827 __ verify_oop(rax); 2828 2829 // Overwrite the result registers with the exception results. 2830 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); 2831 // I think this is useless 2832 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); 2833 2834 __ bind(noException); 2835 2836 // Only register save data is on the stack. 2837 // Now restore the result registers. Everything else is either dead 2838 // or captured in the vframeArray. 2839 RegisterSaver::restore_result_registers(masm); 2840 2841 // All of the register save area has been popped of the stack. Only the 2842 // return address remains. 2843 2844 // Pop all the frames we must move/replace. 2845 // 2846 // Frame picture (youngest to oldest) 2847 // 1: self-frame (no frame link) 2848 // 2: deopting frame (no frame link) 2849 // 3: caller of deopting frame (could be compiled/interpreted). 2850 // 2851 // Note: by leaving the return address of self-frame on the stack 2852 // and using the size of frame 2 to adjust the stack 2853 // when we are done the return to frame 3 will still be on the stack. 2854 2855 // Pop deoptimized frame 2856 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); 2857 __ addptr(rsp, rcx); 2858 2859 // rsp should be pointing at the return address to the caller (3) 2860 2861 // Pick up the initial fp we should save 2862 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2863 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); 2864 2865 #ifdef ASSERT 2866 // Compilers generate code that bang the stack by as much as the 2867 // interpreter would need. So this stack banging should never 2868 // trigger a fault. Verify that it does not on non product builds. 2869 if (UseStackBanging) { 2870 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 2871 __ bang_stack_size(rbx, rcx); 2872 } 2873 #endif 2874 2875 // Load address of array of frame pcs into rcx 2876 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2877 2878 // Trash the old pc 2879 __ addptr(rsp, wordSize); 2880 2881 // Load address of array of frame sizes into rsi 2882 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); 2883 2884 // Load counter into rdx 2885 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); 2886 2887 // Now adjust the caller's stack to make up for the extra locals 2888 // but record the original sp so that we can save it in the skeletal interpreter 2889 // frame and the stack walking of interpreter_sender will get the unextended sp 2890 // value and not the "real" sp value. 2891 2892 const Register sender_sp = r8; 2893 2894 __ mov(sender_sp, rsp); 2895 __ movl(rbx, Address(rdi, 2896 Deoptimization::UnrollBlock:: 2897 caller_adjustment_offset_in_bytes())); 2898 __ subptr(rsp, rbx); 2899 2900 // Push interpreter frames in a loop 2901 Label loop; 2902 __ bind(loop); 2903 __ movptr(rbx, Address(rsi, 0)); // Load frame size 2904 #ifdef CC_INTERP 2905 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and 2906 #ifdef ASSERT 2907 __ push(0xDEADDEAD); // Make a recognizable pattern 2908 __ push(0xDEADDEAD); 2909 #else /* ASSERT */ 2910 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" 2911 #endif /* ASSERT */ 2912 #else 2913 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand 2914 #endif // CC_INTERP 2915 __ pushptr(Address(rcx, 0)); // Save return address 2916 __ enter(); // Save old & set new ebp 2917 __ subptr(rsp, rbx); // Prolog 2918 #ifdef CC_INTERP 2919 __ movptr(Address(rbp, 2920 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), 2921 sender_sp); // Make it walkable 2922 #else /* CC_INTERP */ 2923 // This value is corrected by layout_activation_impl 2924 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); 2925 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable 2926 #endif /* CC_INTERP */ 2927 __ mov(sender_sp, rsp); // Pass sender_sp to next frame 2928 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 2929 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 2930 __ decrementl(rdx); // Decrement counter 2931 __ jcc(Assembler::notZero, loop); 2932 __ pushptr(Address(rcx, 0)); // Save final return address 2933 2934 // Re-push self-frame 2935 __ enter(); // Save old & set new ebp 2936 2937 // Allocate a full sized register save area. 2938 // Return address and rbp are in place, so we allocate two less words. 2939 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); 2940 2941 // Restore frame locals after moving the frame 2942 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); 2943 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); 2944 2945 // Call C code. Need thread but NOT official VM entry 2946 // crud. We cannot block on this call, no GC can happen. Call should 2947 // restore return values to their stack-slots with the new SP. 2948 // 2949 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) 2950 2951 // Use rbp because the frames look interpreted now 2952 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. 2953 // Don't need the precise return PC here, just precise enough to point into this code blob. 2954 address the_pc = __ pc(); 2955 __ set_last_Java_frame(noreg, rbp, the_pc); 2956 2957 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI 2958 __ mov(c_rarg0, r15_thread); 2959 __ movl(c_rarg1, r14); // second arg: exec_mode 2960 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2961 // Revert SP alignment after call since we're going to do some SP relative addressing below 2962 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); 2963 2964 // Set an oopmap for the call site 2965 // Use the same PC we used for the last java frame 2966 oop_maps->add_gc_map(the_pc - start, 2967 new OopMap( frame_size_in_words, 0 )); 2968 2969 // Clear fp AND pc 2970 __ reset_last_Java_frame(true, true); 2971 2972 // Collect return values 2973 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); 2974 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); 2975 // I think this is useless (throwing pc?) 2976 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); 2977 2978 // Pop self-frame. 2979 __ leave(); // Epilog 2980 2981 // Jump to interpreter 2982 __ ret(0); 2983 2984 // Make sure all code is generated 2985 masm->flush(); 2986 2987 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2988 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2989 } 2990 2991 #ifdef COMPILER2 2992 //------------------------------generate_uncommon_trap_blob-------------------- 2993 void SharedRuntime::generate_uncommon_trap_blob() { 2994 // Allocate space for the code 2995 ResourceMark rm; 2996 // Setup code generation tools 2997 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); 2998 MacroAssembler* masm = new MacroAssembler(&buffer); 2999 3000 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 3001 3002 address start = __ pc(); 3003 3004 if (UseRTMLocking) { 3005 // Abort RTM transaction before possible nmethod deoptimization. 3006 __ xabort(0); 3007 } 3008 3009 // Push self-frame. We get here with a return address on the 3010 // stack, so rsp is 8-byte aligned until we allocate our frame. 3011 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! 3012 3013 // No callee saved registers. rbp is assumed implicitly saved 3014 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); 3015 3016 // compiler left unloaded_class_index in j_rarg0 move to where the 3017 // runtime expects it. 3018 __ movl(c_rarg1, j_rarg0); 3019 3020 __ set_last_Java_frame(noreg, noreg, NULL); 3021 3022 // Call C code. Need thread but NOT official VM entry 3023 // crud. We cannot block on this call, no GC can happen. Call should 3024 // capture callee-saved registers as well as return values. 3025 // Thread is in rdi already. 3026 // 3027 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); 3028 3029 __ mov(c_rarg0, r15_thread); 3030 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); 3031 3032 // Set an oopmap for the call site 3033 OopMapSet* oop_maps = new OopMapSet(); 3034 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); 3035 3036 // location of rbp is known implicitly by the frame sender code 3037 3038 oop_maps->add_gc_map(__ pc() - start, map); 3039 3040 __ reset_last_Java_frame(false, false); 3041 3042 // Load UnrollBlock* into rdi 3043 __ mov(rdi, rax); 3044 3045 // Pop all the frames we must move/replace. 3046 // 3047 // Frame picture (youngest to oldest) 3048 // 1: self-frame (no frame link) 3049 // 2: deopting frame (no frame link) 3050 // 3: caller of deopting frame (could be compiled/interpreted). 3051 3052 // Pop self-frame. We have no frame, and must rely only on rax and rsp. 3053 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! 3054 3055 // Pop deoptimized frame (int) 3056 __ movl(rcx, Address(rdi, 3057 Deoptimization::UnrollBlock:: 3058 size_of_deoptimized_frame_offset_in_bytes())); 3059 __ addptr(rsp, rcx); 3060 3061 // rsp should be pointing at the return address to the caller (3) 3062 3063 // Pick up the initial fp we should save 3064 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 3065 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); 3066 3067 #ifdef ASSERT 3068 // Compilers generate code that bang the stack by as much as the 3069 // interpreter would need. So this stack banging should never 3070 // trigger a fault. Verify that it does not on non product builds. 3071 if (UseStackBanging) { 3072 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 3073 __ bang_stack_size(rbx, rcx); 3074 } 3075 #endif 3076 3077 // Load address of array of frame pcs into rcx (address*) 3078 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 3079 3080 // Trash the return pc 3081 __ addptr(rsp, wordSize); 3082 3083 // Load address of array of frame sizes into rsi (intptr_t*) 3084 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); 3085 3086 // Counter 3087 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) 3088 3089 // Now adjust the caller's stack to make up for the extra locals but 3090 // record the original sp so that we can save it in the skeletal 3091 // interpreter frame and the stack walking of interpreter_sender 3092 // will get the unextended sp value and not the "real" sp value. 3093 3094 const Register sender_sp = r8; 3095 3096 __ mov(sender_sp, rsp); 3097 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) 3098 __ subptr(rsp, rbx); 3099 3100 // Push interpreter frames in a loop 3101 Label loop; 3102 __ bind(loop); 3103 __ movptr(rbx, Address(rsi, 0)); // Load frame size 3104 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand 3105 __ pushptr(Address(rcx, 0)); // Save return address 3106 __ enter(); // Save old & set new rbp 3107 __ subptr(rsp, rbx); // Prolog 3108 #ifdef CC_INTERP 3109 __ movptr(Address(rbp, 3110 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), 3111 sender_sp); // Make it walkable 3112 #else // CC_INTERP 3113 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), 3114 sender_sp); // Make it walkable 3115 // This value is corrected by layout_activation_impl 3116 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); 3117 #endif // CC_INTERP 3118 __ mov(sender_sp, rsp); // Pass sender_sp to next frame 3119 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 3120 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 3121 __ decrementl(rdx); // Decrement counter 3122 __ jcc(Assembler::notZero, loop); 3123 __ pushptr(Address(rcx, 0)); // Save final return address 3124 3125 // Re-push self-frame 3126 __ enter(); // Save old & set new rbp 3127 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); 3128 // Prolog 3129 3130 // Use rbp because the frames look interpreted now 3131 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. 3132 // Don't need the precise return PC here, just precise enough to point into this code blob. 3133 address the_pc = __ pc(); 3134 __ set_last_Java_frame(noreg, rbp, the_pc); 3135 3136 // Call C code. Need thread but NOT official VM entry 3137 // crud. We cannot block on this call, no GC can happen. Call should 3138 // restore return values to their stack-slots with the new SP. 3139 // Thread is in rdi already. 3140 // 3141 // BasicType unpack_frames(JavaThread* thread, int exec_mode); 3142 3143 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI 3144 __ mov(c_rarg0, r15_thread); 3145 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); 3146 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 3147 3148 // Set an oopmap for the call site 3149 // Use the same PC we used for the last java frame 3150 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 3151 3152 // Clear fp AND pc 3153 __ reset_last_Java_frame(true, true); 3154 3155 // Pop self-frame. 3156 __ leave(); // Epilog 3157 3158 // Jump to interpreter 3159 __ ret(0); 3160 3161 // Make sure all code is generated 3162 masm->flush(); 3163 3164 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, 3165 SimpleRuntimeFrame::framesize >> 1); 3166 } 3167 #endif // COMPILER2 3168 3169 3170 //------------------------------generate_handler_blob------ 3171 // 3172 // Generate a special Compile2Runtime blob that saves all registers, 3173 // and setup oopmap. 3174 // 3175 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 3176 assert(StubRoutines::forward_exception_entry() != NULL, 3177 "must be generated before"); 3178 3179 ResourceMark rm; 3180 OopMapSet *oop_maps = new OopMapSet(); 3181 OopMap* map; 3182 3183 // Allocate space for the code. Setup code generation tools. 3184 CodeBuffer buffer("handler_blob", 2048, 1024); 3185 MacroAssembler* masm = new MacroAssembler(&buffer); 3186 3187 address start = __ pc(); 3188 address call_pc = NULL; 3189 int frame_size_in_words; 3190 bool cause_return = (poll_type == POLL_AT_RETURN); 3191 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); 3192 3193 if (UseRTMLocking) { 3194 // Abort RTM transaction before calling runtime 3195 // because critical section will be large and will be 3196 // aborted anyway. Also nmethod could be deoptimized. 3197 __ xabort(0); 3198 } 3199 3200 // Make room for return address (or push it again) 3201 if (!cause_return) { 3202 __ push(rbx); 3203 } 3204 3205 // Save registers, fpu state, and flags 3206 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); 3207 3208 // The following is basically a call_VM. However, we need the precise 3209 // address of the call in order to generate an oopmap. Hence, we do all the 3210 // work outselves. 3211 3212 __ set_last_Java_frame(noreg, noreg, NULL); 3213 3214 // The return address must always be correct so that frame constructor never 3215 // sees an invalid pc. 3216 3217 if (!cause_return) { 3218 // overwrite the dummy value we pushed on entry 3219 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); 3220 __ movptr(Address(rbp, wordSize), c_rarg0); 3221 } 3222 3223 // Do the call 3224 __ mov(c_rarg0, r15_thread); 3225 __ call(RuntimeAddress(call_ptr)); 3226 3227 // Set an oopmap for the call site. This oopmap will map all 3228 // oop-registers and debug-info registers as callee-saved. This 3229 // will allow deoptimization at this safepoint to find all possible 3230 // debug-info recordings, as well as let GC find all oops. 3231 3232 oop_maps->add_gc_map( __ pc() - start, map); 3233 3234 Label noException; 3235 3236 __ reset_last_Java_frame(false, false); 3237 3238 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 3239 __ jcc(Assembler::equal, noException); 3240 3241 // Exception pending 3242 3243 RegisterSaver::restore_live_registers(masm, save_vectors); 3244 3245 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3246 3247 // No exception case 3248 __ bind(noException); 3249 3250 // Normal exit, restore registers and exit. 3251 RegisterSaver::restore_live_registers(masm, save_vectors); 3252 3253 __ ret(0); 3254 3255 // Make sure all code is generated 3256 masm->flush(); 3257 3258 // Fill-out other meta info 3259 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 3260 } 3261 3262 // 3263 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 3264 // 3265 // Generate a stub that calls into vm to find out the proper destination 3266 // of a java call. All the argument registers are live at this point 3267 // but since this is generic code we don't know what they are and the caller 3268 // must do any gc of the args. 3269 // 3270 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 3271 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); 3272 3273 // allocate space for the code 3274 ResourceMark rm; 3275 3276 CodeBuffer buffer(name, 1000, 512); 3277 MacroAssembler* masm = new MacroAssembler(&buffer); 3278 3279 int frame_size_in_words; 3280 3281 OopMapSet *oop_maps = new OopMapSet(); 3282 OopMap* map = NULL; 3283 3284 int start = __ offset(); 3285 3286 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 3287 3288 int frame_complete = __ offset(); 3289 3290 __ set_last_Java_frame(noreg, noreg, NULL); 3291 3292 __ mov(c_rarg0, r15_thread); 3293 3294 __ call(RuntimeAddress(destination)); 3295 3296 3297 // Set an oopmap for the call site. 3298 // We need this not only for callee-saved registers, but also for volatile 3299 // registers that the compiler might be keeping live across a safepoint. 3300 3301 oop_maps->add_gc_map( __ offset() - start, map); 3302 3303 // rax contains the address we are going to jump to assuming no exception got installed 3304 3305 // clear last_Java_sp 3306 __ reset_last_Java_frame(false, false); 3307 // check for pending exceptions 3308 Label pending; 3309 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 3310 __ jcc(Assembler::notEqual, pending); 3311 3312 // get the returned Method* 3313 __ get_vm_result_2(rbx, r15_thread); 3314 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); 3315 3316 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); 3317 3318 RegisterSaver::restore_live_registers(masm); 3319 3320 // We are back the the original state on entry and ready to go. 3321 3322 __ jmp(rax); 3323 3324 // Pending exception after the safepoint 3325 3326 __ bind(pending); 3327 3328 RegisterSaver::restore_live_registers(masm); 3329 3330 // exception pending => remove activation and forward to exception handler 3331 3332 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); 3333 3334 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); 3335 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3336 3337 // ------------- 3338 // make sure all code is generated 3339 masm->flush(); 3340 3341 // return the blob 3342 // frame_size_words or bytes?? 3343 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); 3344 } 3345 3346 3347 #ifdef COMPILER2 3348 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame 3349 // 3350 //------------------------------generate_exception_blob--------------------------- 3351 // creates exception blob at the end 3352 // Using exception blob, this code is jumped from a compiled method. 3353 // (see emit_exception_handler in x86_64.ad file) 3354 // 3355 // Given an exception pc at a call we call into the runtime for the 3356 // handler in this method. This handler might merely restore state 3357 // (i.e. callee save registers) unwind the frame and jump to the 3358 // exception handler for the nmethod if there is no Java level handler 3359 // for the nmethod. 3360 // 3361 // This code is entered with a jmp. 3362 // 3363 // Arguments: 3364 // rax: exception oop 3365 // rdx: exception pc 3366 // 3367 // Results: 3368 // rax: exception oop 3369 // rdx: exception pc in caller or ??? 3370 // destination: exception handler of caller 3371 // 3372 // Note: the exception pc MUST be at a call (precise debug information) 3373 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. 3374 // 3375 3376 void OptoRuntime::generate_exception_blob() { 3377 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); 3378 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); 3379 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); 3380 3381 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 3382 3383 // Allocate space for the code 3384 ResourceMark rm; 3385 // Setup code generation tools 3386 CodeBuffer buffer("exception_blob", 2048, 1024); 3387 MacroAssembler* masm = new MacroAssembler(&buffer); 3388 3389 3390 address start = __ pc(); 3391 3392 // Exception pc is 'return address' for stack walker 3393 __ push(rdx); 3394 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog 3395 3396 // Save callee-saved registers. See x86_64.ad. 3397 3398 // rbp is an implicitly saved callee saved register (i.e., the calling 3399 // convention will save/restore it in the prolog/epilog). Other than that 3400 // there are no callee save registers now that adapter frames are gone. 3401 3402 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); 3403 3404 // Store exception in Thread object. We cannot pass any arguments to the 3405 // handle_exception call, since we do not want to make any assumption 3406 // about the size of the frame where the exception happened in. 3407 // c_rarg0 is either rdi (Linux) or rcx (Windows). 3408 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); 3409 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); 3410 3411 // This call does all the hard work. It checks if an exception handler 3412 // exists in the method. 3413 // If so, it returns the handler address. 3414 // If not, it prepares for stack-unwinding, restoring the callee-save 3415 // registers of the frame being removed. 3416 // 3417 // address OptoRuntime::handle_exception_C(JavaThread* thread) 3418 3419 // At a method handle call, the stack may not be properly aligned 3420 // when returning with an exception. 3421 address the_pc = __ pc(); 3422 __ set_last_Java_frame(noreg, noreg, the_pc); 3423 __ mov(c_rarg0, r15_thread); 3424 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack 3425 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); 3426 3427 // Set an oopmap for the call site. This oopmap will only be used if we 3428 // are unwinding the stack. Hence, all locations will be dead. 3429 // Callee-saved registers will be the same as the frame above (i.e., 3430 // handle_exception_stub), since they were restored when we got the 3431 // exception. 3432 3433 OopMapSet* oop_maps = new OopMapSet(); 3434 3435 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 3436 3437 __ reset_last_Java_frame(false, true); 3438 3439 // Restore callee-saved registers 3440 3441 // rbp is an implicitly saved callee-saved register (i.e., the calling 3442 // convention will save restore it in prolog/epilog) Other than that 3443 // there are no callee save registers now that adapter frames are gone. 3444 3445 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); 3446 3447 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog 3448 __ pop(rdx); // No need for exception pc anymore 3449 3450 // rax: exception handler 3451 3452 // We have a handler in rax (could be deopt blob). 3453 __ mov(r8, rax); 3454 3455 // Get the exception oop 3456 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); 3457 // Get the exception pc in case we are deoptimized 3458 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); 3459 #ifdef ASSERT 3460 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); 3461 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); 3462 #endif 3463 // Clear the exception oop so GC no longer processes it as a root. 3464 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); 3465 3466 // rax: exception oop 3467 // r8: exception handler 3468 // rdx: exception pc 3469 // Jump to handler 3470 3471 __ jmp(r8); 3472 3473 // Make sure all code is generated 3474 masm->flush(); 3475 3476 // Set exception blob 3477 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); 3478 } 3479 #endif // COMPILER2